JPS55154663A - Convolution operating system - Google Patents

Abstract

PURPOSE: To enable high speed operation, by providing a circuit executing the operation in the combination of exclusive use memories with the operating section convoluting an input signal and a reference triangle function without using a complicated multiplier.

CONSTITUTION: A PCM signal multiplexed in time sharing is input from an input terminal 21, and frame pulse and channel pulse are fed from a clock terminal in synchronizing with the PCM signal. Only the polarity bit of each channel is branched from this PCM signal at a polarity separation circuit 23 and fed to an exclusive logical sum circuit 26, and the remaining bits except the least significance bit out of the absolute value amplitude bits are fed to a multiplication table memory 24. Further, the pulse from the terminal 22 is fed to a coefficient number forming circuit 25, and the output renewed every time slot split is fed to the memory 24 and a circuit 26. Further, the content of the memory 24 is read out to a complement forming circuit 27, and the result is of required polarity, the complement is formed. After that, processing is made at an adder 28, shift register 29, square circuit 30, two- stage shift register 31 and judging circuit 33, and the convolution between the input signal and the reference triangle function can be made at high speed.

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