JPS5647837A - Delay circuit - Google Patents

Delay circuit

Info

Publication number
JPS5647837A
JPS5647837A JP12311979A JP12311979A JPS5647837A JP S5647837 A JPS5647837 A JP S5647837A JP 12311979 A JP12311979 A JP 12311979A JP 12311979 A JP12311979 A JP 12311979A JP S5647837 A JPS5647837 A JP S5647837A
Authority
JP
Japan
Prior art keywords
switch
clock
shift register
output
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12311979A
Other languages
Japanese (ja)
Inventor
Tsutomu Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP12311979A priority Critical patent/JPS5647837A/en
Publication of JPS5647837A publication Critical patent/JPS5647837A/en
Pending legal-status Critical Current

Links

Landscapes

  • Shift Register Type Memory (AREA)
  • Pulse Circuits (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE: To make it possible to adjust the delayed amount with good accuracy without remarkably increasing the number of stages of a shift register, by means of cascade connection of two shift registers which are different in clock phase.
CONSTITUTION: When a data is input to the shift register 10, it is shifted by the clock A, and a signal which is 1 clock α (s) later than the switch SNl-1, and a signal which is 1 clock later than the switch SNl are output from the switch SNl and the switch SNm, respectively, and in the same way as the foregoing, a signal which is 1 clock later than the switch SNm is output from the switch SNn. When the switch S1 is turned off, an output of the shift register 10 is input to the second shift register 20 which is connected by cascade to the shift register 10, it is shifted by the clock B whose frequency is, for instance, four times as high as that of the clock A, and an output signal whose each phase difference is α/4 (s) is provided to each switch S2WS4.
COPYRIGHT: (C)1981,JPO&Japio
JP12311979A 1979-09-27 1979-09-27 Delay circuit Pending JPS5647837A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12311979A JPS5647837A (en) 1979-09-27 1979-09-27 Delay circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12311979A JPS5647837A (en) 1979-09-27 1979-09-27 Delay circuit

Publications (1)

Publication Number Publication Date
JPS5647837A true JPS5647837A (en) 1981-04-30

Family

ID=14852646

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12311979A Pending JPS5647837A (en) 1979-09-27 1979-09-27 Delay circuit

Country Status (1)

Country Link
JP (1) JPS5647837A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58124325A (en) * 1982-01-20 1983-07-23 Hitachi Ltd Shift register with variable number of delay stages
JPS5970019A (en) * 1982-09-16 1984-04-20 アムペックス　コ−ポレ−ション Shift register delay circuit
JPS605313A (en) * 1983-06-23 1985-01-11 Fujitsu Ltd Timing signal generating circuit
JPS6296879A (en) * 1985-10-24 1987-05-06 Nec Corp Timing control circuit
JPS62176344A (en) * 1986-01-30 1987-08-03 Nec Corp Timing phase correction circuit
EP0361806A2 (en) * 1988-09-30 1990-04-04 Advanced Micro Devices, Inc. Variable length time delay apparatus

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58124325A (en) * 1982-01-20 1983-07-23 Hitachi Ltd Shift register with variable number of delay stages
JPS5970019A (en) * 1982-09-16 1984-04-20 アムペックス　コ−ポレ−ション Shift register delay circuit
JPS605313A (en) * 1983-06-23 1985-01-11 Fujitsu Ltd Timing signal generating circuit
JPH0354486B2 (en) * 1983-06-23 1991-08-20
JPS6296879A (en) * 1985-10-24 1987-05-06 Nec Corp Timing control circuit
JPS62176344A (en) * 1986-01-30 1987-08-03 Nec Corp Timing phase correction circuit
EP0361806A2 (en) * 1988-09-30 1990-04-04 Advanced Micro Devices, Inc. Variable length time delay apparatus

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