JPS5563123A - Phase control circuit - Google Patents

Phase control circuit

Info

Publication number
JPS5563123A
JPS5563123A JP13602978A JP13602978A JPS5563123A JP S5563123 A JPS5563123 A JP S5563123A JP 13602978 A JP13602978 A JP 13602978A JP 13602978 A JP13602978 A JP 13602978A JP S5563123 A JPS5563123 A JP S5563123A
Authority
JP
Japan
Prior art keywords
phase
circuit
signal
signals
phase difference
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13602978A
Other languages
Japanese (ja)
Inventor
Mitsushige Tadami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP13602978A priority Critical patent/JPS5563123A/en
Publication of JPS5563123A publication Critical patent/JPS5563123A/en
Pending legal-status Critical Current

Links

Landscapes

  • Pulse Circuits (AREA)
  • Manipulation Of Pulses (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

PURPOSE: To ensure the reduction of the phase difference between the input signal and the reference signal within the fixed range in a simple constitution by selecting the delay signal of the phase approximate to the reference signal based on the output of the detection circuit.
CONSTITUTION: The phase difference between input signal A and reference signal B is reduced down within 90°, for example, without using any clock pulse. The control circuit comprises delay line 4 which delays A and obtains delay signals A1∼ A4, phase detection circuit 1 while detects the phase difference between signals A and B, and switch circuit 5 while selects signals A1∼A4 based on the signal of circuit 1. Circuit 5 selects signals A1∼A4 featuring the phase most approximate to the rise phase of signal B in accordance with Q output signals Q2 AND Q3 of D.FF2 and 3 in circuit 1. And for instance, the phase of B is in phase region ϕ1, A1 is selected; while A4 is selected in the case of ϕ4 each, and thus signal A' the phase difference of which is set within 90° to B is delivered from circuit 5.
COPYRIGHT: (C)1980,JPO&Japio
JP13602978A 1978-11-04 1978-11-04 Phase control circuit Pending JPS5563123A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13602978A JPS5563123A (en) 1978-11-04 1978-11-04 Phase control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13602978A JPS5563123A (en) 1978-11-04 1978-11-04 Phase control circuit

Publications (1)

Publication Number Publication Date
JPS5563123A true JPS5563123A (en) 1980-05-13

Family

ID=15165511

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13602978A Pending JPS5563123A (en) 1978-11-04 1978-11-04 Phase control circuit

Country Status (1)

Country Link
JP (1) JPS5563123A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56120227A (en) * 1980-01-31 1981-09-21 Philips Nv Synchronizer circuit
JPS6011535U (en) * 1983-06-30 1985-01-26 富士通株式会社 Clock signal phase adjustment device
JPS61228726A (en) * 1985-04-02 1986-10-11 Nec Corp Oscillation output control circuit
JPS61261918A (en) * 1985-05-16 1986-11-20 Japanese National Railways<Jnr> Phase adjusting method for clock pulse
JPS62269410A (en) * 1986-05-16 1987-11-21 Tokyo Optical Co Ltd Scanning synchronizing signal generating circuit
JPS63193280A (en) * 1987-02-06 1988-08-10 Mitsubishi Electric Corp Image memory device
WO1990000329A1 (en) * 1988-06-27 1990-01-11 Akira Yokomizo Syncrhonizing-signal selection circuit and pll circuit using said selection circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5061970A (en) * 1973-09-29 1975-05-27

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5061970A (en) * 1973-09-29 1975-05-27

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56120227A (en) * 1980-01-31 1981-09-21 Philips Nv Synchronizer circuit
JPS6011535U (en) * 1983-06-30 1985-01-26 富士通株式会社 Clock signal phase adjustment device
JPS61228726A (en) * 1985-04-02 1986-10-11 Nec Corp Oscillation output control circuit
JPS61261918A (en) * 1985-05-16 1986-11-20 Japanese National Railways<Jnr> Phase adjusting method for clock pulse
JPS62269410A (en) * 1986-05-16 1987-11-21 Tokyo Optical Co Ltd Scanning synchronizing signal generating circuit
JPS63193280A (en) * 1987-02-06 1988-08-10 Mitsubishi Electric Corp Image memory device
WO1990000329A1 (en) * 1988-06-27 1990-01-11 Akira Yokomizo Syncrhonizing-signal selection circuit and pll circuit using said selection circuit

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