JPS5577279A - Forming circuit for control signal - Google Patents

Forming circuit for control signal

Info

Publication number
JPS5577279A
JPS5577279A JP15137478A JP15137478A JPS5577279A JP S5577279 A JPS5577279 A JP S5577279A JP 15137478 A JP15137478 A JP 15137478A JP 15137478 A JP15137478 A JP 15137478A JP S5577279 A JPS5577279 A JP S5577279A
Authority
JP
Japan
Prior art keywords
circuit
counter
pulse
signal
period
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15137478A
Other languages
Japanese (ja)
Other versions
JPS6150549B2 (en
Inventor
Yoshihiro Morioka
Takashi Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP15137478A priority Critical patent/JPS5577279A/en
Publication of JPS5577279A publication Critical patent/JPS5577279A/en
Publication of JPS6150549B2 publication Critical patent/JPS6150549B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE: To make it possible to generate easiliy control pulses of fixed width from an external composite synchronizing signal, by forming a control signal controlling a synchronizing signal by the use of a counter.
CONSTITUTION: This circuit consists of forming circuit 1 for clock pulse PC, forming circuit 2 for pulse signals SH of a horizontal period, and a forming circuit for pulse signal SV of a vertical period. In circuit 1, counter 6 counts down outputs of VCO5 where a frequency an integer greater than a horizontal frequency is selected, and the count value is compared with signal SH by phase comparator 7, whose output is supplied to VCO5 by way of LPF8 to form clock pulse PC. Circuit 2, consisting of counter 11 and inhibit circuit 12 provided on a reset terminal R side, forms pulse signal SH of the horizontal period with its pulse width set below one period and above a half the horizontal period. Circuit 3, composed of counter 15 and D type FF circuit 16, form vertical-period pulse signal SV. Counter 20, discriminating the presence of an external synchronizing signal, is formed of a counter. In the above constitution, pulse signals are formed easily and IC-implementation is also realized.
COPYRIGHT: (C)1980,JPO&Japio
JP15137478A 1978-12-06 1978-12-06 Forming circuit for control signal Granted JPS5577279A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15137478A JPS5577279A (en) 1978-12-06 1978-12-06 Forming circuit for control signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15137478A JPS5577279A (en) 1978-12-06 1978-12-06 Forming circuit for control signal

Publications (2)

Publication Number Publication Date
JPS5577279A true JPS5577279A (en) 1980-06-10
JPS6150549B2 JPS6150549B2 (en) 1986-11-05

Family

ID=15517154

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15137478A Granted JPS5577279A (en) 1978-12-06 1978-12-06 Forming circuit for control signal

Country Status (1)

Country Link
JP (1) JPS5577279A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58191573A (en) * 1982-05-06 1983-11-08 Victor Co Of Japan Ltd Horizontal scanning frequency multiplier circuit
JPS62171A (en) * 1985-06-26 1987-01-06 Pioneer Electronic Corp Reproduced horizontal synchronizing signal generator

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58191573A (en) * 1982-05-06 1983-11-08 Victor Co Of Japan Ltd Horizontal scanning frequency multiplier circuit
JPS6337550B2 (en) * 1982-05-06 1988-07-26 Victor Company Of Japan
JPS62171A (en) * 1985-06-26 1987-01-06 Pioneer Electronic Corp Reproduced horizontal synchronizing signal generator

Also Published As

Publication number Publication date
JPS6150549B2 (en) 1986-11-05

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