JPS5768945A - Timing pickup circuit for di-code - Google Patents

Timing pickup circuit for di-code

Info

Publication number
JPS5768945A
JPS5768945A JP55143702A JP14370280A JPS5768945A JP S5768945 A JPS5768945 A JP S5768945A JP 55143702 A JP55143702 A JP 55143702A JP 14370280 A JP14370280 A JP 14370280A JP S5768945 A JPS5768945 A JP S5768945A
Authority
JP
Japan
Prior art keywords
signal
gate
outputted
period
pulse code
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55143702A
Other languages
Japanese (ja)
Inventor
Koji Nishizaki
Masanori Arai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55143702A priority Critical patent/JPS5768945A/en
Publication of JPS5768945A publication Critical patent/JPS5768945A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0054—Detection of the synchronisation error by features other than the received signal transition
    • H04L7/0066—Detection of the synchronisation error by features other than the received signal transition detection of error based on transmission code rule
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/027—Speed or phase control by the received code signals, the signals containing no special synchronisation information extracting the synchronising or clock signal from the received signal spectrum, e.g. by using a resonant or bandpass circuit

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To enable timing pickup easily, even from a high speed di-pulse code series with a simple circuit, by matching the phase of frequency components with different phase through the logical operation of a di-pulse code series. CONSTITUTION:When a signal (a) of a di-pulse code is applied to an input terminal IN, the signal (a) is inverted at an inverter 2, and a signal (b) delayed by 1/2 period of the signal (a) at a delay circuit 4 is inputted to an exclusive NOR gate 6, where the signals (a) and (b) are operated and a signal (c) is outputted to an exclusive OR gate 10 and an AND gate 12. At the gate 10, a signal (d) delaying 8 on output signal (f) by T/2 and the signal (c) are operated to form the signal (e), and the logical product signal (f) between the signals (e) and (c) is outputted at the gate 12. At a period t1 where the signal (c) changed to high or low level very T/2 time, the signal (c) is outputted as the signal (f) as it is, and at a period t2 where the signal (c) is kept to a high level, the signal (c) is outputted with the change of high/low level each T/2 period according to the signal (e).
JP55143702A 1980-10-16 1980-10-16 Timing pickup circuit for di-code Pending JPS5768945A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55143702A JPS5768945A (en) 1980-10-16 1980-10-16 Timing pickup circuit for di-code

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55143702A JPS5768945A (en) 1980-10-16 1980-10-16 Timing pickup circuit for di-code

Publications (1)

Publication Number Publication Date
JPS5768945A true JPS5768945A (en) 1982-04-27

Family

ID=15344977

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55143702A Pending JPS5768945A (en) 1980-10-16 1980-10-16 Timing pickup circuit for di-code

Country Status (1)

Country Link
JP (1) JPS5768945A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60145745A (en) * 1984-01-09 1985-08-01 Nec Corp System and circuit for extracting biphase code clock

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60145745A (en) * 1984-01-09 1985-08-01 Nec Corp System and circuit for extracting biphase code clock
JPH0314251B2 (en) * 1984-01-09 1991-02-26 Nippon Electric Co

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