JPS56125144A - Delay detector - Google Patents

Delay detector

Info

Publication number
JPS56125144A
JPS56125144A JP2733280A JP2733280A JPS56125144A JP S56125144 A JPS56125144 A JP S56125144A JP 2733280 A JP2733280 A JP 2733280A JP 2733280 A JP2733280 A JP 2733280A JP S56125144 A JPS56125144 A JP S56125144A
Authority
JP
Japan
Prior art keywords
output
shift register
delay time
input
delay
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2733280A
Other languages
Japanese (ja)
Inventor
Shigeaki Ogose
Kazuaki Murota
Kenkichi Hiraide
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP2733280A priority Critical patent/JPS56125144A/en
Publication of JPS56125144A publication Critical patent/JPS56125144A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22—Demodulator circuits; Receiver circuits
    • H04L27/233—Demodulator circuits; Receiver circuits using non-coherent demodulation
    • H04L27/2331—Demodulator circuits; Receiver circuits using non-coherent demodulation wherein the received signal is demodulated using one or more delayed versions of itself

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

PURPOSE:To enable adaptive control of a delay time to the center frequency variance of a reception signal, by making variable the delay time of a delay element. CONSTITUTION:The modulation wave input signal 8 is divided into 3, which are respectively input to a shift register 1, multipliers 2 and 3. The modulation signals 9 and 10 delayed for a given time with the shift register 1 are respectively fed to another input terminal of multipliers 2 and 3. The output 11 of the multiplier 2 is input to a low pass filter 4 to obtain the delayed detection output 13. The phase error detection circuit between the signals 8 and 10 consists of a part of shift register 1 and circuits 3 and 5, and the output 12 of the multiplier 3 is an output 14 rejecting the AC component with the low pass filter 5, and the control voltage output 15 with a suitale level can be obtained at the delay time control circuit 6 from the output 14. This output 15 controls the voltage controlled oscillator 7 so that normal delay detection output can be obtained even if the frequency variance of modulation wave input 8 is present, the clock rate of the transfer clock output 16 is changed and the shift register is driven with the output 16, allowing to suitably control the delay time.
JP2733280A 1980-03-06 1980-03-06 Delay detector Pending JPS56125144A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2733280A JPS56125144A (en) 1980-03-06 1980-03-06 Delay detector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2733280A JPS56125144A (en) 1980-03-06 1980-03-06 Delay detector

Publications (1)

Publication Number Publication Date
JPS56125144A true JPS56125144A (en) 1981-10-01

Family

ID=12218106

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2733280A Pending JPS56125144A (en) 1980-03-06 1980-03-06 Delay detector

Country Status (1)

Country Link
JP (1) JPS56125144A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58172054A (en) * 1982-04-02 1983-10-08 Nec Corp Delay detecting system
JPS59174760U (en) * 1983-05-09 1984-11-21 沖電気工業株式会社 Delayed detection circuit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5197965A (en) * 1975-02-25 1976-08-28 psk shingofukuchohoshiki
JPS53136418A (en) * 1977-05-02 1978-11-29 Hitachi Ltd Signal repeating installation

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5197965A (en) * 1975-02-25 1976-08-28 psk shingofukuchohoshiki
JPS53136418A (en) * 1977-05-02 1978-11-29 Hitachi Ltd Signal repeating installation

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58172054A (en) * 1982-04-02 1983-10-08 Nec Corp Delay detecting system
JPH0123019B2 (en) * 1982-04-02 1989-04-28 Nippon Electric Co
JPS59174760U (en) * 1983-05-09 1984-11-21 沖電気工業株式会社 Delayed detection circuit

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