TW337612B - Semiconductor device capable of selecting operation mode based on clock frequency - Google Patents

Semiconductor device capable of selecting operation mode based on clock frequency

Info

Publication number
TW337612B
TW337612B TW086109267A TW86109267A TW337612B TW 337612 B TW337612 B TW 337612B TW 086109267 A TW086109267 A TW 086109267A TW 86109267 A TW86109267 A TW 86109267A TW 337612 B TW337612 B TW 337612B
Authority
TW
Taiwan
Prior art keywords
clock
clk
semiconductor device
operation mode
device capable
Prior art date
Application number
TW086109267A
Other languages
English (en)
Inventor
Satoshi Etou
Masao Taguchi
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of TW337612B publication Critical patent/TW337612B/zh

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/0016—Arrangements for reducing power consumption by using a control or a clock signal, e.g. in order to apply power supply
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/0805—Details of the phase-locked loop the loop being adapted to provide an additional control signal for use outside the loop
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/12—Synchronisation of different clock signals provided by a plurality of clock generators
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
    • H03K5/26—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being duration, interval, position, frequency, or sequence
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • H03L7/0814—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the phase shifting device being digitally controlled
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • H03L7/0816—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the controlled phase shifter and the frequency- or phase-detection arrangement being connected to a common input

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Nonlinear Science (AREA)
  • Dram (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Memory System (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
TW086109267A 1997-01-20 1997-07-01 Semiconductor device capable of selecting operation mode based on clock frequency TW337612B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP00801397A JP4144913B2 (ja) 1997-01-20 1997-01-20 半導体装置

Publications (1)

Publication Number Publication Date
TW337612B true TW337612B (en) 1998-08-01

Family

ID=11681473

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086109267A TW337612B (en) 1997-01-20 1997-07-01 Semiconductor device capable of selecting operation mode based on clock frequency

Country Status (4)

Country Link
US (1) US6037813A (zh)
JP (1) JP4144913B2 (zh)
KR (1) KR100288679B1 (zh)
TW (1) TW337612B (zh)

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JP3281306B2 (ja) * 1996-12-18 2002-05-13 三星電子株式会社 メモリ装置のディジタル遅延同期回路
AU9798798A (en) * 1997-10-10 1999-05-03 Rambus Incorporated Power control system for synchronous memory device
CA2226061C (en) * 1997-12-31 2002-05-28 Logicvision, Inc. Method and apparatus for controlling power level during bist
US6072743A (en) * 1998-01-13 2000-06-06 Mitsubishi Denki Kabushiki Kaisha High speed operable semiconductor memory device with memory blocks arranged about the center
US6433607B2 (en) * 1998-01-21 2002-08-13 Fujitsu Limited Input circuit and semiconductor integrated circuit having the input circuit
JP2000059213A (ja) * 1998-08-12 2000-02-25 Nec Corp クロック再生装置
KR100524909B1 (ko) * 1998-09-07 2006-01-12 삼성전자주식회사 자동 모드 변환 신호 발생기와 이를 구비하는동기식 반도체 메모리 장치
JP3953206B2 (ja) * 1998-09-24 2007-08-08 富士通株式会社 高速クロックに対応可能な入力バッファを持つ集積回路装置
JP3226034B2 (ja) * 1999-01-06 2001-11-05 日本電気株式会社 インタフェース方式
US6542106B1 (en) * 2000-09-29 2003-04-01 Microchip Technology Incorporated Comparator programmable for high-speed or low-power operation
JP4620852B2 (ja) * 2000-10-02 2011-01-26 大日本印刷株式会社 Ｉｃチップ
US6741107B2 (en) * 2001-03-08 2004-05-25 Intel Corporation Synchronous clock generator for integrated circuits
JP2002300023A (ja) * 2001-04-02 2002-10-11 Mitsubishi Electric Corp 半導体集積回路装置
KR20030005771A (ko) * 2001-07-10 2003-01-23 삼성전자 주식회사 외부클락의 주기에 따라 지연시간을 조절할 수 있는ｄｌｌ 회로 및 이를 포함하는 메모리 장치
JP4141724B2 (ja) * 2002-04-05 2008-08-27 株式会社ルネサステクノロジ 半導体記憶装置
JP2003347926A (ja) * 2002-05-30 2003-12-05 Sony Corp レベルシフト回路、表示装置および携帯端末
KR100460459B1 (ko) * 2002-07-30 2004-12-08 삼성전자주식회사 향상된 테스트 모드를 갖는 반도체 메모리 장치
US6985400B2 (en) * 2002-09-30 2006-01-10 Infineon Technologies Ag On-die detection of the system operation frequency in a DRAM to adjust DRAM operations
JP4065183B2 (ja) 2002-11-18 2008-03-19 株式会社ルネサステクノロジ クロック信号伝達回路
KR100495916B1 (ko) * 2002-11-20 2005-06-17 주식회사 하이닉스반도체 클럭인에이블 버퍼를 구비한 반도체 장치
KR100520657B1 (ko) * 2003-03-19 2005-10-13 주식회사 하이닉스반도체 지연 고정 루프 회로에 적용되는 위상 비교기
JP2004362398A (ja) * 2003-06-06 2004-12-24 Matsushita Electric Ind Co Ltd 半導体集積回路
JP2005267821A (ja) * 2004-03-22 2005-09-29 Toshiba Corp 不揮発性半導体メモリ
JP2007156567A (ja) * 2005-11-30 2007-06-21 Toshiba Corp 情報処理装置、およびメモリ制御方法
KR100784907B1 (ko) * 2006-06-30 2007-12-11 주식회사 하이닉스반도체 Ｄｌｌ 회로 및 그 제어 방법
JP5228468B2 (ja) * 2007-12-17 2013-07-03 富士通セミコンダクター株式会社 システム装置およびシステム装置の動作方法
EP4053840A1 (en) * 2010-02-23 2022-09-07 Rambus Inc. Methods and circuits for dynamically scaling dram power and performance
US9910473B2 (en) 2013-03-14 2018-03-06 Silicon Storage Technology, Inc. Power management for a memory device
JP6585000B2 (ja) 2016-05-09 2019-10-02 ルネサスエレクトロニクス株式会社 半導体集積回路
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CN109036322B (zh) * 2018-09-26 2023-11-03 北京集创北方科技股份有限公司 输入缓冲器、控制方法、驱动装置以及显示装置

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US5805003A (en) * 1995-11-02 1998-09-08 Cypress Semiconductor Corp. Clock frequency synthesis using delay-locked loop

Also Published As

Publication number Publication date
JPH10209284A (ja) 1998-08-07
US6037813A (en) 2000-03-14
KR100288679B1 (ko) 2001-05-02
JP4144913B2 (ja) 2008-09-03
KR19980069817A (ko) 1998-10-26

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