TW310461B - - Google Patents

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Publication number
TW310461B
TW310461B TW085113173A TW85113173A TW310461B TW 310461 B TW310461 B TW 310461B TW 085113173 A TW085113173 A TW 085113173A TW 85113173 A TW85113173 A TW 85113173A TW 310461 B TW310461 B TW 310461B
Authority
TW
Taiwan
Prior art keywords
film
wiring
conductive film
concave portion
forming
Prior art date
Application number
TW085113173A
Other languages
English (en)
Chinese (zh)
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Application granted granted Critical
Publication of TW310461B publication Critical patent/TW310461B/zh

Links

Classifications

    • H10D64/011—
    • H10W20/048—
    • H10W20/033—
    • H10W20/059—
    • H10W20/425—
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/32—Processing objects by plasma generation
    • H01J2237/33—Processing objects by plasma generation characterised by the type of processing
    • H01J2237/338—Changing chemical properties of treated surfaces
    • H01J2237/3387—Nitriding
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/909—Controlled atmosphere
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49156—Manufacturing circuit on or in base with selective destruction of conductive paths
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Formation Of Insulating Films (AREA)
TW085113173A 1995-11-10 1996-10-29 TW310461B (enExample)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29297495 1995-11-10

Publications (1)

Publication Number Publication Date
TW310461B true TW310461B (enExample) 1997-07-11

Family

ID=17788842

Family Applications (1)

Application Number Title Priority Date Filing Date
TW085113173A TW310461B (enExample) 1995-11-10 1996-10-29

Country Status (3)

Country Link
US (2) US6260266B1 (enExample)
KR (1) KR100387693B1 (enExample)
TW (1) TW310461B (enExample)

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI579921B (zh) * 2009-09-09 2017-04-21 諾菲勒斯系統公司 增進低電阻率鎢／氮化鎢層附著力之方法
US9653353B2 (en) 2009-08-04 2017-05-16 Novellus Systems, Inc. Tungsten feature fill
US9754824B2 (en) 2015-05-27 2017-09-05 Lam Research Corporation Tungsten films having low fluorine content
US9953984B2 (en) 2015-02-11 2018-04-24 Lam Research Corporation Tungsten for wordline applications
US9978605B2 (en) 2015-05-27 2018-05-22 Lam Research Corporation Method of forming low resistivity fluorine free tungsten film without nucleation
US11348795B2 (en) 2017-08-14 2022-05-31 Lam Research Corporation Metal fill process for three-dimensional vertical NAND wordline
US11549175B2 (en) 2018-05-03 2023-01-10 Lam Research Corporation Method of depositing tungsten and other metals in 3D NAND structures
US11972952B2 (en) 2018-12-14 2024-04-30 Lam Research Corporation Atomic layer deposition on 3D NAND structures
US12002679B2 (en) 2019-04-11 2024-06-04 Lam Research Corporation High step coverage tungsten deposition
US12077858B2 (en) 2019-08-12 2024-09-03 Lam Research Corporation Tungsten deposition
US12237221B2 (en) 2019-05-22 2025-02-25 Lam Research Corporation Nucleation-free tungsten deposition
US12444651B2 (en) 2009-08-04 2025-10-14 Novellus Systems, Inc. Tungsten feature fill with nucleation inhibition

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4307592B2 (ja) * 1998-07-07 2009-08-05 Ｏｋｉセミコンダクタ株式会社 半導体素子における配線形成方法
KR100451493B1 (ko) * 1998-09-02 2004-12-04 주식회사 하이닉스반도체 반도체소자의금속배선형성방법
KR100330163B1 (ko) * 2000-01-06 2002-03-28 윤종용 반도체 장치의 텅스텐 콘택 플러그 형성 방법
US6486063B2 (en) * 2000-03-02 2002-11-26 Tokyo Electron Limited Semiconductor device manufacturing method for a copper connection
GB0024294D0 (en) * 2000-10-04 2000-11-15 Univ Cambridge Tech Solid state embossing of polymer devices
US6613667B1 (en) * 2001-05-02 2003-09-02 The Texas A&M University System Forming an interconnect of a semiconductor device
US6848177B2 (en) * 2002-03-28 2005-02-01 Intel Corporation Integrated circuit die and an electronic assembly having a three-dimensional interconnection scheme
US6908845B2 (en) * 2002-03-28 2005-06-21 Intel Corporation Integrated circuit die and an electronic assembly having a three-dimensional interconnection scheme
US20030183943A1 (en) * 2002-03-28 2003-10-02 Swan Johanna M. Integrated circuit die and an electronic assembly having a three-dimensional interconnection scheme
US7229918B2 (en) * 2005-02-14 2007-06-12 Infineon Technologies Ag Nitrogen rich barrier layers and methods of fabrication thereof
JP4441658B1 (ja) * 2008-12-19 2010-03-31 国立大学法人東北大学 銅配線形成方法、銅配線および半導体装置
US9012336B2 (en) * 2013-04-08 2015-04-21 Applied Materials, Inc. Method for conformal treatment of dielectric films using inductively coupled plasma
US9953857B2 (en) 2014-11-20 2018-04-24 International Business Machines Corporation Semiconductor device with buried local interconnects
KR20200101717A (ko) * 2019-02-20 2020-08-28 에스케이하이닉스 주식회사 반도체장치 및 그 제조 방법
US12027419B2 (en) * 2020-06-25 2024-07-02 Taiwan Semiconductor Manufacturing Company Limited Semiconductor device including liner structure

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Publication number Priority date Publication date Assignee Title
US4277321A (en) * 1979-04-23 1981-07-07 Bell Telephone Laboratories, Incorporated Treating multilayer printed wiring boards
US4230553A (en) * 1979-04-23 1980-10-28 Bell Telephone Laboratories, Incorporated Treating multilayer printed wiring boards
US4762728A (en) * 1985-04-09 1988-08-09 Fairchild Semiconductor Corporation Low temperature plasma nitridation process and applications of nitride films formed thereby
JP2776826B2 (ja) * 1988-04-15 1998-07-16 株式会社日立製作所 半導体装置およびその製造方法
JP2714847B2 (ja) 1989-03-15 1998-02-16 富士通株式会社 半導体装置の製造方法
ATE134070T1 (de) * 1989-09-26 1996-02-15 Canon Kk Verfahren zum herstellen einer abgeschiedenen schicht und verfahren zum herstellen einer halbleitervorrichtung
JPH03132022A (ja) 1989-10-18 1991-06-05 Hitachi Ltd 半導体装置の製造方法およびその装置
JP3132022B2 (ja) 1991-02-22 2001-02-05 スズキ株式会社 内燃機関のシリンダヘッド構造
WO1993023583A1 (fr) * 1992-05-14 1993-11-25 Mitsubishi Rayon Co., Ltd. Alliage amorphe et production
US5363550A (en) * 1992-12-23 1994-11-15 International Business Machines Corporation Method of Fabricating a micro-coaxial wiring structure
JPH06275623A (ja) 1993-03-24 1994-09-30 Kawasaki Steel Corp 半導体集積回路の配線構造体
US5656542A (en) * 1993-05-28 1997-08-12 Kabushiki Kaisha Toshiba Method for manufacturing wiring in groove
JP2591450B2 (ja) * 1993-11-10 1997-03-19 日本電気株式会社 半導体装置の製造方法
KR0124644B1 (ko) * 1994-05-10 1997-12-11 문정환 반도체소자의 다층금속배선의 형성방법
WO1995034092A1 (en) * 1994-06-03 1995-12-14 Materials Research Corporation A method of nitridization of titanium thin films
US5712193A (en) * 1994-12-30 1998-01-27 Lucent Technologies, Inc. Method of treating metal nitride films to reduce silicon migration therein
US5599739A (en) * 1994-12-30 1997-02-04 Lucent Technologies Inc. Barrier layer treatments for tungsten plug

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10103058B2 (en) 2009-08-04 2018-10-16 Novellus Systems, Inc. Tungsten feature fill
US9653353B2 (en) 2009-08-04 2017-05-16 Novellus Systems, Inc. Tungsten feature fill
US12444651B2 (en) 2009-08-04 2025-10-14 Novellus Systems, Inc. Tungsten feature fill with nucleation inhibition
TWI579921B (zh) * 2009-09-09 2017-04-21 諾菲勒斯系統公司 增進低電阻率鎢／氮化鎢層附著力之方法
US10529722B2 (en) 2015-02-11 2020-01-07 Lam Research Corporation Tungsten for wordline applications
US9953984B2 (en) 2015-02-11 2018-04-24 Lam Research Corporation Tungsten for wordline applications
US9978605B2 (en) 2015-05-27 2018-05-22 Lam Research Corporation Method of forming low resistivity fluorine free tungsten film without nucleation
US10546751B2 (en) 2015-05-27 2020-01-28 Lam Research Corporation Forming low resistivity fluorine free tungsten film without nucleation
US9754824B2 (en) 2015-05-27 2017-09-05 Lam Research Corporation Tungsten films having low fluorine content
US11348795B2 (en) 2017-08-14 2022-05-31 Lam Research Corporation Metal fill process for three-dimensional vertical NAND wordline
US11549175B2 (en) 2018-05-03 2023-01-10 Lam Research Corporation Method of depositing tungsten and other metals in 3D NAND structures
US11972952B2 (en) 2018-12-14 2024-04-30 Lam Research Corporation Atomic layer deposition on 3D NAND structures
US12002679B2 (en) 2019-04-11 2024-06-04 Lam Research Corporation High step coverage tungsten deposition
US12237221B2 (en) 2019-05-22 2025-02-25 Lam Research Corporation Nucleation-free tungsten deposition
US12077858B2 (en) 2019-08-12 2024-09-03 Lam Research Corporation Tungsten deposition

Also Published As

Publication number Publication date
US6260266B1 (en) 2001-07-17
US6664178B2 (en) 2003-12-16
KR970030369A (ko) 1997-06-26
US20010029667A1 (en) 2001-10-18
KR100387693B1 (ko) 2003-10-04

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MM4A Annulment or lapse of patent due to non-payment of fees