TW291562B - - Google Patents

Info

Publication number
TW291562B
TW291562B TW085105413A TW85105413A TW291562B TW 291562 B TW291562 B TW 291562B TW 085105413 A TW085105413 A TW 085105413A TW 85105413 A TW85105413 A TW 85105413A TW 291562 B TW291562 B TW 291562B
Authority
TW
Taiwan
Application number
TW085105413A
Original Assignee
Nippon Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co filed Critical Nippon Electric Co
Application granted granted Critical
Publication of TW291562B publication Critical patent/TW291562B/zh

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5692Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency read-only digital stores using storage elements with more than two stable states
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/08Address circuits; Decoders; Word-line control circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2211/00Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/563Multilevel memory reading aspects
    • G11C2211/5632Multilevel reading using successive approximation
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Read Only Memory (AREA)
TW085105413A 1995-04-28 1996-05-07 TW291562B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10518295A JP2689948B2 (ja) 1995-04-28 1995-04-28 多値メモリセルを有する半導体記憶装置

Publications (1)

Publication Number Publication Date
TW291562B true TW291562B (zh) 1996-11-21

Family

ID=14400542

Family Applications (1)

Application Number Title Priority Date Filing Date
TW085105413A TW291562B (zh) 1995-04-28 1996-05-07

Country Status (6)

Country Link
US (1) US5721701A (zh)
EP (1) EP0740305B1 (zh)
JP (1) JP2689948B2 (zh)
KR (1) KR100238741B1 (zh)
DE (1) DE69614912T2 (zh)
TW (1) TW291562B (zh)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6222762B1 (en) * 1992-01-14 2001-04-24 Sandisk Corporation Multi-state memory
US5903495A (en) * 1996-03-18 1999-05-11 Kabushiki Kaisha Toshiba Semiconductor device and memory system
EP0825611B1 (en) * 1996-08-22 2003-04-09 STMicroelectronics S.r.l. Multilevel non-volatile memory devices
US6857099B1 (en) 1996-09-18 2005-02-15 Nippon Steel Corporation Multilevel semiconductor memory, write/read method thereto/therefrom and storage medium storing write/read program
JP3204119B2 (ja) * 1996-09-30 2001-09-04 日本電気株式会社 不揮発性半導体メモリおよびそのデータ書込方法
JP2978813B2 (ja) * 1997-02-27 1999-11-15 日本電気アイシーマイコンシステム株式会社 半導体記憶回路
US5973957A (en) * 1997-09-16 1999-10-26 Intel Corporation Sense amplifier comprising a preamplifier and a differential input latch for flash memories
JPH11213691A (ja) * 1998-01-20 1999-08-06 Toshiba Corp 不揮発性半導体記憶装置
US6038166A (en) * 1998-04-01 2000-03-14 Invox Technology High resolution multi-bit-per-cell memory
US5973958A (en) * 1998-06-23 1999-10-26 Advanced Micro Devices, Inc. Interlaced storage and sense technique for flash multi-level devices
US6178114B1 (en) * 1999-01-12 2001-01-23 Macronix International Co., Ltd. Sensing apparatus and method for fetching multi-level cell data
JP3206591B2 (ja) * 1999-02-08 2001-09-10 日本電気株式会社 多値マスクromおよび多値マスクromの読み出し方法
JP4023953B2 (ja) 1999-06-22 2007-12-19 株式会社ルネサステクノロジ 不揮発性半導体記憶装置
US6707713B1 (en) * 2000-03-01 2004-03-16 Advanced Micro Devices, Inc. Interlaced multi-level memory
JP2001312898A (ja) 2000-04-28 2001-11-09 Mitsubishi Electric Corp しきい値解析システムおよびしきい値解析方法
US6483743B1 (en) 2001-06-18 2002-11-19 Intel Corporation Multilevel cell memory architecture
ITMI20022531A1 (it) * 2002-11-28 2004-05-29 St Microelectronics Srl Metodo di programmazione di celle di memoria non volatile multilivello e relativo circuito di programmazione
US20050035429A1 (en) * 2003-08-15 2005-02-17 Yeh Chih Chieh Programmable eraseless memory
US7180123B2 (en) * 2003-07-21 2007-02-20 Macronix International Co., Ltd. Method for programming programmable eraseless memory
US7132350B2 (en) * 2003-07-21 2006-11-07 Macronix International Co., Ltd. Method for manufacturing a programmable eraseless memory
US7463514B1 (en) 2007-06-21 2008-12-09 Intel Corporation Multi-level cell serial-parallel sense scheme for non-volatile flash memory
US8064253B2 (en) * 2009-09-15 2011-11-22 Toshiba America Research, Inc. Multi-valued ROM using carbon-nanotube and nanowire FET

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5846798B2 (ja) * 1976-12-27 1983-10-18 富士通株式会社 半導体記憶装置
GB2157489A (en) * 1984-03-23 1985-10-23 Hitachi Ltd A semiconductor integrated circuit memory device
JPS62223896A (ja) * 1986-03-26 1987-10-01 Seiko Epson Corp 多値レベル読取り専用メモリ
JP2586729B2 (ja) * 1990-11-19 1997-03-05 日本電気株式会社 半導体記憶装置
US5218569A (en) * 1991-02-08 1993-06-08 Banks Gerald J Electrically alterable non-volatile memory with n-bits per memory cell
US5497354A (en) * 1994-06-02 1996-03-05 Intel Corporation Bit map addressing schemes for flash memory

Also Published As

Publication number Publication date
EP0740305A3 (en) 1998-07-29
DE69614912D1 (de) 2001-10-11
JPH08297982A (ja) 1996-11-12
EP0740305A2 (en) 1996-10-30
DE69614912T2 (de) 2002-04-11
KR960038619A (ko) 1996-11-21
EP0740305B1 (en) 2001-09-05
KR100238741B1 (ko) 2000-01-15
US5721701A (en) 1998-02-24
JP2689948B2 (ja) 1997-12-10

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