TW202236167A - 製造帶有焊接電子元件之晶片卡模組之製程 - Google Patents

製造帶有焊接電子元件之晶片卡模組之製程 Download PDF

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Publication number
TW202236167A
TW202236167A TW110139419A TW110139419A TW202236167A TW 202236167 A TW202236167 A TW 202236167A TW 110139419 A TW110139419 A TW 110139419A TW 110139419 A TW110139419 A TW 110139419A TW 202236167 A TW202236167 A TW 202236167A
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Taiwan
Prior art keywords
solder
connection pads
substrate
chip
integrated circuit
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TW110139419A
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English (en)
Inventor
克里斯托夫 馬席爾
古勞姆 吉姆伯特
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法商琳森斯控股公司
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Publication of TW202236167A publication Critical patent/TW202236167A/zh

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Abstract

本發明揭示一種用於製造一晶片卡模組之製程。其包括一或多個操作，其中將一可熔融焊料沈積於形成於定位於一介電基板(9)之背側上之一導電材料層中之連接墊(16)上且藉由回焊該焊料來將至少一個電子元件連接至此等連接墊(16)。晶片卡模組使用此製程來獲得。晶片卡包括此一模組。

Description

製造帶有焊接電子元件之晶片卡模組之製程
本發明係關於晶片卡之領域。
晶片卡一般由其中收容包括一晶片(即，一積體電路)之一模組之一塑膠卡本體形成，晶片電連接至著眼於在具有或不具有接觸之情況下與一讀卡器通信之接點及/或一天線。除一天線及包括一晶片之一模組之外，其他電路系統組件及/或其他電子元件亦可整合至卡本體中。值得一提的是，用於讀取指紋之生物特徵感測器用於提高安全性或簡化晶片卡之使用。
然而，將電子元件整合至一晶片卡之本體中會在卡本體之各種構成層之層壓期間導致問題。具體言之，可能遇到之問題包含(例如)層壓期間之元件之劣化、可由一或多個元件插入於層之間導致之不雅觀凸起及意欲用於連接電子元件之連接區域之位置中之層壓之後的不精確性。
一個解決方案在於將至少某些元件整合至已包括晶片或意欲接納晶片之一模組中(例如，針對具有一模組上之複數個元件之晶片卡之實例，可參考文件US2019294943A1、CA2503688A1及US2019340398A1)。具體言之，此模組收容於一般在層壓卡本體之構成層之後銑削至卡本體中之一腔中。因此，例如，元件不經受一層壓操作。
本發明解決此背景且旨在至少部分促成改良用於製造包括除通常由此等模組承載之晶片之外的元件之晶片卡模組之製程。
因此，根據本發明，提供一種用於製造一晶片卡之一模組之製程，其包括由以下各者組成之操作： - 提供一介電基板，其在該基板之一第一主面上承載一第一導電材料層且在該基板之一第二主面上承載一第二導電材料層；及 - 在該基板之第一主面之側上將一積體電路緊固至該基板且將此積體電路連接至第一連接墊。
此製程進一步包括一或多個操作，其中將一可熔融焊料沈積於形成於該第一導電材料層中之第二連接墊上且藉由回焊事先沈積於該等第二連接墊上之該焊料來將至少一個電子元件連接至該等第二連接墊。
因此，可藉由本發明來在晶片卡模組之製造中使用可能對層壓敏感之電子元件。該積體電路可使用一導線接合或一覆晶技術來連接。當使用一覆晶技術來連接該晶片時，可使用一導電漿(conductive paste)或甚至使用一可熔融焊料及回焊該可熔融焊料之一操作(視情況地相同於允許連接一或多個其他電子元件之操作)來產生該連接。當使用導線接合來連接該晶片時，一給定載體上之兩個連接技術之組合(即，導線接合及回焊焊接)違背熟習技術者之偏見，熟習技術者認為該導線接合之前的一回焊步驟易於污染意欲用於該導線接合之該等連接墊，或相比而言，若事先連接該晶片，則回焊溫度會使該晶片降級。
用於製造一晶片卡模組之此製程視情況包括一個或一個以上以下特徵，各特徵被視為獨立於其他特徵或各特徵與一或多個其他特徵組合：
- 其包括其中在回焊該焊料之前將一焊料遮罩沈積於該基板之該第一主面上之一操作；
- 在其中將該積體電路連接至該等第一連接墊之操作之前實施回焊該焊料之該操作；替代地，在其中將該積體電路連接至該等第一連接墊之該操作之後實施回焊焊料材料之該操作；
- 使用導線來將該積體電路連接至該等第一連接墊；
- 該焊料具有包括於130°C至250°C之間的一熔點；
- 使用選自以下清單之一技術來沈積該焊料：噴印、接觸施配、針式轉印及網版印刷；
- 其包括以下一操作：將一囊封材料沈積於該積體電路及將此積體電路連接至該等第一連接墊之該等導線上且不由此囊封材料覆蓋該電子元件。
根據又一態樣，本發明係關於一種晶片卡模組，其包括：一介電基板，其在該基板之一第一主面上承載一第一導電材料層，在該基板之一第二主面上承載一第二導電材料層；一積體電路，其在該基板第一主面之側上牢固緊固至該基板且視情況使用導線來連接至第一連接墊。此模組進一步包括使用沈積及回焊於焊料連接第二墊上之一可熔融焊料來連接至形成於該第一導電材料層中之第二連接墊之至少一個可焊接電子元件。
此晶片卡模組視情況包括以下特徵之一者及/或另一者，各特徵被視為彼此獨立或與一或多個其他特徵組合：
- 該電子元件係一被動元件；
- 該焊料係可為包括來自以下清單之至少兩個元素之一合金：鉍、錫、銀及銅；
- 一囊封材料在不覆蓋該電子元件之情況下包圍該積體電路。
根據又一態樣，本發明係關於一種晶片卡，其包括一卡本體及其中收容使用根據本發明之一製程所製造之一模組之一腔。
圖1中展示根據本發明之一晶片卡1之一個實例。在此實例中，晶片卡1係呈ID-1格式之一銀行卡。此晶片卡1包括一第一模組2及一第二模組4，第一模組2包括一連接器3。第一模組2係(例如)滿足標準ISO 7810之一EMV模組(EMV代表歐陸卡(EuroPay)萬事達卡(MasterCard)威士(Visa))。連接器3允許安裝於第一模組2上之一電子晶片5 (參閱圖6)電連接至一讀卡器以在晶片5與讀卡器之間交換資料。
就雙介面晶片卡1 (即，能夠在具有或不具有接觸之情況下讀取之一晶片卡)而言，一天線整合至晶片卡1之本體6中。此天線(例如)連接至定位於第一模組2中之晶片。此天線允許資料在晶片5與一無接觸讀卡器之間無接觸交換。此天線或定位於卡本體6中之一電路之另一部分亦可電連接至整合至晶片卡1中之第二模組4。第二模組4係(例如)一生物特徵模組。此第二模組4 (例如)包括用於辨識指紋之一生物特徵感測器。第二模組4 (例如)使可判定由生物特徵感測器讀取之指紋是否對應於經認證以使用此晶片卡1之一使用者之指紋。在此情況中，可容許晶片5與一讀卡器之間的無接觸通信。其他元件(例如，一發光二極體)視情況收容於卡本體6中。
如圖2中所繪示，第一模組2及第二模組4經由產生於使用一介電載體所形成之一鑲嵌物上之一電路來通信。此電路可使用嵌入於介電載體中之一或多個導電導線，或其實使用蝕刻於與介電載體層壓之一導電材料層中之導電軌道，否則使用自層壓至介電載體之前的一導電材料層切割之導電軌道來形成。鑲嵌物及其電路接著與各種塑膠層(一或多個補償層、一或多個修整層、一或多個印刷層等等)層壓以形成一卡本體6。如所知，腔藉由在卡本體6中銑削來產生。第一模組2及第二模組4整合至此等腔中，在該等腔中其等連接至先前併入至卡本體6中之電路。
本發明之一個優點係其允許較佳地不放置於卡本體6中之一或多個電子元件7在第一模組2中集合在一起。為此，第一模組2依一特定方式製造。
圖3至圖5展示一印刷電路板8之一分段。此分段對應於意欲形成一模組之印刷電路板8之區域，但印刷電路板8包括相同或類似於此等圖中所展示之區域之諸多區域。此等區域以一印刷電路板條帶之寬度上之一給定節距及視情況以此印刷電路板條帶之長度上之另一節距重複。條帶使用一製程(其一實例將在下文描述)來連續捲帶式處理。
第一模組2包括一介電載體或基板9。此介電基板9具有兩個主面：稱為「背側」或「接合側」之一第一面及稱為「前側」或「接觸側」之一第二面11。導電連結區12使用下文將描述之一製程來產生於第一主面10及第二主面11之各者上。在第二面11 (前側)上，導電連結區12基本上對應於意欲經由與一讀卡器接觸來建立一暫時通信之接點13。在第一面10 (背側)上，導電連結區12對應於軌道14及連接墊15、16。連接墊15、16用於連接晶片5及緊固至第一面10之一或多個電子元件7。第一連接墊15之若干者用於使用晶片5之導電連接導線17 (參閱圖6)來連接至導電軌道14。第二連接墊16之若干者用於藉由焊接一或多個電子元件7來連接至導電軌道14。此外，導電軌道14將第一墊15及第二墊16電連接至意欲將第一模組2連接至整合至卡本體6中之電路之連接連結區19或允許透過基板9來產生與接點13之一連接之連接井18。
如圖4及圖5中所繪示，一焊料遮罩20圍繞第二連接墊16放置。焊料遮罩沈積於基板9上。其部分覆蓋連接至第二連接墊16之導電軌道14，但不覆蓋第二連接墊16。在NSMD組態(NSMD代表非焊料遮罩界定)中，留下第二連接墊16與焊料遮罩20之間的圍繞第二連接墊16之一空間，其寬度(例如)包括於50 μm至200 μm之間。在SMD組態(SMD代表焊料遮罩界定)中，一重疊區域覆蓋第二連接墊16，重疊區域之寬度(例如)包括於50 μm至200 μm之間。
已知在SMT製程(SMT代表表面安裝技術)之實施期間，一非所要效應會發生於意欲將一元件之端子焊接至印刷電路板墊之回焊操作期間。此非所要效應(稱為立碑或曼哈頓(Manhattan)效應或甚至晶片翹升)引起元件旋轉遠離印刷電路板之平面。旋轉元件之端子之一者可由焊料連接但另一者斷接(離開回焊焊料)。圖5展示第二連接墊16附近之印刷電路板之一分段。此等連接墊16具有一長度X、一寬度Y且間隔開一距離S。
發明者已觀察到，針對0201類型(根據國際EIAJ標準之編碼格式：長度及寬度以百分之幾英寸為單位，碼之前2個或前3個數位表示長度且最後2個數位表示寬度。因此，針對一0201元件，尺寸係：元件之長度係0.6±0.03 mm，元件之寬度係0.3±0.03 mm且平行於長度之所焊接之端子之尺寸係0.15±0.05 mm)之一元件，在等於400 μm之X之一值、等於400 μm之Y之一值及等於400 μm之一距離S之情況下，立碑效應發生於10%以上之案例中。相比而言，發明者亦已發現，針對0201類型之一元件，若X等於400±50 μm，Y等於300±50 μm且S等於300±50 μm，則立碑效應僅發生於1%以下之情況中。因此，此文件中所描述之一實施例之實例中有利地採用X、Y及S之上述值。更一般而言，若連接墊16之間的距離S小於、等於或接近對應於元件之長度之距離減去兩倍平行於長度之所焊接之端子之尺寸，則減小立碑效應。換言之，電子元件7具有兩個縱向端及焊接於各縱向端處之一端子，且端子之間的距離大於、等於或接近各自連接墊16之間的距離S。下文將指示更一般元件尺寸。將可視情況修改X、Y及S之值，已知：一方面，若距離S減小，則元件更多地靜置於經回焊焊料上，且另一方面，若連接墊16之面積減小，則傾向於使元件旋轉遠離之力變小。此等兩個效應之任一者或兩者允許立碑效應之出現頻率受到限制。
下文將參考圖6來描述用於製造一第一模組2之一實施例之一個實例之一製程之一實例。
此製程包括提供包括由介電材料製成之一基板9之一複合材料100，由一第一導電材料製成之一第一層21或箔(參閱圖6a)層壓至該基板。例如，基板9之介電材料係聚醯亞胺或環氧樹脂玻璃複合物，其厚度包括於25微米至100微米之間且較佳地等於100微米，且導電材料之第一層21由銅或銅之一合金製成，銅或銅之一合金之厚度包括於12微米至70微米之間且較佳地等於35微米。
為達成從工業角度看高效能之根據本發明之製程之一實施方案，此複合材料100有利地成捲提供且製程捲帶式實施。複合材料100可依一包層(例如，一銅包層)之形式提供。替代地，其可依包括一介電基板9、一第一導電材料層21及介電基板與第一導電材料層之間的一黏著劑材料(例如，環氧樹脂)層之一多層複合物(圖中未展示)之形式提供。黏著劑材料(例如)具有包括於10微米至25微米之間的一厚度。此多層複合物100經歷層壓。黏著劑材料可經歷一連續乾燥操作以在其沈積時移除存在於配方中之溶劑。因此，黏著劑材料層允許第一導電材料層緊固至介電基板9之第一面10。層壓之後可進行熱固化黏著劑材料之一操作。使用一分層複合材料(不具有基板之第一主面10與第一導電材料層21之間的黏著劑層)係較佳的，因為其可允許避免下文將描述之回焊操作期間之黏著劑之流動問題且因為其可允許避免將晶片5連接至連接墊之操作期間之連接導線17之黏附問題。
製程亦有利地包括其中一黏著劑材料層(該層不同於上文所解釋之可已沈積之層)以(例如)包括於10微米至25微米之間的一厚度沈積於基板9之第二主面11上之一操作(圖中未展示)。此黏著劑材料(例如，環氧樹脂)層亦可經歷一連續乾燥操作以在其沈積期間移除存在於配方中之溶劑。
因此，複合材料100有利地包括在其第一主面10上承載一第一導電材料層21且在其第二主面11上承載一黏著劑材料層之一介電基板9。依以上形成之複合材料100接著經歷一穿孔操作(其有利地為機械的但其可視情況藉由雷射切割來實施)以形成連接井18 (參閱圖6b)及驅動孔22 (參閱圖3及圖4)。連接井18及驅動孔22正好穿過複合材料100 (基板9、第一導電材料層21、基板與第一導電材料層21之間的選用黏著劑材料層及另一黏著劑材料層)。
依以上穿孔之複合材料100經歷與一第二導電材料層23層壓之一操作。此第二導電材料層23閉塞至少特定連接井18以形成盲孔(參閱圖6c)。
接著進行光微影操作，其允許連接墊15、16及連接軌道14產生於第一主面10上且接點13產生於第二主面11上。此等步驟(例如)包括以下操作：將一乾燥光阻劑膜層壓至第一導電材料層21及第二導電材料層23以覆蓋基板9之第一主面10及第二主面11；透過遮罩來暴露此等光阻劑膜以使光阻劑顯影且蝕刻第一導電材料層21及第二導電材料層23之特定區域以形成連接墊15、16、連接軌道14或任何其他圖案。
替代地，藉由切割或蝕刻第一導電材料層21來產生連接墊15、16及連接軌道14 (引線框技術)，然後將連接墊15、16及連接軌道14層壓至介電基板9之第一主面10。
電沈積(例如，銅、鎳、金、鈀、銀或其合金)金屬層24之操作有利地實施於基板9之第一主面10及第二主面11之兩者或任一者上。此等沈積(例如)意欲促進將連接導線17焊接至連接墊15、16。
接著，圍繞意欲接納一焊料25之第二連接墊16沈積一焊料遮罩20 (參閱圖6e及圖6f)。焊料遮罩20有利地由一光可成像環氧樹脂材料製成。此更精確地允許(值得一提的是，捲帶式)產生環繞第二連接墊16之圖案。焊料遮罩20具有包括於13微米至58微米之間且較佳地等於38微米之一厚度。
接著進行將一焊料25沈積於由焊料遮罩20環繞且意欲連接至一電子元件7之第二連接墊16上之一操作(參閱圖6f及圖6g)。例如，焊料25由稱為「SAC 305」且其熔點係約220°C之錫(96.5%)、銀(3%)及銅(0.5%)之一合金組成。沈積一焊料25之此操作(例如)藉由接觸施配或藉由噴印或藉由網版印刷或藉由針式轉印來實施。當電子元件7之大小較小時，藉由噴印或接觸施配來沈積係有利的，因為焊料25之液滴之大小必須小至足以使元件之放置可行及可靠。例如，針對0201或01005編碼格式之元件之放置，期望焊料25之液滴之直徑不超過200微米，此藉由噴印或接觸施配比藉由網版印刷更可易於達成。
接著，將一或多個電子元件7沈積於焊料25之一液滴已事先沈積於其上之第二連接墊16上(參閱圖6g)。一或多個電子元件7係(例如)被動元件。更特定言之，允許匹配存在於卡本體6中且連接至第一模組2之天線電路之電容之電容器可能係一問題。例如，此等電子元件7具有一大體上平行六面體形狀，其中一總長度包括於0.4 mm至1.0 mm之間，一寬度包括於0.2 mm至0.5 mm之間，且一高度包括於0.2 mm至0.5 mm之間。在此等平行六面體之各縱向端處形成導電端子，其等在電子元件7之整個寬度及整個高度上及具有對應於此等電子元件7之長度之尺寸之一分段上延伸。此等電子元件7使用一取置技術來放置於第二連接墊16上。實施此等可焊接電子元件7比實施使用導線來連接之電子元件7一般花費少。在圖4中，已展示連接墊15之兩個區域26、27。在一第一區域26中，已產生兩個連接墊15以將一個電子元件7連接於其等之間。在一第二區域27中，已產生四個連接墊15以連接兩個電子元件7。因此，可取決於要求來連接可變數目個電子元件7。
接著，使事先獲得之電路以具有250°C之一峰值之一溫度分佈經受一回焊以回焊沈積於第二連接墊16上之焊料25之液滴。焊料遮罩20允許控制回焊操作期間之焊料25之液滴之散佈及高度。
接著，將一晶片5沈積於基板之第一面上且使用導電導線17來將晶片5連接至第二連接墊16。此連接由超音波達成。
接著，將一囊封材料26 (一樹脂)沈積於晶片5及導線17上以保護其等。為不將過多厚度添加至第一模組2，可不將囊封材料26沈積於電子元件7上。替代地，亦將囊封材料26沈積於一或多個電子元件7上。視需要在卡本體6中將其中必須收容第一模組2之腔銑削至一更大深度。
所有上述操作有利地連續捲帶式實施。
在以上描述中，在放置及連接電子元件7之操作之後實施放置及連接晶片5之操作。根據一個變體，顛倒此等操作之順序。
上文描述一種製程，其包括提供包括由介電材料製成之一基板9之一複合材料100，由一第一導電材料製成之一第一層21或箔層壓至基板9，接著在連接井18之穿孔之後將一第二導電材料層23添加至該基板。替代地，製程包括提供包括第一導電材料層及第二導電材料層層壓至其各面之一介電基板或載體之一複合材料(未繪示)。接著，使用一雷射束穿過第一導電材料層及基板形成連接井。
1:晶片卡 2:第一模組 3:連接器 4:第二模組 5:晶片/積體電路 6:卡本體 7:電子元件 8:印刷電路板 9:基板 10:第一主面 11:第二主面 12:導電連結區 13:接點 14:軌道 15:第一連接墊 16:第二連接墊 17:導線 18:連接井 19:連結區 20:焊料遮罩 21:第一導電材料層 22:驅動孔 24:電沈積金屬層 25:焊料 26:第一區域/囊封材料 27:第二區域 100:複合材料
將在閱讀參考附圖之以下詳細描述之後明白本發明之進一步態樣、目標及優點，附圖依非限制性實例方式給出且其中： 圖1以透視圖示意性展示一晶片卡之一實例； 圖2示意性展示一晶片卡(諸如圖1中所繪示之晶片卡)中之電路系統及元件之組織之一實例； 圖3以立視圖示意性展示經由其前側所觀看之對應於根據本發明之一模組之一實施例之一實例之一印刷電路板之一分段； 圖4以立視圖示意性展示經由其背側所觀看之對應於圖3中所繪示之模組之一實施例之實例之一印刷電路板之一分段； 圖5示意性展示圖4之一細節； 圖6示意性展示根據本發明之用於製造一晶片卡模組之一製程之一實例之各種步驟。
8:印刷電路板
9:基板
10:第一主面
14:軌道
15:第一連接墊
16:第二連接墊
18:連接井
19:連結區
20:焊料遮罩
22:驅動孔
26:第一區域/囊封材料
27:第二區域

Claims (16)

  1. 一種用於製造一晶片卡(1)之一模組(2)之製程，其包括由以下組成之操作： 提供一介電基板(9)，其在該基板(9)之一第一主面(10)上承載一第一導電材料層(21)且在該基板(9)之一第二主面(11)上承載一第二導電材料層(23)； 在其第一主面(10)之側上將至少一個積體電路(5)緊固至該基板(9)；及將該至少一個積體電路(5)連接至第一連接墊(15)， 該製程之特徵在於其進一步包括一或多個操作，其中將一可熔融焊料(25)沈積於形成於該第一導電材料層(21)中之第二連接墊(16)上且藉由回焊該焊料(25)來將至少一個電子元件(7)連接至該等第二連接墊(16)。
  2. 如請求項1之製程，其包括其中在回焊該焊料(25)之前將一焊料遮罩(20)沈積於該基板(9)之該第一主面(10)上之一操作。
  3. 如請求項1或2之製程，其中在其中將該積體電路(5)連接至該等第一連接墊(15)之操作之前實施回焊該焊料(25)之該操作。
  4. 如請求項1或2之製程，其中在其中將該積體電路(5)連接至該等第一連接墊(15)之該操作之後實施回焊該焊料(25)之該操作。
  5. 如請求項1之製程，其中使用導線(17)來將該積體電路(5)連接至該等第一連接墊。
  6. 如請求項1之製程，其中該焊料(25)具有包括於130°C至250°C之間的一熔點。
  7. 如請求項1之製程，其中使用選自以下清單之一技術來沈積該焊料(25)：噴印、接觸施配、針式轉印及網版印刷。
  8. 如請求項1之製程，其包括將一囊封材料(26)沈積於該積體電路(5)上且不由此囊封材料(26)覆蓋該電子元件(7)之一操作。
  9. 如請求項1之製程，其中該等第二連接墊(16)具有等於400±50 μm之一長度(X)、等於300±50 μm之一寬度(Y)且其中該等第二連接墊(16)之間的距離(S)等於300±50 μm。
  10. 一種晶片卡模組，其包括：一介電基板(9)，其在該基板(9)之一第一主面(10)上承載一第一導電材料層(21)，在該基板之一第二主面(11)上承載一第二導電材料層(23)；一積體電路(5)，其在該基板之第一主面(10)之該側上牢固緊固至該基板(9)且連接至第一連接墊(15)，該晶片卡模組之特徵在於其進一步包括使用沈積及回焊於該等第二連接墊(16)上之一可熔融焊料(25)來連接至形成於該第一導電材料層(21)中之第二連接墊(16)之至少一個可焊接電子元件(7)。
  11. 如請求項10之晶片卡模組，其中該電子元件(7)係一被動元件。
  12. 如請求項10或11之晶片卡模組，其中該焊料(25)係包括來自以下清單之至少兩個元素之一合金：鉍、錫、銀及銅。
  13. 如請求項10之晶片卡模組，其中一囊封材料(26)在不覆蓋該電子元件(7)之情況下包圍該積體電路(5)。
  14. 如請求項10之晶片卡模組，其中該電子元件(7)具有兩個縱向端及焊接於各縱向端處之一端子，該等端子之間的距離大於或等於各自連接墊(16)之間的距離(S)。
  15. 如請求項14之晶片模組，其中該等第二連接墊(16)具有等於400±50 μm之一長度(X)、等於300±50 μm之一寬度(Y)且其中該等第二連接墊(16)之間的距離(S)等於300±50 μm。
  16. 一種晶片卡，其包括一卡本體(6)及其中收容如請求項10至14之一者之一模組之一腔。
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