TW202122270A - 模具底部填充封裝用的多層片材、模具底部填充封裝方法、電子元件安裝基板及電子元件安裝基板的製造方法 - Google Patents

模具底部填充封裝用的多層片材、模具底部填充封裝方法、電子元件安裝基板及電子元件安裝基板的製造方法 Download PDF

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TW202122270A
TW202122270A TW109126344A TW109126344A TW202122270A TW 202122270 A TW202122270 A TW 202122270A TW 109126344 A TW109126344 A TW 109126344A TW 109126344 A TW109126344 A TW 109126344A TW 202122270 A TW202122270 A TW 202122270A
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Taiwan
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layer
multilayer sheet
electronic component
aforementioned
mold
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TW109126344A
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森大輔
淺原正宏
菅克司
野村英一
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日商長瀬化成股份有限公司
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Publication of TW202122270A publication Critical patent/TW202122270A/zh

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Abstract

本發明的課題在於提供一種在電極間滲入性良好的模具底部填充封裝用的多層片材。為了解決前述課題，本發明所提供之模具底部填充封裝用的多層片材係具備作為最外層之(A)層，且(A)層包括測定溫度在125℃、測定時間在0秒至100秒時之tanδ(損耗正切)之極大值為3以上之樹脂組成物。

Description

模具底部填充封裝用的多層片材、模具底部填充封裝方法、電子元件安裝基板及電子元件安裝基板的製造方法
本發明係有關一種模具底部填充封裝用的多層片材以及模具底部填充封裝方法。
隨著電子設備之小型化與薄型化的發展，設置於電路板(circuit board)的積體電路(Integrated Circuit；IC)也變得需要節省空間，再者，為了快速傳遞大量的訊號也產生了高密度化的需求。鑒於為了快速傳遞大量的訊號之高密度化，半導體晶片(semiconductor chip)等的電子元件(以下稱為「電子元件」)及封裝基板(package substrate)等的連接，近年來大多採用易於多接腳(pin)化或易於高速化的覆晶(flip chip)之連接方式。一般而言，為了阻擋外部的灰塵或濕氣，係利用封裝樹脂等對電子元件進行封裝，對於透過覆晶連接方式被連接之電子元件的封裝則利用具流動性的液狀或漿體(slurry)狀的封裝材料在電子元件與封裝基板的間隙施行底部填充(underfill)之後，再利用其他液狀或漿體狀之封裝材料或封裝膜來進行包覆成型(overmold)之方法。
由於在施行該等底部填充後，執行包覆成型的方法之步驟數多又耗費工時，因此發明專利文獻1提出了能夠同時進行底部填充及包覆成型的模具底部填充(mold underfill)材料。〔先前技術文獻〕 〔發明專利文獻〕
〔發明專利文獻1〕日本特開第2015-71670號公報。
〔發明所欲解決之課題〕
然而，近年來使用在IoT(物聯網)或自動駕駛等的積體電路係為了使電子元件更高密度化而透過大量的電極進行與基板等的連接。因此，即使在一個晶片等中，電極間彼此的距離也變得更狹窄，而習知的模具底部填充封裝材料已無法充分地滲入至電極間。 在此，本發明的課題即在於提供一種在電極間滲入性良好的模具底部填充封裝用的多層片材。〔解決課題之技術手段〕
本發明人等針對上述課題致力研究的結果，研發出能夠解決上述課題之具備將包括具有特定的tanδ(loss tangent；損耗正切)之樹脂組成物之(A)層作為最外層之多層片材，藉此完成了本發明。亦即，本發明係下述之多層片材。
用以解決上述課題的本發明之模具底部填充封裝用的多層片材係具備作為最外層之(A)層，且前述(A)層係包括測定溫度在125℃、測定時間在0秒至100秒時之tanδ(損耗正切)之極大值為3以上之樹脂組成物之層。 tanδ(損耗正切)係表示樹脂組成物中之彈性的性質與黏性的性質之比例者。在對電極間彼此的距離較狹窄的半導體晶片等之電子元件進行底部填充的情況下，僅有黏度小則對於最深部之滲入性仍然不足。為了更滿足對於最深部之滲入性，則亦需要彈性力來作為從後方擠壓正在滲入的材料的力。含有本發明之包括界定了上述tanδ(損耗正切)的極大值之樹脂組成物的(A)層之多層片材，係能夠在對電極間的距離更狹窄之電子元件進行模具底部填充之際，發揮優異的滲入性。 進一步地，由於具有片狀之形狀，故不需要在模具底部填充封裝中注入液狀等的樹脂之步驟。因此，相較於轉注成形方式(transfer molding method)的模具底部填充封裝，更能作為孔洞(void)少的電子元件安裝基板。
又，作為本發明之模具底部填充封裝用的多層片材之一實施態樣，係前述(A)層含有填料，且前述填料的最大粒徑為20µ m以下。 根據此特徵，係能夠對電極間的距離更狹窄之電子元件發揮更優異的滲入性。
又，作為本發明之模具底部填充封裝用的多層片材之一實施態樣，係在前述(A)層中含有體積粒徑分佈之累積體積50%中之中值粒徑(median particle size)(D50)(以下稱為「中值粒徑」)為10µ m以下之硬化加速劑(hardening accelerator)。 根據此特徵，係能夠對電極間的距離更狹窄之電子元件發揮更優異的滲入性。
又，作為本發明之模具底部填充封裝用的多層片材之一實施態樣，前述(A)層的厚度係為10µ m至500µ m。 根據此特徵，係可抑制電子元件的翹曲(warping)。進一步地，樹脂變得容易滲入至電子元件下方，而能夠發揮更優異的滲入性。
又，作為本發明之模具底部填充封裝用的多層片材之一實施態樣，係具備(B)層，且前述(B)層係包括滿足下列式(1)之樹脂組成物之層； 40000≦α×E’≦250000 [Pa/K]           (1) 於前述式(1)中： 「α」係表示於175℃進行1小時的硬化處理後之熱硬化物在80℃以下時的熱膨脹係數α [ppm/K]； 「E’」係表示前述熱硬化物在25℃時之貯藏彈性係數E’ [GPa]。 雖然電子元件會有因樹脂硬化時的熱而產生形狀變化的情形，但具備包括了滿足式(1)之樹脂組成物的(B)層之多層片材係可隨動於前述電子元件的形狀變化，而能夠在發揮優異的滲入性之同時，也抑制翹曲的狀況。 具體而言，熱膨脹係數(thermal expansion coefficient)係表示片材的長度配合溫度的上升而產生變化的比率，貯藏彈性係數(storage elastic modulus)係表示片材的剛性。例如在式(1)的數值範圍中，在熱膨脹係數α大的情況下，貯藏彈性係數E’變小，而可使片材的剛性變小。由此，片材便能夠隨動於電子元件的形狀變化，並得以緩和因電子元件的熱所導致的應力。藉此得以抑制電子元件的翹曲。
又，作為本發明之模具底部填充封裝用的多層片材之一實施態樣，係多層片材具備含有70質量%以上的填料之(B)層，且前述(B)層的厚度相對於前述(A)層的厚度之比值(B/A)係1.0至80。 根據此特徵，係能夠對電極間的距離更狹窄之電子元件發揮更優異的封裝性，並能夠對經封裝的電子元件進一步發揮低翹曲性。
用以解決上述課題之本發明的模具底部填充封裝方法，係電子元件安裝基板之模具底部填充封裝方法，其具備準備經覆晶安裝有具備電極的高度(h)在5µ m至250µ m，電極間的寬度(w)在5µ m至500µ m之電極的電子元件之基板的步驟；準備具備(A)層作為最外層之多層片材的步驟；以前述(A)層與電子元件及基板接觸的方式載置前述多層片材的步驟；以及將經載置的前述多層片材進行加熱壓縮的步驟。 此外，前述(A)層係包括測定溫度在125℃、測定時間在0秒至100秒時之tanδ(損耗正切)之極大值為3以上之樹脂組成物之層。 由於本發明之模具底部填充封裝方法係使用了具備上述(A)層之多層片材，因此能夠更有效率地滲入至電子元件安裝基板的電極間，而得以提供更優異的封裝方法。
又，作為本發明之模具底部填充封裝方法的一實施態樣，係前述(A)層含有填料，且前述填料的最大粒徑係在前述電極的高度(h)及前述電極間的寬度(w)以下。 根據此特徵，藉由(A)層中之填料的最大粒徑在電極的高度(h)及電極間的寬度(w)以下，能夠使含有(A)層之多層片材更有效率地滲入至電子元件安裝基板的電極間，且能夠抑制電子元件安裝基板的翹曲。
於用以解決上述課題的本發明之電子元件安裝基板中，前述模具底部填充封裝係透過具備(A)層作為最外層之多層片材而進行之封裝。 此外，前述(A)層係包括測定溫度在125℃、測定時間在0秒至100秒時之tanδ(損耗正切)之極大值為3以上之樹脂組成物之層。 根據此特徵，由於藉由具備上述(A)層之多層片材而可更有效率地滲入至安裝有電子元件之電子元件安裝基板的電極間，因此能夠提供耐熱性或耐濕性優異的電子元件安裝基板。
用以解決上述課題的本發明之電子元件安裝基板的製造方法，係具備準備經覆晶安裝有電子元件之基板的步驟；準備具備(A)層作為最外層之多層片材的步驟；以前述(A)層與電子元件及基板接觸的方式載置前述多層片材的步驟；以及將經載置的前述多層片材進行加熱壓縮的步驟。 此外，前述(A)層係包括測定溫度在125℃、測定時間在0秒至100秒時之tanδ(損耗正切)之極大值為3以上之樹脂組成物之層。 根據此特徵，由於藉由具備上述(A)層之多層片材能夠更有效率地滲入至電子元件安裝基板的電極間，因此能夠提供耐熱性或耐濕性優異的電子元件安裝基板的製造方法。〔發明之功效〕
藉由本發明，能夠提供在電極間的滲入性良好之模具底部填充封裝用的多層片材。
以下，將針對本發明的較佳實施態樣進行詳細的說明。然而，本發明並非由以下的實施態樣所限定者。
[模具底部填充封裝用的多層片材] 本發明之模具底部填充封裝用的多層片材係具備(A)層作為最外層，且(A)層係包括測定溫度在125℃、測定時間在0秒至100秒時之tanδ(損耗正切)的極大值為3以上之樹脂組成物之層。 模具底部填充封裝係利用覆晶連接等而將被連接之電子元件與基板進行封裝的一種方法，係指將執行電極部分之封裝的底部填充封裝與執行包括電子元件之全體的封裝之包覆成型封裝一起進行的封裝方法。
＜(A)層＞ 本發明的多層片材係具備包括測定溫度在125℃、測定時間在0秒至100秒時之tanδ(損耗正切)之極大值為3以上之樹脂組成物之(A)層作為最外層。 本發明之於最外層具備包括界定了tanδ(損耗正切)的極大值之樹脂組成物的(A)層之多層片材，係能夠在對電極間的距離更狹窄之電子元件進行模具底部填充之際，發揮優異的滲入性。 在此，最外層係指在多層片材中位於最外面的層，例如係與空氣等之大氣接觸的層。於此情況下，離型膜或離型片不屬於最外層。而且，本發明之(A)層係在模具底部填充封裝中，以與電子元件及基板直接接觸的方式載置的層。 又由於具備(A)層在最外層，而使(A)層係以與電子元件及基板接觸的方式被載置並進行封裝，藉此得以發揮優異的封裝性。 作為tanδ(損耗正切)之極大值，較佳地係5以上，更佳地係7以上。雖然tanδ(損耗正切)的極大值未特定有任何上限，但較佳地係60以下，更佳地係50以下。
構成(A)層之樹脂組成物的tanδ的極大值係可藉由填料的含量或熱硬化性樹脂或硬化劑的種類來控制。可藉由例如，增加填料的含量來使極大值變小，或是減少填料的含量來使極大值變大。又藉由將加熱時會變成低黏度之結晶性環氧樹脂(crystalline epoxy resin)或液態環氧樹脂等作為熱硬化性樹脂使用，或是藉由使用低分子量的酚(phenol)、結晶酸酐(crystalline acid anhydride)、液態酚等之低黏度的硬化劑，而可使tanδ的極大值在3以上。 於本發明中之構成(A)層的樹脂組成物之tanδ的極大值，係使用黏彈性測定裝置(viscoelasticity measuring device)(例如TAInstruments公司製，ARES-LS2)在測定溫度為125℃、測定時間為0秒至100秒、頻率為1 Hz的條件下對直徑25 mmΦ之試片進行測定所獲得的值。
進一步地，(A)層較佳地係含有填料。使用於(A)層之填料並不特別限定，但可列舉熔融二氧化矽(molten silica)或結晶二氧化矽等二氧化矽、氧化鋁(alumina)、滑石(talc)、碳酸鈣(calcium carbonate)、鈦白(titanium white)、鐵丹(rouge)、碳化矽(silicon carbide)、氮化硼(boron nitride；BN)、玻璃珠(glass beads)等。該等可單獨使用亦可兩種以上合併使用。 從提高在電極間的滲入性之觀點來看，較佳地係使用二氧化矽粉末，而在二氧化矽粉末中，更佳地係使用熔融二氧化矽粉末。作為熔融二氧化矽粉末，雖然可列舉球狀熔融二氧化矽粉末、粉碎熔融二氧化矽粉末，但從流動性的觀點來看，特佳地係使用球狀熔融二氧化矽粉末，且更佳地係真球度(sphericity)高者。 再者，藉由含有填料，係可抑制電子元件的翹曲。
進一步地，上述填料亦可使用事先使矽烷耦合劑(silane coupling agent)在表面上反應者。藉由使用使矽烷耦合劑在表面上反應之填料，係可提升在樹脂組成物中的分散性。在使用矽烷耦合劑時之調配量，係相對於100質量份的填料，較佳地為0.05質量份至5質量份，更佳地為0.1質量份至3質量份。
於(A)層中，前述填料的含量較佳地係30質量%以上。作為下限值，更佳地係73質量%以上，再佳地係76質量%以上。作為上限值，更佳地係93質量%以下，再佳地係85質量%以下。藉由使填料的含量在上述範圍，係可使tanδ(損耗正切)之極大值在3以上。此外，在填料的含量為30%以上的情況下，則有提升樹脂組成物的加工性之趨勢。
前述填料的中值粒徑較佳地係例如0.1µ m至30µ m。作為下限值，更佳地係0.1µ m以上，再佳地係0.5µ m以上。作為上限值，更佳地係20µ m以下，再佳地係10µ m以下。
又在(A)層中，前述填料的最大粒徑係例如小於電極的高度或小於電極的寬度，較佳地在20µ m以下。作為上限值，更佳地在15µ m以下，再佳地在10µ m以下。 藉由使(A)層中的填料之最大粒徑在20µ m以下，係可進一步提升在電極間的滲入性。 此外，上述中值粒徑或最大粒徑係根據例如使用雷射繞射散射型粒徑分布測定裝置(laser diffraction scattering type particle size distribution measuring device)對自母群(parent population)任意抽選的樣品進行測定而可導出的數值。
進一步地，雖然未特別限定構成(A)層之素材，但較佳地為樹脂，更佳地為熱硬化性樹脂。 作為熱硬化性樹脂係可列舉如環氧樹脂、(甲基)丙烯酸樹脂((meta)acrylic resin)、酚醛樹脂(phenolic resin)、三氯氫胺樹脂(melamine resin)、聚矽氧樹脂(silicone resin)、脲樹脂(urea resin)、胺甲酸乙酯樹脂(urethane resin)、乙烯酯系樹脂(vinylester resin)、不飽和聚酯樹脂(unsaturated polyester resin)、鄰苯二甲酸二烯丙酯樹脂(diallyl phthalate resin)、聚醯亞胺樹脂(polyimide resin)等。該等係可單獨使用一種亦可兩種以上組合使用。為了將構成(A)層的樹脂組成物之tanδ的極大值控制在3以上，其等中較佳地為環氧樹脂，更佳地為加熱時會變成低黏度的環氧樹脂，例如萘型環氧樹脂(naphthalene type epoxy resin)等之結晶環氧樹脂、或液態雙酚A型環氧樹脂(liquid bisphenol A type epoxy resin)等之液態環氧樹脂。
雖然未特別限定環氧樹脂，但可列舉如雙酚A型環氧樹脂、雙酚F型環氧樹脂、雙酚AD型環氧樹脂、氫化(hydrogenated)雙酚A型環氧樹脂、氫化雙酚F型環氧樹脂等之雙酚型環氧樹脂；聯苯型(biphenyl type)或四甲基聯苯型(tetramethylbiphenyl type)環氧樹脂；酚系酚醛清漆型(phenol novolac type)環氧樹脂；萘型環氧樹脂；雙環戊二烯型(dicyclopentadiene type)環氧樹脂等之脂環式脂肪族(alicyclic aliphatic)環氧樹脂；縮水甘油胺型(glycidyl amine type)環氧樹脂；有機羧酸類(organic carboxylic acids)之縮水甘油醚(glycidyl ether)等。該等係可單獨使用亦可兩種以上組合使用。環氧樹脂係可為預聚物(prepolymer)，亦可為諸如聚醚改質型(polyether modified type)環氧樹脂、聚矽氧改質型(silicone modified type)環氧樹脂之環氧樹脂與其他的聚合物(polymer)之共聚物(copolymer)。其等中較佳地係可列舉雙酚型環氧樹脂、聯苯型環氧樹脂、雙環戊二烯型環氧樹脂、縮水甘油胺型環氧樹脂、萘型環氧樹脂、聚醚改質型環氧樹脂等。
為了調整樹脂組成物的黏度，環氧樹脂係可相對於環氧樹脂之整體，含有約0.1質量%至30質量%的分子中具有一個環氧基之單官能環氧樹脂。作為此類之單官能環氧樹脂，係可使用苯縮水甘油醚(phenyl glycidyl ether)、2-乙基己基縮水甘油醚(2-ethylhexyl glycidyl ether)、乙基二乙二醇縮水甘油醚(ethyl diethylene glycol glycidyl ether)、雙環戊二烯縮水甘油醚(dicyclopentadiene glycidyl ether)、2-羥乙基縮水甘油醚(2-hydroxyethyl glycidyl ether)等。該等係可單獨使用亦可兩種以上組合使用。
雖然未特別限定在(A)層中之上述熱硬化性樹脂的含量，但較佳地係5質量%至50質量%。 進一步地，雖然未特別限定在(A)層中之環氧樹脂的含量，但係在5質量%以上50質量%以下。作為下限值，較佳地係5質量%以上，更佳地係10質量%以上。作為下限值，較佳地係40質量%以下，更佳地係30質量%以下。
進一步地，(A)層亦可含有熱硬化性樹脂之硬化劑，雖然不特別限定硬化劑的種類，但可列舉如固態酚、固態酚系酚醛清漆或液態酚系酚醛清漆等之酚系硬化劑；二氰二胺(dicyandiamide)系硬化劑(二氰二胺等)；尿素(urea)系硬化劑；有機酸醯肼(organic acid hydrazide)系硬化劑；多胺鹽(polyamine salt)系硬化劑；胺加成物(amine adduct)系硬化劑；固態酸酐(anhydride)或液態酸酐等之酸酐系硬化劑；咪唑(imidazole)系硬化劑等。為了將(A)層之tanδ的極大值控制在3以上，較佳地係使用液態酚系酚醛清漆或液態酸酐等之低黏度的硬化劑。該等係可單獨使用亦可兩種以上組合使用。硬化劑的種類係可因應熱硬化性樹脂而適當地選擇。
硬化劑的量係根據硬化劑的種類而不同。在使用環氧樹脂的情況下，例如針對每一當量的環氧基，較佳地為使用硬化劑的官能基之當量數係會成為0.001當量至2當量的量之硬化劑，更佳地為使用會成為0.005當量至1.5當量的量之硬化劑。
進一步地，(A)層較佳地係含有硬化加速劑。作為硬化加速劑，係可列舉如咪唑化合物等之胺化合物(amine compound)、磷化合物(phosphorous compound)以及有機金屬化合物等鹼性的化合物、微膠襄(microcapsule)型硬化加速劑。 作為上述咪唑化合物係可列舉咪唑、2-甲基咪唑、2-乙基咪唑、1-異丁基-2-甲基咪唑、2-乙基-4-甲基咪唑、2-苯基(phenyl)咪唑、2-苯基-4-甲基咪唑、1-芐基(benzyl)-2-甲基咪唑、1-芐基-2-苯基咪唑、1,2-二甲基咪唑、1-氰乙基(cyanoethyl)-2-甲基咪唑、1-氰乙基-2-乙基-4-甲基咪唑、1-氰乙基-2-十一烷基(undecyl)咪唑、1-氰乙基-2-苯基咪唑等之2-取代的咪唑化合物；1-氰乙基-2-十一烷基咪唑鎓三聚體(imidazolium trimeritate)、1-氰乙基-2-苯基咪唑鎓三聚體等之偏苯三酸鹽(trimellitic acid salt)；2,4-二胺基-6-[2'-甲基咪唑基-(1')]-乙基-s-三嗪(triazine)、2,4-二胺基-6-[2'-十一烷基咪唑基-(1')]-乙基-三嗪、2,4-二胺基-6-[2'-乙基-4'-甲基咪唑基-(1')]-乙基-s-三嗪等之三嗪加成物；2,4-二胺基-6-[2'-甲基咪唑基-(1')]-乙基-s-三嗪異三聚氰酸(isocyanuric acid)加合物、2-苯基咪唑異三聚氰酸加合物、2-甲基咪唑異三聚氰酸加合物、2-苯基-4,5-二羥甲基(hydroxymethyl)咪唑及2-苯基-4-甲基-5-二羥甲基咪唑等。
作為上述磷化合物係可列舉三丁基膦(tributylphosphine)等之三烷基膦(trialkylphosphine)系化合物、三苯基膦(triphenylphosphine)等之三芳基膦(triarylphosphine)系化合物。 作為上述胺化合物亦可列舉2,4,6-三(二甲基胺基甲基)苯酚(2,4,6-tris(dimethylaminomethyl)phenol)、二乙胺(diethyl amine)、三乙胺(triethylamine)、二伸乙基四胺(diethylenetetramine)、三伸乙基四胺(triethylenetetramine)以及4,4-二甲基胺基吡啶(4,4-dimethylaminopyridine)等。胺化合物亦可為胺加成物。
作為上述有機金屬化合物係可列舉環烷酸鋅(zinc naphthenate)、環烷酸鈷(cobalt naphthenate)、辛酸亞錫(stannous octoate)、辛酸鈷(cobalt octylate)、雙乙醯丙酮鈷(bisacetylacetonate cobalt)(II)以及三乙醯丙酮鈷(trisacetylacetonate cobalt)(III)等。
作為上述微膠襄型硬化加速劑係可使用例如將胺系化合物粉末分散在環氧樹脂中之微粒子組成物等。作為上述胺系化合物係只要根據所需的增黏倍率而自以下例示的胺系化合物中選擇即可。作為上述胺系化合物係可列舉脂肪族一級胺(aliphatic primary amine)、脂環族一級胺(alicyclic primary amine)、芳香族一級胺(aromatic primary amine)、脂肪族二級胺、脂環族二級胺、芳香族二級胺、咪唑化合物、咪唑啉(imidazoline)化合物，或是該等化合物與羧酸(carboxylic acid)、磺酸(sulfonic acid)、異氰酸酯(isocynate)、環氧等的反應產物等。該等可併用一種或兩種以上，較佳地係可使用如脂肪族一級胺、脂環族一級胺、芳香族一級胺、脂肪族二級胺、脂環族二級胺、芳香族二級胺、咪唑化合物或咪唑啉化合物與其等的羧酸、磺酸、異氰酸酯或環氧之反應產物的併用。又由抑制25℃時的增黏之觀點，上述胺系化合物粉末之熔點(melt point)或軟化點(softening point)較佳在60℃以上。
進一步地，(A)層所含有的硬化加速劑較佳地係中值粒徑在10µ m以下者。藉由含有中值粒徑在10µ m以下的硬化加速劑，係可針對電極間的距離更狹窄的電子元件發揮更優異的滲入性。亦即，由於不會含有粒徑大的粒子，因此能夠抑制在狹窄電極間的滲入不良的狀況。又因中值粒徑小而不會在系統中有大粒子與小粒子的分歧，因此能夠抑制滲入後的局部硬化不良的狀況。 作為上述硬化加速劑的中值粒徑之上限值，更佳地為5µ m以下，再佳地為3µ m以下。作為下限值，較佳地為0.1µ m以上。
於(A)層中，硬化加速劑的含量係相對於100質量份的熱硬化性樹脂，例如在0.1質量份以上40質量份以下。作為下限值，較佳地係1質量份以上，更佳地係5質量份以上。作為上限值，較佳地係30質量份以下，更佳地係20質量份以下。藉由使硬化加速劑在上述的含量，係能夠抑制硬化不良的發生，同時也能夠抑制翹曲的狀況。 進一步地在(A)層中使用環氧樹脂的情況下，硬化加速劑的含量係相對於100質量份的環氧樹脂，例如在0.1質量份以上40質量份以下。作為下限值，較佳地係1質量份以上，更佳地係5質量份以上。作為上限值，較佳地係30質量份以下，更佳地係20質量份以下。藉由使硬化加速劑在上述的含量，係能夠抑制硬化不良的發生，同時也能夠抑制翹曲的狀況。
於本發明的(A)層中，只要不妨礙本發明的目的，係可使用其他的添加劑。作為此類添加劑係可列舉熱塑性樹脂(thermoplastic resin)、矽烷耦合劑、碳黑(carbon black)、離子補捉劑(ion scavenger)等。 作為熱塑性樹脂係可列舉非反應性聚矽氧油(non-reactive silicone oil)或反應性聚矽氧油等之聚矽氧油、丙烯酸(acrylic)樹脂、苯氧基(phenoxy)樹脂、聚烯烴(polyolefin)、聚胺甲酸酯(polyurethane；PU)、封閉型異氰酸酯(blocked isocyanate)、聚醚、聚酯、聚醯亞胺、聚乙烯醇(polyvinyl alcohol；PVA)、丁醛(butyral)樹脂、聚醯胺(polyamide)、       氯乙烯(vinyl chloride)、纖維素(cellulose)、熱塑性環氧樹脂、熱塑性酚醛樹脂等。 作為非反應性聚矽氧油係可列舉聚矽氧烷(polysiloxane)、聚醚改質聚矽氧油、烷基改質(alkyl modified)聚矽氧油等。作為反應性聚矽氧油係可列舉環氧改質聚矽氧油、羧基(carboxyl)改質聚矽氧油、胺基改質聚矽氧油等。
作為矽烷耦合劑係可列舉如3-環氧丙氧基丙基三甲氧基矽烷(3-glycidoxypropyltrimethoxysilane)、3-環氧丙氧基丙基三乙氧基矽烷(3-glycidoxypropyltriethoxysilane)、2-(3,4-環氧環己基)乙基三甲氧基矽烷(2-(3,4-epoxycyclohexyl)ethyltrimethoxysilane)、2-(3,4-環氧環己基)乙基三乙氧基矽烷(2-(3,4-epoxycyclohexyl)ethyltriethoxysilane、乙烯基三甲氧基矽烷(vinyl trimethoxysilane) 、乙烯基三乙氧基矽烷(vinyltriethoxysilane)等。上述矽烷耦合劑係即使是用在事先使矽烷耦合劑反應於表面的情況下，亦可適宜地進行調配。
上述矽烷耦合劑在(A)層中的含量較佳地係0.1質量%至10質量%，更佳地係2質量%至6質量%。 上述碳黑在(A)層中的含量較佳地係0.1質量%至5質量%，更佳地係0.5質量%至3質量%。
作為上述離子補捉劑，只要是具有補捉封裝組成物中的雜質離子之能力而得以提高經封裝的電子元件之可靠性的製劑者即可。作為離子補捉劑，係可列舉如無機離子交換劑等。 雖然未特別限制在含有離子補捉劑時之含量，但較佳地係在(A)層中為0.05質量%以上，更佳地為3質量%以下。
又於本發明的多層片材中之(A)層的厚度較佳地係10µ m至500µ m。作為下限值，更佳地係20µ m以上，再佳地係40µ m以上。作為上限值，更佳地係400µ m以下，再佳地係300µ m以下。 藉由使(A)層的厚度在上述的範圍，係可抑制電子元件的翹曲。進一步地，樹脂變得易滲入至電子元件下方，而得以發揮更優異的滲入性。
＜(B)層＞ 本發明的多層片材係除了(A)層之外，較佳地係可具備(B)層。本發明的多層片材係藉由具備(B)層，而可抑制在多層片材上發生翹曲。於本發明的多層片材中，(B)層係較佳地為與(A)層呈相反側的最外層或中間層。又即使是在此情況下，離型膜或離型片不屬於最外層。 又本發明的多層片材在模具底部填充封裝中即使(B)層是在最外層，亦不會有以與電子元件及基板直接接觸的方式載置的情形。
(B)層係較佳地為含有填料的層。雖然未特別限定作為填料的種類，但可使用與在上述(A)層的說明中所列舉之相同者。 於(B)層中，作為前述填料的含量係較佳地為70質量%以上。作為下限值，更佳地為75質量%以上、再佳地為80質量%以上。作為上限值，較佳地為93質量%以下，更佳地為90質量%以下。藉由使填料的含量在上述的範圍，係可抑制經封裝之電子元件的翹曲。
前述填料的中值粒徑係較佳地為0.1µ m至30µ m。作為下限值，更佳地為1µ m以上，再佳地為3µ 以上。作為上限值，更佳地為20µ m以下，再佳地為15µ m以下。
雖然未特別限定前述填料的熱膨脹係數，但較佳地係1 ppm/K以上，更佳地係2 ppm/K以上。作為上限值，較佳地係15 ppm/K以下，更佳地係10 ppm/K以下。 藉由使用在上述的範圍之熱膨脹係數者作為填料，係可抑制(B)層在80℃以下之熱膨脹係數。
進一步地，雖然未特別限定構成(B)層之素材，但較佳地為樹脂，更佳地為熱硬化性樹脂。作為熱硬化性樹脂係可使用與在上述(A)層的說明中所列舉之相同者，較佳地為環氧樹脂。
雖然未特別限定環氧樹脂，但可列舉如雙酚A型環氧樹脂、雙酚F型環氧樹脂、雙酚AD型環氧樹脂、氫化雙酚A型環氧樹脂、氫化雙酚F型環氧樹脂、雙酚改質型環氧樹脂等之雙酚型環氧樹脂；聯苯型或四甲基聯苯型環氧樹脂；酚系酚醛清漆型環氧樹脂；萘型環氧樹脂；脂環式脂肪族環氧樹脂；酚酞(phenolphthalein)型環氧樹脂；有機羧酸類之縮水甘油醚等。該等係可單獨使用亦可兩種以上組合使用。環氧樹脂係可為預聚物，亦可為諸如聚醚改質型環氧樹脂、聚矽氧改質型環氧樹脂之環氧樹脂與其他的聚合物之共聚物。藉由使用其等中之具剛性(rigid)主鏈的環氧樹脂之聯苯型環氧樹脂、酚系酚醛清漆型環氧樹脂、酚酞型環氧樹脂、雙酚改質型環氧樹脂，係可使(B)層在80℃以下的熱膨脹係數變小。進一步地，藉由使用具彈性的主鏈之聚醚改質型環氧樹脂等，係可使(B)層在25℃之貯藏彈性係數E’變小。
為了調整樹脂組成物的黏度，環氧樹脂係可相對於環氧樹脂之整體，含有約0.1質量%至30質量%的分子中具有一個環氧基之單官能環氧樹脂。作為此類之單官能環氧樹脂係可使用苯縮水甘油醚、2-乙基己基縮水甘油醚、乙基二乙二醇縮水甘油醚、雙環戊二烯縮水甘油醚、2-羥乙基縮水甘油醚等。該等係可單獨使用亦可兩種以上組合使用。
雖然未特別限定在(B)層中之上述熱硬化性樹脂的含量，但較佳地係2質量%至30質量%。 進一步地，雖然未特別限定在(B)層中之環氧樹脂的含量，但係2質量%以上30質量%以下。作為下限值，較佳地係3質量%以上，更佳地係5質量%以上。作為上限值，較佳地係25質量%以下，更佳地係20質量%以下。
進一步地，(B)層亦可含有熱硬化性樹脂之硬化劑、硬化加速劑，硬化劑、硬化加速劑的種類係可使用與在(A)層的說明中所列舉之相同者。 硬化劑的量係根據硬化劑的種類而不同。在使用環氧樹脂的情況下，例如針對每一當量的環氧基，較佳地為使用硬化劑的官能基之當量數係會成為0.001當量至2當量的量之硬化劑，更佳地為使用會成為0.005當量至1.5當量的量之硬化劑。於其等中，藉由使用固態酚系酚醛清漆樹脂，較佳地係聯苯型酚系酚醛清漆樹脂等之酚系硬化劑，係可使(B)層的貯藏彈性係數變小。
於(B)層中之硬化加速劑的含量係相對於100質量份的熱硬化性樹脂，較佳地在0.1質量份以上40質量份以下。作為下限值，更佳地係1質量份以上，再佳地係5質量份以上。作為上限值，更佳地係30質量份以下，再佳地係20質量份以下。藉由使硬化加速劑在上述的含量，則能夠抑制硬化不良的發生，同時也能夠抑制翹曲的狀況。 進一步地在(B)層中使用環氧樹脂的情況下，硬化加速劑的含量係相對於100質量份的環氧樹脂，較佳地在0.1質量份以上40質量份以下。作為下限值，更佳地係1質量份以上，再佳地係5質量份以上。作為上限值，更佳地係30質量份以下，再佳地係20質量份以下。藉由使硬化加速劑在上述的含量，則能夠抑制硬化不良的發生，同時也能夠抑制翹曲的狀況。
於(B)層中，只要不妨礙本發明的目的，係可使用其他的添加劑。作為此類添加劑係可使用與在上述(A)層的說明中相同者，其可列舉熱塑性樹脂、矽烷耦合劑、碳黑、離子補捉劑等。 作為熱塑性樹脂係可列舉非反應性聚矽氧油或反應性聚矽氧油等之聚矽氧油、丙烯酸樹脂、苯氧基樹脂、聚烯烴、聚胺甲酸酯、封閉型異氰酸酯、聚醚、聚酯、聚醯亞胺、聚乙烯醇、丁醛樹脂、聚醯胺、氯乙烯、纖維素、熱塑性環氧樹脂、熱塑性酚醛樹脂等。於其等中，藉由使用聚酯、丙烯酸樹脂、聚矽氧油、聚醚、聚乙烯醇、聚醯胺等之樹脂，係可使(B)層的貯藏彈性係數變小。
作為矽烷耦合劑係可列舉如3-環氧丙氧基丙基三甲氧基矽烷、3-環氧丙氧基丙基三乙氧基矽烷、2-(3,4-環氧環己基)乙基三甲氧基矽烷、2-(3,4-環氧環己基)乙基三乙氧基矽烷、乙烯基三甲氧基矽烷、乙烯基三乙氧基矽烷等。上述矽烷耦合劑係即使是用在事先使矽烷耦合劑反應於表面的情況下，亦可適宜地進行調配。
上述矽烷耦合劑在(B)層中的含量較佳地係0.1質量%至10質量%，更佳地係2質量%至6質量%。 上述碳黑在(B)層中的含量較佳地係0.1質量%至5質量%，更佳地係0.5質量%至3質量%。
作為上述離子補捉劑，只要是具有補捉封裝組成物中的雜質離子之能力而得以提高經封裝的電子元件之可靠性的製劑者即可。作為離子補捉劑係可列舉如無機離子交換劑等。 雖然未特別限制在含有離子補捉劑時之含量，但較佳地係在(B)層中為0.05質量%以上，更佳地為3質量%以下。
又於本發明的多層片材中之(B)層的厚度較佳地係50µ m至800µ m。作為下限值，更佳地係100µ m以上，再佳地係200µ m以上。作為上限值，更佳地係700µ m以下，再佳地係600µ m以下。 藉由使(B)層的厚度在上述的範圍，係可抑制電子元件的翹曲。
又，本發明的多層片材之(B)層較佳地係具備在80℃以下時的熱膨脹係數α [ppm/K]以及前述熱硬化物之在25℃時的貯藏彈性係數E’ [GPa]滿足下列式(1)之樹脂組成物的(B)層。 40000≦α×E’≦250000 [Pa/K]           (1)
作為(B)層之α×E’的下限值，更佳地係40000以上，再佳地係50000以上。作為上限值，更佳地係220000以下，再佳地係180000以下。 由於本發明之多層片材係藉由具備包括滿足上述式(1)的樹脂組成物之(B)層而能夠緩和硬化時的熱所產生的應力，因此能夠抑制電子元件的翹曲。
作為構成(B)層之樹脂組成物在80℃以下時的熱膨脹係數α之下限值，較佳地係3 ppm/K以上，更佳地係5 ppm/K以上。作為上限值，較佳地係15 ppm/K以下，更佳地係10 ppm/K以下。 藉由使熱膨脹係數α在上述的範圍，片材係可隨動於電子元件的形狀變化。 構成(B)層之樹脂組成物的熱膨脹係數係可藉由所添加之填料的熱膨脹係數或填料的添加量、熱硬化性樹脂的化學結構以及玻璃轉移溫度(glass transition temperature；Tg)來控制。例如藉由將熱膨脹係數小的填料進行高填充，或是使用具有剛性主鏈之環氧樹脂等，而可使熱膨脹係數變小。進一步地，藉由增高(B)層的玻璃轉移溫度，係可使玻璃轉移溫度以下的熱膨脹係數變小。
熱膨脹係數α的測定方法係在150℃對僅由(B)層所構成之樹脂片材進行1小時的熱硬化處理後，從熱硬化物製備長度20 mm×寬度5 mm×厚度5µ m之測定樣品。將測定樣品設置在熱機械分析裝置(TMA7100)的壓縮測定用治具後，在-50℃至300℃的溫度範圍，以5g的荷重、2.5 ℃/min的升溫速度之條件下，自50℃至70℃之膨脹率計算出熱膨脹係數α。
作為構成(B)層之樹脂組成物在25℃時的貯藏彈性係數E’之下限值，較佳地為3 GPa以上，更佳地為10 GPa以上。作為上限值，較佳地為50 GPa以下，更佳地為30 GPa以下。 藉由使貯藏彈性係數E’在上述的範圍，透過片材的剛性而得以抑制電子元件的形狀變化，其結果係可抑制電子元件的翹曲。 構成(B)層之樹脂組成物的貯藏彈性係數係可藉由填料的添加量、熱硬化性樹脂或硬化劑的主鏈、熱塑性樹脂的種類來控制。例如，增加填料的添加量，使用具有具備聚醚結構等之富彈性的主鏈之環氧樹脂或聯苯型酚系酚醛清漆樹脂等，或混入丙烯酸樹脂等之熱塑性樹脂，藉此得以使貯藏彈性係數變小。
貯藏彈性係數E’的測定方法係以下列流程進行。 (1) 在150℃對僅由(B)層所構成之樹脂片材進行1小時的熱硬化處理後，從熱硬化物製備長度50 mm×寬度10 mm×厚度2 mm之測定樣品。 (2) 將前述測定樣品設置於彎曲測定用治具，利用黏彈性測定裝置(DMA6100，Hitachi High-Tech Science Corporation製)，以1 Hz的頻率、2.5 ℃/min的升溫速度之條件進行在-50℃至300℃的溫度範圍之貯藏彈性係數的測定。 (3) 自上述的測定結果讀取在25℃時之貯藏彈性係數(E’)。
進一步地，構成本發明的多層片材之(B)層的樹脂組成物較佳地係在175℃進行1小時的熱硬化處理後之熱硬化物的玻璃轉移溫度為80℃以上。藉由在175℃進行1小時的熱硬化處理後之熱硬化物的玻璃轉移溫度為80℃以上，係可使經由多層片材封裝之封裝物具有優異的熱穩定性。 為了使(B)層的熱硬化物之玻璃轉移溫度在80℃以上，係只要提高熱硬化物的剛性即可，較佳地例如增加環氧樹脂中之環氧基的含量、增加硬化劑中之反應基的數量等。
又雖然未特別限定本發明之多層片材整體的厚度，但較佳地係100µ m以上。作為下限值，更佳地係150µ m以上，再佳地係200µ m以上。作為上限值，更佳地係1000µ m以下，再佳地係800µ m以下。 藉由使(B)層的厚度在上述的範圍，係可抑制電子元件的翹曲。
再者，本發明之多層片材的(B)層之厚度相對於(A)層之厚度的比(B/A)係較佳地為1.0至80，更佳地係2.0至10。 藉由使(A)層之厚度與(B)層之厚度的比在上述的範圍，係能夠對電極間的距離更狹窄的電子元件發揮更優異的封裝性，並更能夠對經封裝的電子元件發揮低翹曲性。
本發明之多層片材係除了上述(A)層、(B)層之外，亦可具備其他的層。作為其他的層，較佳地係可包含在上述(A)層、(B)層的說明中所列舉的熱硬化性樹脂，亦可含有填料等。 此外，其他的層可以是一層，也可以是一層以上的層數。 在本發明之多層片材包含其他的層之情況下，可以係例如將其他的層作為(C)層，而呈諸如(A)層/(C)層/(B)層之構成，或是呈諸如(A)層/(B)層/(C)層之構成。
又本發明之多層片材較佳地係構成(A)層之樹脂組成物的測定溫度在125℃、測定時間在0秒至100秒時之tanδ(損耗正切)的極大值為構成(A)層以外的層之樹脂組成物的測定溫度在125℃、測定時間在0秒至100秒時之tanδ(損耗正切)的極大值以下。 例如在由(A)層與(B)層構成之二層片材的情況下、在諸如(A)層/(C)層/(B)層之三相片材的情況下，藉由使構成(A)層之樹脂組成物的tanδ之極大值在構成(B)層之樹脂組成物的tanδ的極大值以下，能夠防止(A)層與(B)層因熔融而混合的狀況，並能夠有效率地進行底部填充及包覆成型封裝。
又較佳地係例如在諸如(A)層/(B)層/(C)層之構成的情況下，構成(A)層之樹脂組成物的測定溫度在125℃、測定時間在0秒至100秒時之tanδ(損耗正切)的極大值為(C)層的測定溫度在125℃、測定時間在0秒至100秒時之tanδ(損耗正切)的極大值以下。 藉由使構成(A)層之樹脂組成物的測定溫度在125℃、測定時間在0秒至100秒時之tanδ(損耗正切)的極大值在(A)層以外的層之測定溫度在125℃、測定時間在0秒至100秒時之tanδ(損耗正切)的極大值以下，能夠防止(A)層與前述(A)層以外的層因熔融而混合的狀況，並能夠有效率地進行底部填充及包覆成型封裝。
圖1係顯示本發明之多層片材的說明示意圖。圖1所示的多層片材係由(A)層11與(B)層12所構成之兩層的多層片材。 雖然圖1所示的多層片材係在最外層分別具備有(A)層11與(B)層12之片材，但亦可如上述的方式，係具備除了(A)層及(B)層以外的其他的層之多層片材。
[多層片材的製造方法] 本發明之多層片材的製造方法亦可使用如壓延成膜法(calendar film forming method)、延流成膜法(casting film formation method)、吹膜擠壓法(inflation extrusion method)、T字模擠壓法(T-die extrusion method)、乾式層合法(dry laminating method)等各自形成各層的膜，其後利用貼合或是共擠壓法(coextrusion method)等來製造多層片材。
再者，亦可在基材上形成多層片材，而在使用時將基材剝離後使用。 雖然未特別限定基材，但可列舉塑膠膜、紙、不織布、金屬等。作為塑膠膜係可列舉如聚烯烴系膜、乙烯鹵化物聚合物(vinyl halide polymer)系膜、丙烯酸樹脂系膜、橡膠系膜、纖維素系膜、聚酯系膜、聚碳酸酯(polycarbonate)系膜、聚苯乙烯(polystyrene)系膜、聚苯硫醚(polyphenylene sulfide)系膜、環烯聚合物(cycloolefin polymer)系膜。此外，亦可使用經聚矽氧等離型處理的基材。 雖然未特別限定基材的厚度，但較佳地係500µ m以下。
[電子元件安裝基板的模具底部填充封裝方法] 接著係針對電子元件安裝基板的模具底部填充封裝方法進行說明。 本發明之電子元件安裝基板的模具底部填充封裝方法係具備基板準備步驟、多層片材準備步驟、載置步驟以及加熱壓縮步驟。基板準備步驟係準備經覆晶安裝有具備電極的高度(h)在5µ m至250µ m，電極間的寬度(w)在5µ m至500µ m之電極的電子元件之基板的步驟。多層片材準備步驟係準備具備測定溫度在125℃、測定時間在0秒至100秒時之tanδ(損耗正切)的極大值為3以上之(A)層作為最外層的多層片材之步驟。載置步驟係以(A)層與電子元件及基板接觸的方式載置前述多層片材的步驟。加熱壓縮步驟係將經載置的前述多層片材進行加熱壓縮的步驟。
作為電子元件，係可列舉電晶體(transistor)或電容器(condenser)；將電阻等整合(integrate)在一個晶片之積體電路(integrated circuit；IC)；或是進一步提高IC的積體度而在一個晶片上整合了1000個以上的元件之大型積體電路(large-scale integrated circuit；LSI)等之半導體晶片等。 再者，電極的形狀未特別予以限定，可列舉球狀、支柱狀、圓柱狀、管柱狀等。作為電極的材質未特別限定，可列舉如Sn-Pb系、Pb-Sn-Sb系、Sn-Sb系、Sn-Pb-Bi系、無鉛(lead-free)之Sn-Ag系、Sn-Ag-Cu系、Bi-Sn系、Sn-Cu系、Sn-Ag-Bi-In系、Sn-Zn-Bi系等的焊料(solder)類、金系金屬材料、銅系金屬材料、銅系合金等。進一步地，電極的高度(h)為5µ m至250µ m，電極間的寬度(w)為5µ m至500µ m。 作為基板可列舉如印刷有電路的印刷配線基板(printed-wiring substrate)等。
接著，利用圖2至圖4來說明模具底部填充封裝方法。 圖2係透過電極23連接有電子元件21與基板22的電子元件安裝基板(安裝基板)20之說明示意圖。電子元件21與基板22係藉由電極23而被導通。此時，電極間的高度(h)為5µ m至250µ m，且寬度(w)為5µ m至500µ m。又作為電極的直徑，較佳地係10µ m至1000µ m。
圖3係以使(A)層接觸電子元件21及基板22的方式將多層片材10載置於電子元件安裝基板(安裝基板)20上的狀態之說明示意圖。 此時，多層片材所含有的填料之最大粒徑較佳地係在電極間的高度(h)及寬度(w)以下。 其次，藉由將多層片材10進行加熱壓縮，則可將電子元件安裝基板進行模具底部填充封裝。 雖然未特別限定此時的加熱溫度，但較佳地係70℃至150℃。作為下限值，更佳地係80℃以上，再佳地係90℃以上。作為上限值，更佳地係140℃以下，再佳地係130℃以下。 雖然未特別限定壓縮的壓力，但較佳地係0.5 MPa至10 MPa。作為下限值，更佳地係1 MPa以上，再佳地係1.5 MPa以上。作為上限值，更佳地係8 MPa以下，再佳地係6 MPa以下。
又雖然未特別限定加熱壓縮的方法，但可列舉藉由加壓板(pressing plate)等一邊加熱一邊按壓多層片材的方法。進一步地，亦可於加熱壓縮時，係在減壓條件下進行加熱壓縮。 再者，在含有熱硬化性樹脂作為多層片材的素材的情況下，較佳地係設置後硬化步驟。後硬化步驟係指加熱使之硬化的步驟。 加熱溫度較佳地係90℃至200℃。作為下限值，更佳地係120℃以上，再佳地係140℃以上。進一步地，加熱時間較佳地係30分鐘至240分鐘，更佳地係60分鐘至180分鐘。
圖4係以多層片材10進行了模具底部填充封裝之電子元件安裝基板(以下稱為「經由多層片材封裝的安裝基板100」)的說明示意圖。藉由多層片材10含有測定溫度在125℃、測定時間在0秒至100秒時之tanδ(損耗正切)的極大值為3以上之(A)層，由於可更有效率地滲入至電子元件安裝基板的電極間，因此經由多層片材封裝的安裝基板100為耐熱性及耐濕性優異的電子元件安裝基板。實施例
雖然在以下例示實施例以進一步詳細說明本發明，但本發明並非由此等實施例所限定者。
＜多層片材的製作＞ (1) (A)層的製作 利用表1-1至表1-4所示的配方將環氧樹脂、硬化劑、填料(熔融二氧化矽 FB501MDX：DENKA株式會社製)、碳黑(粒徑24 nm)、矽烷耦合劑(KBM503：Shin-Etsu Silicone製)、離子補捉劑(無機離子交換劑)、硬化加速劑進行混合，透過輥捏合機(roll kneader)以120℃加熱30分鐘，其後進行熔融捏合，完成了捏合物的調製。表中的數值皆為質量份。其次，將獲得的捏合物在100℃的條件下，透過T字模擠壓法於離型處理膜上進行塗布而形成片狀，完成了厚度20µ m至300µ m、縱500 mm、橫500 mm的(A)層之製作。作為上述離型處理膜，係使用了經聚矽氧離型處理的厚度為50µ m之聚對苯二甲酸乙二酯(polyethylene terephthalate；PET)膜。
(2) (B)層的製作 將100質量份的聯苯型環氧樹脂、50質量份的固態酚系酚醛清漆樹脂、1360質量份的填料(熔融二氧化矽 FB501MDX：DENKA株式會社製)、2質量份的碳黑(粒徑24 nm)、2質量份的矽烷耦合劑(KBM503：Shin-Etsu Silicone製)、5質量份的離子補捉劑(無機離子交換劑)、10質量份的硬化加速劑(三芳基膦系化合物)進行調配，透過輥捏合機以120℃加熱30分鐘，其後進行熔融捏合，完成了捏合物的調製。其次，將獲得的捏合物在100℃的條件下，透過T字模擠壓法於離型處理膜上進行塗布而形成片狀，完成了厚度50µ m至800µ m、縱500 mm、橫500 mm的(B)層之製作。作為上述離型處理膜，係使用了經聚矽氧離型處理的厚度為50µ m之聚對苯二甲酸乙二酯膜。
(3) 模具底部填充封裝用多層片材的製作 將於上述製作完成的(A)層與(B)層以相互接觸的方式進行層積，並透過疊合機(laminating machine)以溫度60℃進行貼合，完成了模具底部填充封裝片材的製作。
＜tanδ(損耗正切)的極大值之測定＞ 針對於上述獲得之構成(A)層的樹脂組成物進行了tanδ的測定。測定係使用黏彈性測定裝置(TAInstruments公司製，ARES-LS2)在測定溫度為125℃、測定時間為0秒至100秒、頻率為1 Hz的條件下對直徑25 mmΦ之試片進行了測定。測定結果係示於表1-1至表1-4中。
＜模具底部填充試驗1＞ (電極間滲入性試驗) 在搭載於玻璃上之凸塊(bump)高度30µ m、尺寸為縱25 mm且橫25 mm之測試用晶片上，以接觸於上述製作的模具底部填充封裝片材之(A)層的方式載置，以成形壓力3 MPa、125℃、10分鐘的條件完成前硬化之後，再以150℃、60分鐘的條件進行了後硬化。根據下述的基準，直接觀察玻璃的背面而進行了滲入性的評價。 [滲入性評價基準] ◎：未滲入部分的大小在500µ m以下。 〇：未滲入部分的大小大於500µ m，且在1000µ m以下。 ×：未滲入部分的大小大於1000µ m。
【表1-1】
Figure 02_image001
【表1-2】
Figure 02_image003
【表1-3】
Figure 02_image005
【表1-4】
Figure 02_image007
根據表1-1至表1-4的結果比較實施例與比較例可知，當構成(A)層之樹脂組成物的測定溫度在125℃、測定時間在0秒至100秒時之tanδ的極大值為3以上時，係可使封裝片材具有優異的電極間滲入性。 進一步比較實施例1與實施例9可知，使用了中值粒徑為10µ m以下之硬化加速劑的片材，係具有更優異的電極間滲入性。
＜模具底部填充試驗2＞ 利用表2所示的配方將各成分進行混合，透過輥捏合機以120℃加熱30分鐘，其後進行熔融捏合，完成了捏合物的調製。其次，將獲得的捏合物在100℃的條件下，透過T字模擠壓法於離型處理膜上進行塗布而形成片狀，完成了厚度200µ m至800µ m、縱500 mm、橫500 mm的(B)層之製作。作為上述離型處理膜，係使用了經聚矽氧離型處理的厚度為50µ m之聚對苯二甲酸乙二酯膜。 將於表1-1之實施例1所使用的配方之(A)層與(B)層以相互接觸的方式進行層積，並透過疊合機以溫度60℃進行貼合，完成了模具底部填充封裝片材的製作。 其次，利用獲得的模具底部填充封裝片材進行了與上述相同的電極間滲入性試驗。評價基準係與上述相同。 進一步地，利用下述的方法進行了翹曲量的評價。
(翹曲量評價) 於直徑12英吋(inch)×厚度775µ m之矽晶圓(silicon wafer)上，載置上述模具底部填充封裝片材，以成形壓力3 MPa、125℃、10分鐘的條件完成前硬化之後，再以150℃、60分鐘的條件進行了後硬化。 [翹曲量評價基準] 完成上述後硬化之後，冷卻至室溫，並根據以下的基準進行了翹曲量的評價。測定方法係利用雷射位移計(laser displacement meter)測定矽晶圓的基板側中心部與晶圓端部兩點的高低差之平均，並將其數值作為翹曲量根據以下的基準進行了評價。 〇：翹曲在12 mm以下。 ×：翹曲大於12 mm。
【表2】
Figure 02_image009
根據表2的結果可知，具備包括在80℃以下時的熱膨脹係數α [ppm/K]及前述熱硬化物在25℃時之貯藏彈性係數E’ [GPa]滿足式(1)的樹脂組成物之(B)層的片材，係可發揮優異的低翹曲功效。 進一步地比較實施例29與實施例30可知，當(A)層的厚度在500µ m以下時，係可發揮優異的低翹曲功效。另一方面，可知當(A)層的厚度超過500µ m時，則無法發揮低翹曲功效。產業上的可利用性
本發明之模具底部填充封裝用的多層片材係可將覆晶下的狹隙填充與整體封裝一起進行。藉此係可應用於使用在IoT或自動駕駛等的積體電路或大型積體電路的封裝。
10:多層片材 11:(A)層 12:(B)層 20:安裝基板 21:電子元件 22:基板 23:電極 100:經由多層片材封裝的安裝基板
〔圖1〕圖1係本發明之多層片材的說明示意圖。 〔圖2〕圖2係電子元件安裝基板的說明示意圖。 〔圖3〕圖3係將本發明之多層片材載置於電子元件安裝基板上的狀態之說明示意圖。 〔圖4〕圖4係以本發明之多層片材進行了模具底部填充封裝之電子元件安裝基板的說明示意圖。
10:多層片材
11:(A)層
12:(B)層

Claims (10)

  1. 一種模具底部填充封裝用的多層片材，其具備(A)層作為最外層，且前述(A)層係包括測定溫度在125℃、測定時間在0秒至100秒時之tanδ(損耗正切)之極大值為3以上之樹脂組成物之層。
  2. 如請求項1所記載之模具底部填充封裝用的多層片材，其中，前述(A)層係含有填料，且前述填料的最大粒徑為20µ m以下。
  3. 如請求項1或請求項2所記載之模具底部填充封裝用的多層片材，其中，在前述(A)層中係含有體積粒徑分佈之累積體積50%中之中值粒徑(D50)為10µ m以下之硬化加速劑。
  4. 如請求項1或請求項2所記載之模具底部填充封裝用的多層片材，其中，前述(A)層的厚度為10µ m至500µ m。
  5. 如請求項1或請求項2所記載之模具底部填充封裝用的多層片材，係進一步具備： (B)層，且前述(B)層係包括滿足下列式(1)之樹脂組成物之層； 40000≦α×E’≦250000 [Pa/K]           (1) 於前述式(1)中： 「α」係表示於175℃進行1小時的硬化處理後之熱硬化物在80℃以下時的熱膨脹係數α [ppm/K]； 「E’」係表示前述熱硬化物在25℃時之貯藏彈性係數E’ [GPa]。
  6. 如請求項5所記載之模具底部填充封裝用的多層片材，其中，前述(B)層的厚度相對於前述(A)層的厚度之比值(B/A)係1.0至80。
  7. 一種模具底部填充封裝方法，係電子元件安裝基板之模具底部填充封裝方法，其具備： 基板準備步驟，係準備經覆晶安裝有具備電極的高度(h)在5µ m至250µ m，電極間的寬度(w)在5µ m至500µ m之電極的電子元件之基板的步驟； 多層片材準備步驟，係準備具備下列(A)層作為最外層之多層片材的步驟； 載置步驟，係以前述(A)層與電子元件及基板接觸的方式載置前述多層片材的步驟；以及 加熱壓縮步驟，係將經載置的前述多層片材進行加熱壓縮的步驟； 前述(A)層係包括測定溫度在125℃、測定時間在0秒至100秒時之tanδ(損耗正切)之極大值為3以上之樹脂組成物之層。
  8. 如請求項7所記載之模具底部填充封裝方法，其中，前述(A)層係含有填料，且前述填料的最大粒徑係小於前述電極的高度(h)及前述電極間的寬度(w)。
  9. 一種電子元件安裝基板，係經模具底部填充封裝的電子元件安裝基板，前述模具底部填充封裝係透過具備下列(A)層作為最外層之多層片材而進行之封裝： 前述(A)層係包括測定溫度在125℃、測定時間在0秒至100秒時之tanδ(損耗正切)之極大值為3以上之樹脂組成物之層。
  10. 一種電子元件安裝基板的製造方法，係經模具底部填充封裝的電子元件安裝基板的製造方法，其具備： 基板準備步驟，係準備經覆晶安裝有電子元件之基板的步驟； 多層片材準備步驟，係準備具備下列(A)層作為最外層之多層片材的步驟； 載置步驟，係以前述(A)層與電子元件及基板接觸的方式載置前述多層片材的步驟；以及 加熱壓縮步驟，係將經載置的前述多層片材進行加熱壓縮的步驟； 前述(A)層係包括測定溫度在125℃、測定時間在0秒至100秒時之tanδ(損耗正切)之極大值為3以上之樹脂組成物之層。
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