TW202018865A - 半導體裝置的形成方法 - Google Patents

半導體裝置的形成方法 Download PDF

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TW202018865A
TW202018865A TW108138186A TW108138186A TW202018865A TW 202018865 A TW202018865 A TW 202018865A TW 108138186 A TW108138186 A TW 108138186A TW 108138186 A TW108138186 A TW 108138186A TW 202018865 A TW202018865 A TW 202018865A
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metal gate
layer
interlayer dielectric
cut
dielectric layer
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TW108138186A
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TWI827712B (zh
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楊正宇
陳彥廷
李威養
楊豐誠
陳燕銘
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台灣積體電路製造股份有限公司
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  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

此處說明包含具有切割金屬閘極的鰭狀場效電晶體的半導體裝置與其形成方法。方法包括形成切割金屬閘極保護蓋結構於半導體基板中的切割金屬閘極虛置閘極插塞的頂部。切割金屬閘極保護蓋結構避免切割金屬閘極區中的虛置填充材料消耗與損傷,亦避免蝕刻製程時形成不想要的聚合物及/或殘留副產物於鰭狀場效電晶體的磊晶區上表面上。

Description

半導體裝置的形成方法
本發明實施例關於半導體裝置與其形成方法,更特別關於具有切割金屬閘極的鰭狀場效電晶體之半導體裝置與其形成方法。
半導體裝置用於多種電子應用,比如個人電腦、手機、數位相機、與其他電子設備。半導體裝置的製作方法通常為依序沉積絕緣層或介電層、導電層、與半導體層的材料於半導體基板上,再採用微影圖案化多種材料層以形成電路構件與單元於半導體基板上。
半導體產業持續縮小最小結構尺寸,以持續改善多種電子構件(如電晶體、二極體、電阻、電容、或類似物)的積體電路,其可讓更多構件整合至給定面積中。然而隨著最小結構尺寸縮小,亦產生需解決的額外問題。
本發明一實施例提供之半導體裝置的形成方法,包括:形成開口於半導體裝置的切割金屬閘極區中;沉積第一再填充材料於開口中以形成切割金屬閘極插塞;進行化學機械研磨以露出金屬閘極結構;蝕刻第一再填充材料以形成凹陷於切割金屬閘極插塞中;將第二再填充材料填入凹陷以形成蓋結構於切割金屬閘極插塞的第一再填充材料上;以及形成多個接點至切割金屬閘極插塞所分隔的多個相鄰裝置的多個源極/汲極區。
本發明一實施例提供之半導體裝置的形成方法,包括:形成第一金屬閘極於第一半導體鰭狀物上;形成第一開口穿過第一金屬閘極;將第一介電材料填入第一開口;平坦化第一介電材料與第一金屬閘極;使第一介電材料凹陷,以形成第二開口;將第二介電材料填入第二開口;以及平坦化第二介電材料與第一金屬閘極。
本發明一實施例提供之半導體裝置,包括:多個金屬閘極結構,位於基板上的層間介電層中;以及隔離結構,位於金屬閘極結構之間,且隔離結構包括介電蓋部份位於介電插塞部份上,其中隔離結構至少部份埋置於層間介電層中,並電性隔離與物理分隔層間介電層中的第一裝置的源極/汲極與第二裝置的源極/汲極。
下述內容提供的不同實施例可實施本揭露的不同結構。特定構件與排列的實施例係用以簡化本揭露而非侷限本揭露。舉例來說,形成第一構件於第二構件上的敘述包含兩者直接接觸,或兩者之間隔有其他額外構件而非直接接觸。此外,本揭露之多種例子中可重複標號,但這些重複僅用以簡化與清楚說明,不代表不同實施例及/或設置之間具有相同標號之單元之間具有相同的對應關係。
此外,空間性的相對用語如「下方」、「其下」、「較下方」、「上方」、「較上方」、或類似用語可用於簡化說明某一單元(或結構)與另一單元(或結構)在圖示中的相對關係。空間性的相對用語可延伸至以其他方向使用之裝置,而非侷限於圖示方向。裝置亦可轉動90°或其他角度,因此方向性用語僅用以說明圖示中的方向。
本發明實施例關於半導體裝置與其形成方法,更特別關於具有切割金屬閘極的鰭狀場效電晶體之半導體裝置與其形成方法。此處所述的實施例關於形成多個鰭狀場效電晶體於晶圓中。圖1至17的每一者顯示製作鰭狀場效電晶體的中間步驟,圖1至16顯示沿著穿過中間結構的三個剖視圖,且中間結構的形成方法採用與個別圖式相關的中間步驟。第一剖視圖為X切面,其穿過相關的第二剖面圖與第三剖面圖如Y切面圖所示的切線A-A’。第二剖面為個別中間結構的切割金屬閘極的區域中一系列閘極結構的閘極結構之Y切面(穿過相關的X切面圖所示的切線B-B’),其方向垂直於將形成鰭狀場效電晶體的鰭狀物。第三剖面為個別中間結構的切割金屬閘極相關的第零層間介電層與磊晶介面的區域之第二Y切面(穿過相關的X切面圖所示的切線C-C’),其方向垂直於將形成鰭狀場效電晶體的鰭狀物。第一剖面為形成於個別中間結構中的一系列閘極結構的X切面,其方向平行於將形成鰭狀場效電晶體的鰭狀物。
圖1顯示基板101,以及形成鰭狀場效電晶體的一些初始步驟,包括自基板101圖案化多個鰭狀物103。基板101可為矽基板,但亦可採用其他基板如絕緣層上半導體基板、應變的絕緣層上半導體基板、或絕緣層上矽鍺基板。基板101可為p型半導體,但其他實施例的基板101可為n型半導體。鰭狀物103的形成方法可為採用任何合適方法形成溝槽。舉例來說,可採用一或多道微影製程圖案化鰭狀物,比如雙重圖案化或多重圖案化製程。一般而言,雙重圖案化或多重圖案化製程結合光微影與自對準製程,其產生的圖案間距小於採用單一的直接光微影製程所得的圖案間距。舉例來說,一實施例形成犧牲層於基板上,並採用光微影製程圖案化犧牲層。採用自對準製程,沿著圖案化的犧牲層形成間隔物。接著移除犧牲層,並採用保留的間隔物圖案化鰭狀物。
然而本技術領域中具有通常知識者應理解,形成一系列鰭狀物的上述製程與材料僅為製程的例子之一而非唯一實施例。可改用任何合適製程形成鰭狀物103,包括任何數目的遮罩與移除步驟。一旦形成鰭狀物103,即可採用鰭狀物103形成多個鰭狀場效電晶體的通道區與源極/汲極區,如下所述。雖然圖1僅顯示兩對自基板101形成的鰭狀物103,但可採用任何數目的鰭狀物103。
在形成鰭狀物103於基板101中之後,可形成隔離區107如淺溝槽隔離區,以隔離鰭狀物103與基板101中的其他區。如此一來,溝槽可填有介電材料,且第一溝槽中的介電材料可凹陷以形成隔離區107。介電材料可為氧化物材料、高密度電漿氧化物、或類似物。在視情況清潔溝槽的襯墊層之後,形成介電材料的方法可採用化學氣相沉積法、高密度電漿化學氣相沉積法、或其他合適的形成方法。
溝槽的填充方法可將介電材料超填溝槽與基板101,接著以合適製程如化學機械研磨、蝕刻、上述之組合、或類似製程移除溝槽及鰭狀物103之外的多餘材料。在一實施例中,移除製程移除鰭狀物103上的任何介電材料,可露出鰭狀物103的表面以進行後續製程步驟。
一旦介電材料填入溝槽,接著可使介電材料凹陷以低於鰭狀物103的表面。可進行凹陷化步驟,以露出與鰭狀物103的上表面相鄰的鰭狀物103的側壁之至少一部份。使介電材料凹陷的方法可將鰭狀物103的上表面進入蝕刻劑如氫氟酸(但亦可採用其他蝕刻劑如氫氣)的濕蝕刻,亦可採用其他方法如反應性離子蝕刻、蝕刻劑為氨及/或三氟化氮的乾蝕刻、化學氧化物移除、或乾式化學清潔。介電材料自鰭狀物103的表面凹陷的距離可介於約50Å至約500Å之間,比如約400Å。在額外實施例中,凹陷化步驟亦可移除鰭狀物103上的任何殘留介電材料,確保露出鰭狀物103以用於後續製程。
上述步驟僅為將介電材料填入凹陷的整體製程流程的部份。舉例來說,亦可採用襯墊步驟、清潔步驟、退火步驟、填隙步驟、上述之組合、與類似步驟形成介電材料並將介電材料填入溝槽。所有可能的製程步驟均完全包含於此實施例的範疇。
在形成隔離區107之後,可形成虛置閘極介電層(或介面氧化物層)、虛置閘極介電層上的虛置閘極層、與虛置閘極間隔物層於每一鰭狀物103上。在一實施例中,虛置閘極介電層的形成方法為熱氧化、化學氣相沉積、濺鍍、或本技術領域用於形成閘極介電層的任何其他已知的合適方法。鰭狀物103的頂部上的虛置閘極介電層的厚度,可與鰭狀物103的側壁上的虛置閘極介電層的厚度不同,端視形成虛置閘極介電層的技術而定。
虛置閘極介電層的材料可包含氧化矽或氮氧化矽,其厚度可介於約3Å至約100Å之間,比如約10Å。虛置閘極介電層的組成可為高介電常數(比如介電常數大於約5)的材料,例如氧化鑭、氧化鋁、氧化鉿、氮氧化鉿、氧化鋯、或上述之組合,且其等效氧化物厚度介於約0.5Å至約100Å之間,比如小於或等於約10Å。此外,氧化矽、氮氧化矽、及/或高介電常數的材料的任何組合亦可用於虛置閘極介電層。
虛置閘極層可包含導電材料,比如多晶矽(如虛置多晶矽)、鎢、鋁、銅、鋁銅、鈦、氮化鈦鋁、碳化鉭、碳氮化鉭、氮化鉭矽、錳、鋯、氮化鈦、鉭、氮化鉭、鈷、鎳、上述之組合、或類似物。虛置閘極層的沉積方法可為化學氣相沉積、濺鍍沉積、或沉積導電材料所用的其他合適技術。虛置閘極層的厚度可介於約5Å至約200Å之間。虛置閘極層可具有不平坦的上表面,且可在圖案化虛置閘極層或蝕刻閘極的製程之前平坦化虛置閘極層。此時可或可不將離子導入虛置閘極層。舉例來說,可由離子佈植技術導入離子。
一旦形成虛置閘極介電層與虛置閘極層,即可圖案化上述兩者以形成一系列的虛置閘極於鰭狀物103上。虛置閘極定義多個通道區,其位於虛置閘極介電層下的鰭狀物103之每一側上。虛置閘極的形成方法可採用任何合適的沉積與光微影技術,以沉積與圖案化閘極遮罩於虛置閘極層上。閘極遮罩可結合任何合適的遮罩與犧牲材料,比如但不限於氧化矽、氮氧化矽、碳氮氧化矽、碳化矽、碳氧化矽、及/或氮化矽,且其沉積厚度可介於約5Å至約200Å之間。可採用乾蝕刻製程蝕刻虛置閘極層與虛置閘極介電層,以形成圖案化的虛製閘極。
一旦圖案化虛置閘極,即可形成間隔物105。間隔物105可形成於虛置閘極的兩側上。舉例來說,間隔物105的形成方法可為順應性地沉積間隔物層於之前形成的結構上。間隔物層可包含碳氮氧化矽、氮化矽、氮氧化物、碳化矽、氮氧化矽、碳氧化矽、氧化物、或類似物,且其形成方法可為形成此類層狀物的任何合適方法,比如化學氣相沉積、電漿輔助化學氣相沉積、濺鍍、或任何其他合適方法。間隔物層與隔離區107可包含不同蝕刻特性的不同介電材料,或相同介電材料。接著可圖案化間隔物105,比如由一或多道蝕刻自結構的水平表面移除間隔物層,以形成間隔物105。
一旦形成間隔物105,可移除虛置閘極與間隔物105未保護的鰭狀物103的部份,且移除方法可為採用虛置閘極與虛置閘極間隔物層作為硬遮罩的反應性離子蝕刻,或任何其他合適的移除製程。可持續移除直到鰭狀物103齊平或低於淺溝槽隔離區的上表面。
一旦移除鰭狀物103的部份,即放置並圖案化硬遮罩以覆蓋一系列的虛置閘極並再成長鰭狀物103,以形成鰭狀場效電晶體的源極/汲極區111。再成長鰭狀物103的方法可為選擇性磊晶成長鰭狀物103的材料。在鰭狀物103包含矽且鰭狀場效電晶體為p型裝置的一實施例中,再成長源極/汲極區111的材料可為矽、矽鍺、或磷化矽,且其晶格常數與通道區的晶格常數不同。磊晶成長製程可採用前驅物如矽烷、二氯矽烷、鍺烷、或類似物,且可持續約5分鐘至約120分鐘(如約30分鐘)。在其他實施例中,源極/汲極區111可包含材料如砷化鎵、磷化鎵、氮化鎵、磷化銦、砷化銦、銻化銦、磷砷化鎵、氮化鋁鎵、砷化鋁銦、砷化鋁鎵、砷化鎵銦、磷化鎵銦、磷砷化鎵銦、上述之組合、或類似物。
一旦形成源極/汲極區111,可佈植合適摻質至源極/汲極區111中,以補充鰭狀物103中的摻質。舉例來說,可佈植p型摻質如硼、鎵、銦、或類似物,以形成p型金氧半裝置。在其他實施例中,可佈植n型摻質如磷、砷、銻、或類似物,以形成n型金氧半裝置。這些摻質的佈植方法可採用虛置閘極與間隔物105作為遮罩。然而可採用任何其他合適製程、步驟、或類似參數以佈植摻質。舉例來說,可採用間隔物與襯墊層的多種組合進行多個佈植製程,形成具有特定形狀或特性的源極/汲極區以適用於特定目的。這些製程的任一者可用於佈植摻質,且上述內容並未侷限本發明實施例至上述步驟。
此時可另外移除在形成源極/汲極區111時覆蓋虛置閘極的硬遮罩。在一實施例中,硬遮罩的移除方法可採用濕蝕刻製程或乾蝕刻製程,其對硬遮罩的材料具有選擇性。然而可採用任何合適的移除製程。
一旦移除硬遮罩,可沉積蝕刻停止層於源極/汲極區111之上與間隔物105之間。在一實施例中,蝕刻停止層可為介電材料如氮化矽、碳氮化矽、或碳氮氧化矽,其於沉積腔室中的沉積方法可採用一或多道化學氣相沉積、原子層沉積、電漿輔助化學氣相沉積、低壓化學氣相沉積、或類似沉積製程。然而可採用任何合適材料與任何合適製程以沉積蝕刻停止層。
接著沉積層間介電層113如第零層間介電層於半導體基板101上。在一些實施例中,層間介電層113可包含材料如氧化矽或硼磷矽酸鹽玻璃,但亦可採用任何合適的介電層。層間介電層113的形成方法可採用化學氣相沉積製程如電漿輔助化學氣相沉積,但亦可採用任何其他合適製程如低壓化學氣相沉積。
一旦形成層間介電層113,可採用第一退火製程退火層間介電層113。在一實施例中,第一退火製程可為熱退火,其於爐中及惰性氣體下加熱基板101與層間介電層113。第一退火製程的溫度介於約200℃至約1000℃之間(比如約500℃),其可歷時約60秒至約360分鐘(比如約240分鐘)。
一旦進行沉積與退火之後,可平坦化層間介電層113,使層間介電層113的平坦化表面露出虛置閘極。一旦露出虛置閘極,可採用濕蝕刻製程移除虛置閘極,並取代為金屬閘極109。舉例來說,金屬閘極可包含高介電常數的閘極介電層、一或多個導電阻障層、一或多個功函數層、與導電填充材料。
在一些實施例中,高介電常數的閘極介電層包括材料如氧化鉿、氧化鋯、氧化鉿鋯、氧化鉿矽、氮氧化鉿矽、氧化鋯矽、氧化鉿鋯矽、氧化鋁、氧化鉿鋁、氮化鉿鋁、氧化鋯鋁、氧化鑭、氧化鈦、氧化鐿、或類似物,且其可為沉積製程如原子層沉積所形成的單層或複合層。然而可採用任何合適材料與任何合適製程形成高介電常數的閘極介電層。
在一些實施例中可形成一或多個擴散阻障層與一或多個功函數層以作為堆疊層。舉例來說,阻障層可為氮化鈦層,其可或可不摻雜矽。在形成具有個別金屬閘極109的p型鰭狀場效電晶體的例子中,個別金屬閘極109的堆疊層中的功函數層可包含鈦、鋁、鈦鋁、氮化鈦鋁、鉭、氮化鉭、碳化鈦鋁、碳化鉭鋁矽、碳化鉭鋁、氮化鈦矽、或類似物。在形成具有個別金屬閘極109的n型鰭狀場效電晶體的例子中,個別金屬閘極109的堆疊層中的功函數層可包含氮化鈦、氮化鉭、鈦鋁、鎢、鉭、鎳、鉑、或類似物。這些實施例在沉積功函數層之後,可形成阻障層如另一氮化鈦層。
在一些實施例中,導電填充材料的組成可為鎢、鈷、銅、釕、鋁、或類似物。導電填充材料沉積於高介電常數的閘極介電層的堆疊層、一或多個導電阻障層、與一或多個功函數上,以填入或超填個別金屬閘極109的個別間隔物105之間的保留空間。
一旦沉積金屬閘極109的層狀物且將導電填充材料完全填入(或超填)保留空間,即採用化學機械研磨製程平坦化材料。化學機械研磨製程可薄化金屬閘極109、個別間隔物105、與層間介電層113的材料,直到層間介電層113的平坦化表面露出金屬閘極109的平坦化表面與個別間隔物105的平坦化表面。
一旦平坦化層間介電層113並露出金屬閘極109與個別間隔物105的平坦表面,可採用第二退火製程再次退火層間介電層113。在一實施例中,第二退火製程可在爐中的惰性氣體下加熱基板101與層間介電層113。第二退火製程的溫度可介於約200℃至約1000℃之間(比如約500℃),且可歷時約60秒至約360分鐘(比如約240分鐘)。
圖2係形成切割金屬閘極穿過圖1所示的中間結構之一或多個金屬閘極109的一些初始步驟。一旦平坦化金屬閘極109,可形成一系列的硬遮罩層於層間介電層113與金屬閘極109的平坦化表面上。
在一些實施例中,一系列遮罩層的第一層可為接點蝕刻停止層201。接點蝕刻停止層201可形成於金屬閘極109與層間介電層113之平坦化的表面上,且其形成方法可為沉積材料如矽、氮化鈦、氮化矽、氧化矽、上述之組合、或類似物,而沉積方法可為原子層沉積、電漿輔助化學氣相沉積、化學氣相沉積、或類似製程。然而可採用任何合適材料與任何合適方法形成接點蝕刻停止層201。
硬遮罩層203可沉積於接點蝕刻停止層201上以作為第一系列遮罩層的第二層。硬遮罩層203形成於接點蝕刻停止層201上,其組成可為第二硬遮罩材料如氮化矽、氧化矽、上述之組合、或類似物。用以形成硬遮罩203的第二硬遮罩材料,與用以形成接點蝕刻停止層201的第一硬遮罩材料不同。如此一來,接點蝕刻停止層201可作為後續圖案化遮罩層203所用的蝕刻停止層。在一些實施例中,可採用沉積方法如原子層沉積、電漿輔助化學氣相沉積、化學氣相沉積、或類似方法將硬遮罩層203置於接點蝕刻停止層201上。然而可採用任何合適材料與任何合適方法形成硬遮罩層203。然而可採用任何合適材料與製程形成第一系列硬遮罩層中的硬遮罩層203。
如圖3所示,沉積光阻層303於硬遮罩層203上,並圖案化光阻層303以形成穿過光阻層303的開口301。在實施例中,光阻層303可沉積於硬遮罩層203上,以作為第一系列遮罩層的第三層。光阻層303的沉積方法可採用任何合適沉積製程以具有任何合適厚度,且可採用任何合適光微影法圖案化光阻層303,以形成開口301穿過光阻層303,並露出一或多個金屬閘極109之上的區域中的第一系列硬遮罩層的硬遮罩層203的表面。
如圖4所示,採用第一蝕刻劑將圖3的光阻層303的圖案轉移至硬遮罩層203,以形成穿過硬遮罩層203的開口401的圖案。在一些實施例中,第一蝕刻劑可採用反應物氣體,其對形成硬遮罩層203所用的第二硬遮罩材料的蝕刻選擇性,大於對形成接點蝕刻停止層201所用的第一硬遮罩材料的蝕刻選擇性。如此一來,接點蝕刻停止層201作為接點蝕刻停止層,且開口401露出一或多個金屬閘極109之上的接點蝕刻停止層201的區域。在一些實施例中,蝕刻製程可採用含碳與氟的氣體如四氟化碳、二氟甲烷、氟仿、或類似物。然而第一蝕刻劑可採用任何合適物。
在一些實施例中,X切面中的開口401可具有一或多個寬度W401X ,其介於約10nm至約500nm之間(比如約100nm),而Y切面中的開口401可具有一或多個寬度W401Y ,其介於約1nm至約50nm之間(比如約30nm)。然而開口401可採用任何合適寬度。一旦形成開口401,即移除殘留的光阻層303。
如圖5所示,再沉積第二硬遮罩材料如遮罩層503可窄化開口401,以形成窄開口501。遮罩層503的形成方法可為順應性的沉積製程如化學氣相沉積或原子層沉積,使遮罩層503襯墊接點蝕刻停止層201的露出表面、硬遮罩層203的露出表面、與穿過硬遮罩層203的開口401的側壁。在一些實施例中,遮罩層503的組成可與硬遮罩層203的組成相同,比如均為氮化矽。在實施例中,遮罩層503具有高度一致的厚度,其介於約10Å至約100Å之間,比如約50Å。如此一來,X切面中的窄開口501的一或多個寬度W501X 介於約10nm至約500nm之間(如約100nm),而Y切面中的窄開口501的一或多個寬度W501Y 介於約1nm至約50nm之間(如約30nm)。然而窄開口501可採用任何合適寬度。
如圖6所示,進行非等向蝕刻製程以移除襯墊窄開口501之底部的遮罩層503的部份。在非等向蝕刻製程時,接點蝕刻停止層201作為接點蝕刻停止層。如此一來,窄開口501再露出一或多個金屬閘極109之上的接點蝕刻停止層201的區域之至少部份。在非等向蝕刻中,移除襯墊窄開口501底部的遮罩層503的水平部份,而窄開口501的側壁上的遮罩層503的垂直部份維持完整。如此一來,窄開口501的側壁部份上的垂直部份可形成完整的環狀物,其尺寸對應圖5所示的寬度W501X 與W501Y ,並對應圖1所示的切線A-A’、B-B’、與C-C’。在一些實施例中,可進行非等向蝕刻製程以移除襯墊窄開口501之底部的遮罩層503,其可採用含碳與氟的氣體(如四氟化碳、二氟甲烷、氟仿、或類似物)。然而可採用任何合適氣體以用於非等向蝕刻製程。
如圖7所示,進行切割金屬閘極的蝕刻製程以移除接點蝕刻停止層201的露出部份,並移除金屬閘極109的一或多個目標部份與相關的間隔物105及層間介電層113的部份,以形成切割金屬閘極溝槽701。此切割金屬閘極蝕刻製程將金屬閘極109的一或多個目標部份分隔成金屬閘極的第一部份109a與第二部份109b,可有效切開第一部份與第二部份,如圖7的第一Y切面所示。切割金屬閘極的切割製程亦將源極/汲極區的層間介電層113的一或多個目標部份分成層間介電層113的第一部份113a與第二部份113b,可有效切開第一部份與第二部份,如圖7的第二Y切面所示。在一些實施例中,切割金屬閘極蝕刻製程包括採用含氯或含氟氣體(如氯氣、三氟化氮、四氯化矽、或三氯化硼)、氧氣、氮氣、氫氣、上述之組合、或類似物的乾蝕刻。然而可採用任何合適的乾蝕刻氣體以用於切割金屬閘極的蝕刻製程。
在一些實施例中,切割金屬閘極溝槽701的第一部份具有第一深度D1,而切割金屬閘極溝槽701的第二部份具有第二深度D2。切割金屬閘極溝槽701的第一部份的形成方法,可為移除金屬閘極109的目標部份的材料、移除間隔物105的目標部份的材料、以及移除金屬閘極109的目標部份與間隔物105的目標部份之下的層間介電層113的部份的材料。如此一來,切割金屬閘極溝槽701的第一部份可具有第一寬度W701X1 以對應金屬閘極109的目標閘極寬度,並對應層間介電層113中的目標間隔物105的厚度。
切割金屬閘極溝槽701的第二部份之形成方法,可為移除沿著開口401 (穿過硬遮罩層203)之垂直側壁形成的遮罩層503,並移除沿著開口401 (穿過硬遮罩層203)之垂直側壁形成的遮罩層503之下的層間介電層113的部份。如此一來,切割金屬閘極溝槽701的第二寬度W701X2 ,可對應硬遮罩層203中的開口的寬度W401X
圖7亦顯示第一Y切面(沿著靠近切割金屬閘極溝槽701或位於切割金屬閘極溝槽701之中心的切線B-B’)所示,切割金屬閘極溝槽701具有第一深度D1,且目標的金屬閘極109完全分開(如切開)成第一部份109a與第二部份109b。如圖7的第二Y切面(沿著靠近或位於切割金屬閘極溝槽701的源極/汲極區111的區域之切線C-C’) 所示,切割金屬閘極溝槽701具有第二深度D2,層間介電層108的一部份保留於隔離區107上,且隔離區107分開相鄰裝置的鰭狀物103的一部份。
在一些實施例中,切割金屬閘極溝槽701的第一深度D1可介於約50nm至約200nm之間(比如約100nm),而第一寬度W701X1 可介於約10nm至約500nm之間(比如約100nm)。切割金屬閘極溝槽701的第二深度D2可介於約50nm至約200nm之間(比如約100nm),而第二寬度W701X2 可介於約1nm至約50nm之間(比如約30nm)。然而切割金屬閘極溝槽701的第一深度D1與第二深度D2可採用任何合適深度,且切割金屬閘極溝槽701的第一寬度W701X1 與第二寬度W701X2 可採用任何合適寬度。
如圖7所示,在切割金屬閘極的蝕刻製程時,遮罩層503的材料、目標金屬閘極109的材料、間隔物105的材料、層間介電層113的材料、與反應物氣體之間的反應可產生副產物如殘留的副產物材料703 (如聚合物)。以圖7為例,殘留的副產物材料703可形成於硬遮罩層203上並沿著切割金屬閘極溝槽701的側壁。
如圖8所示,移除殘留的副產物材料703。一旦形成切割金屬閘極溝槽701,可進行聚合物的移除製程以移除任何殘留的副產物材料703。舉例來說,採用氫氟酸及/或氨氣的無電漿配方可用於移除聚合物材料。具有氫氟酸及/或氨氣的無電漿配方對金屬的選擇性低,且可在移除殘留的副產物材料703時調整壓力與溫度,使無電漿配方調整至對氮化矽具有不同選擇性。
一旦移除殘留的副產物材料703,可進行濕式清潔以確保清潔切割金屬閘極溝槽701的表面以用於後續製程。在一些實施例中,可採用SC-1或SC-2清潔溶液以用於濕式清潔製程。不過亦可採用其他溶液如硫酸與過氧化氫的混合物(如已知的SPM)或氫氟酸溶液。然而可採用任何合適溶液或任何合適製程以用於濕式清潔製程,其完全包含於實施例的範疇中。
如圖9所示,沉積第一切割金屬閘極再填充材料901於圖8中的切割金屬閘極溝槽701中。一旦移除殘留的副產物材料703並進行濕式清潔製程,可移除硬遮罩層203的任何殘留材料。一旦移除硬遮罩層203,可將第一切割金屬閘極再填充材料901填入切割金屬閘極溝槽701。第一切割金屬閘極再填充材料901可為介電材料如氮化矽、碳氧化矽、及/或碳氮氧化矽,其中碳含量介於約1wt%至10wt%之間,其中氮含量小於約50wt%。上述材料可為(Si)(1-y) Ny 、(SiO)(1-x) Cx 、及/或(SiO)(1-x-y) Cx Ny ,其中x=0.01至0.1且y>0.5。第一切割金屬閘極再填充材料901的沉積製程可採用電漿輔助化學氣相沉積、原子層沉積、化學氣相沉積、或類似製程。在一實施例中,第一切割金屬閘極再填充材料901可沉積於接點蝕刻停止層201上,並超填切割金屬閘極溝槽701至高於接點蝕刻停止層201的上表面。
如圖10所示,平坦化第一切割金屬閘極再填充材料901以移除多餘的第一切割金屬閘極再填充材料901,且平坦化方法可採用化學機械研磨製程。可持續化學機械研磨的平坦化製程,直到完全移除接點蝕刻停止層201,且自第一層間介電層113的平坦表面露出第一切割金屬閘極再填充材料901的表面、金屬閘極109的表面、與個別間隔物105的表面。如此一來,自第一切割金屬閘極再填充材料901的保留材料所形成的切割金屬閘極再填充插塞1001,可位於層間介電層113中。在一些實施例中,一旦減少金屬閘極109的高度與切割金屬閘極再填充插塞1001的高度,其可減少至整體的第一高度H1,而整體的第一高度H1可介於約5nm至約50nm之間(比如約20nm)。然而金屬閘極109與切割金屬閘極再填充插塞1001可採用任何合適高度。
如圖11所示,使切割金屬閘極再填充插塞1001與層間介電層113凹陷,以形成淺凹陷1101。使切割金屬閘極再填充插塞1001與層間介電層113凹陷的方法可採用濕蝕刻製程,其可視作淺凹陷蝕刻。淺凹陷蝕刻可為時控蝕刻製程,其對層間介電層113的材料具有第一蝕刻速率,且對切割金屬閘極再填充插塞1001具有第二蝕刻速率,其中第二蝕刻速率大於第一蝕刻速率。如此一來,淺凹陷蝕刻對層間介電層與切割金屬閘極材料的時控蝕刻速率比例小於1且大於或等於0。綜上所述,淺凹陷蝕刻使切割金屬閘極再填充插塞1001凹陷的量,大於淺凹陷蝕刻製程使層間介電層113凹陷的量。
在一些實施例中,淺凹陷蝕刻所用的層間介電層與切割金屬閘極的材料之第一時控速率的蝕刻速率比例可介於約0:1至約1:1之間(比如約0.5:1),而蝕刻時間可介於約5秒至約300秒之間(比如約100秒)。在一些實施例中,為了形成淺凹陷1101,層間介電層113可自一開始整體的第一高度H1凹陷第一凹陷深度RD1,且第一凹陷深度RD1可介於約1nm至約20nm之間(如約5nm)。切割金屬閘極再填充插塞1001可自一開始整體的第一高度H1凹陷第二凹陷深度RD2,且第二凹陷深度RD2可介於約1nm至約20nm之間(如約10nm)。然而層間介電層113的第一凹陷深度RD1,與切割金屬閘極再填充插塞1001的第二凹陷深度RD2可採用任何合適深度。
在一些實施例中,切割金屬閘極淺凹陷的蝕刻製程包括將切割金屬閘極再填充插塞1001的上表面浸入蝕刻劑如氫氟酸的濕蝕刻,但亦可採用其他蝕刻劑如氫氣,或採用其他方法如反應性離子蝕刻、採用蝕刻劑如氨及/或三氟化氮的乾蝕刻、化學氧化物移除、或採用含氯或含氟氣體(如氯氣、三氟化氮、四氯化矽、三氯化硼、氧氣、氮氣、氫氣、氬氣、上述之組合、或類似物)的乾式化學清潔製程。然而可採用任何合適的乾蝕刻氣體以用於切割金屬閘極淺凹陷的蝕刻製程。
如圖12所示,形成第二切割金屬閘極再填充材料1201。一旦形成淺溝槽1101於層間介電層113與切割金屬閘極再填充插塞1001中, 可沉積第二切割金屬閘極再填充材料1201於層間介電層113上,以超填淺溝槽1101至整體的第二高度H2,並順應性地覆蓋層間介電層113的露出表面、切割金屬閘極再填充插塞1001的露出表面、間隔物105的露出表面、與金屬閘極109的露出表面。第二金屬閘極再填充材料1201可為介電材料如碳氧化矽或碳氮氧化矽,其中碳含量介於約1wt%至10wt%之間,其中氮含量小於約20wt%。上述材料可為(SiO)(1-x) Cx 、及/或(SiO)(1-x-y) Cx Ny ,其中x=0.01至0.1且y>0.2。第二切割金屬閘極再填充材料1201比切割金屬閘極再填充插塞1001的第一切割金屬閘極再填充材料901硬,且兩者為不同的介電材料,在一實施例中,第二切割金屬閘極再填充材料1201的整體的第二高度H2高於切割金屬閘極再填充插塞1001的凹陷表面。在一些實施例中,整體的第二高度H2介於約11nm至約50nm之間,比如約20nm。
如圖13所示,形成多個隔離區1303於層間介電層113中。一旦沉積第二切割金屬閘極再填充材料1201,即可隨著平坦化層間介電層113、間隔物105、與金屬閘極109的製程,平坦化第二切割金屬閘極再填充材料1201以形成多個隔離區1303。在一些實施例中,可採用平坦化的方法如化學機械研磨製程,以移除第二切割金屬閘極再填充材料1201的多餘材料、金屬閘極109的多餘材料、間隔物105的多餘材料、以及層間介電層113的多餘材料。可持續化學機械研磨製程,直到第二切割金屬閘極再填充材料1201的表面、間隔物105的表面、金屬閘極109的表面、與層間介電層113的平坦表面自整體的第一高度H1減少至整體的第三高度H3,以及直到自層間介電層113的平坦表面露出間隔物105的表面、金屬閘極109的表面、與第二切割金屬閘極再填充材料1201的表面。如此一來,形成多個隔離區1303於層間介電層113中。隔離區1303包括第一切割金屬閘極再填充材料901所形成的切割金屬閘極再填充插塞1001,以及第二切割金屬閘極再填充材料1201所形成的切割金屬閘極蓋1301位於切割金屬閘極再填充插塞1001上。
在一些實施例中,一旦進行平坦化製程,平坦化的層間介電層113的高度、金屬閘極109的高度、間隔物105的高度、與第二切割金屬閘極再填充材料1201的高度將縮小至整體的第三高度H3,其介於約5nm至約50nm之間(比如約30nm)。在一些實施例中,隔離區1303的部份如切割金屬閘極再填充插塞1001,為隔離區1303的整體高度的約50%至約99%。隔離區1303的部份如切割金屬閘極蓋1301,為隔離區1303的整體高度的約50%至約1%。舉例來說,切割金屬閘極再填充插塞1001的第一厚度Th1可介於約5nm至約45nm之間(比如約30nm),而切割金屬閘極蓋1301的第二厚度Th2可介於約1nm至約30nm之間(比如約20nm)。然而整體的第三高度H3、第一厚度Th1、與第二厚度Th2可採用任何合適高度或任何合適厚度。
圖13亦顯示多個隔離區1303形成於層間介電層113中的相關X切面與Y切面。在切線A-A’的方向中的X切面中,隔離區1303延伸於層間介電層113中的金屬閘極109的相鄰閘極之間,而切割金屬閘極蓋1301可自層間介電層113的平坦表面與金屬閘極109的露出部份一起露出。在第一Y切面中,隔離區1303延伸穿過切線B-B’並分隔金屬閘極109的第一部份109a與第二部份109b。此外,層間介電層113的平坦表面中的第一部份109a與第二部份109b的表面露出切割金屬閘極蓋1301。在第二Y切面中,隔離區1303延伸穿過切線C-C’並分隔第一源極/汲極區111a與第二源極/汲極區111b。此外,第二Y切面中的層間介電層113的平坦表面中的第一部份109a與第二部份109b的表面露出隔離區1303的切割金屬閘極蓋1301。
如圖14所示,一旦形成隔離區1303且自層間介電層113的平坦表面露出切割金屬閘極蓋1301,可形成第二系列的硬遮罩層於層間介電層113的平坦化表面、金屬閘極109的露出部份、間隔物105的露出部份、與切割金屬閘極蓋1301的露出部份上。
在一些實施例中,第二系列的遮罩層中的第一層可為接點蝕刻停止層1401。接點蝕刻停止層1401可為毯覆性沉積的層狀物,其組成可為矽、氮化鈦、氮化矽、氧化矽、上述之組合、或類似物,且其沉積方法可採用原子層沉積、電漿輔助化學氣相沉積、化學氣相沉積、或類似方法。然而可採用任何合適材料與任何合適方法以形成接點蝕刻停止層1401。在一些實施例中,接點蝕刻停止層1401的厚度可介於約10Å至約200Å之間,比如約50Å。然而第二系列的硬遮罩層的接點蝕刻停止層1401可採用任何合適厚度。
硬遮罩層1403可沉積於接點蝕刻停止層1401上,以做為第二系列的遮罩層之第二層。形成於接點蝕刻停止層1401上的硬遮罩層1403的組成可為第二硬遮罩材料如矽、氧化矽、氮化矽、上述之化合物、或類似物。用於形成硬遮罩層1403的第二硬遮罩材料,與用於形成接點蝕刻停止層1401的第一硬遮罩材料不同。如此一來,接點蝕刻停止層1401可作為後續圖案化第二系列硬遮罩層的硬遮罩層1403的蝕刻停止層。在一些實施例中,將第二系列的硬遮罩層中的硬遮罩層1403置於接點蝕刻停止層1401上的步驟,可採用沉積法如原子層沉積、電漿輔助化學氣相沉積、化學氣相沉積、或類似方法。然而可採用任何合適材料與任何合適方法形成硬遮罩層1403。在一些實施例中,硬遮罩層1403的厚度介於約10Å至約500Å之間,比如約100Å。然而第二系列的硬遮罩層中的硬遮罩層1403可具有任何合適厚度。
如圖15所示,係沉積與圖案化光阻層1501所用的光微影製程,且光阻層1501用於形成開口1503穿過第二系列硬遮罩層中的硬遮罩層1403。在實施例中,可沉積光阻層1501於硬遮罩層1403上,以作為第二系列遮罩層的第三層。光阻層1501的沉積方法可採用任何合適的沉積製程形成至任何合適厚度,且可採用任何合適的光微影法圖案化光阻層1501,以形成開口1503穿過光阻層1501並露出一或多個隔離區1303上的區域中的第二系列硬遮罩層的硬遮罩層1403的表面。在一些實施例中,施加並圖案化光阻層1501以覆蓋一些隔離區1303,而光阻層1501的開口1503露出其他隔離區1303。圖15A亦顯示虛線框的部份1700之細節圖,其為光阻層1501中的開口1503下的第二Y切面之部份。部份1700與此處強調的結構將詳述於下。
圖15B係一些實施例中,圖15A所示的第二Y切面之部份1700的細節圖。圖15B更顯示具有開口1503的圖案化的光阻層1501,且開口1503露出硬遮罩層1403的表面。此外,圖15顯示在形成開口1603穿過第二系列的硬遮罩層(如硬遮罩層1403與接點蝕刻停止層1401)至層間介電層113之前的隔離區1303,與埋置於層間介電層的第一部份113a與第二部份113b中的其他結構。在一些實施例中,隔離區1303可具有切割金屬閘極再填充插塞1001與切割金屬閘極蓋1301。
如圖16所示,採用圖案化的光阻層1501形成開口1603穿過第二系列的硬遮罩層。在一些實施例中,可在採用第二系列的硬遮罩層作為遮罩並蝕刻層間介電層113之前,移除光阻層1501。在其他實施例中,在蝕刻層間介電層113之後移除光阻層1501。採用圖案化的第二系列的硬遮罩層並蝕刻層間介電層113中,可露出切割金屬閘極蓋1301的表面,並露出開口1603中的第一源極/汲極區111a與第二源極/汲極區111b的磊晶部份的表面,以用於後續處理與形成第一源極/汲極區111a與第二源極/汲極區111b所用的金屬接點。在一些實施例中,用於形成開口1603及蝕刻至層間介電層113中的蝕刻製程,可移除第二系列硬遮罩層(如接點蝕刻停止層1401與硬遮罩層1403)的第一層與第二層,且可採用含碳與氟的氣體如四氟化碳、二氟化碳、氟仿、或類似物。然而可採用任何合適氣體。
在此處所述的一些實施例中,採用時控蝕刻製程蝕刻層間介電層113。在時控蝕刻製程中,可同時以第一時控蝕刻速率蝕刻層間介電層113的第一部份113a與第二部份113b的材料,並以第二時控蝕刻速率蝕刻切割金屬閘極蓋1301的材料。在一些實施例中,時控蝕刻製程的第二時控蝕刻速率小於第一時控蝕刻速率。換言之,時控蝕刻製程的蝕刻速率比例為第一時控蝕刻速率/第二時控蝕刻速率,其大於1。如此一來,層間介電層113的材料之移除速率,大於切割金屬閘極蓋1301的材料之移除速率。
在一些實施例中,時控蝕刻製程對層間介電層113與切割金屬閘極蓋1301的蝕刻速率比例介於約10:8至約100:1之間(比如約20:1),且蝕刻時間介於約5秒至約300秒之間(比如約50秒)。然而時控蝕刻製程可採用任何合適的蝕刻速率比例。在一些實施例中,層間介電層113的第一時控蝕刻速率可介於約2Å/秒至約100Å/秒之間(比如約10Å/秒),而切割金屬閘極蓋1301的第二時控蝕刻速率可介於約1Å/秒至約100Å/秒之間(比如約8Å /秒)。然而第一時控蝕刻速率與第二時控蝕刻速率可採用任何合適的蝕刻速率。
在一些實施例中,淺凹陷蝕刻所用的層間介電層/切割金屬閘極材料的第一時控蝕刻速率比例可介於約0:1至約1:1之間(比如約1:1),且蝕刻時間可介於約5秒至約300秒之間(比如約50秒)。一些實施例未形成淺凹陷,可使層間介電層113凹陷的第一凹陷深度介於約1nm至約20nm之間(如約20nm),並使切割金屬閘極蓋1301凹陷的第二凹陷深度介於約1nm至約20nm之間(如約3nm)或小於切割金屬閘極蓋1301的約25%。然而可採用任何合適深度。
圖16亦顯示虛線框的部份1800之細節圖,包括露出層間介電層113的第一部份113a與第二部份113b中的切割金屬閘極蓋1301,以及第一源極/汲極區111a與第二源極/汲極區111b的表面之開口1603之下的第二Y切面的部份。此處強調的部份1800與結構將進一步詳述於下。
圖17係一些實施例中,形成圖16所示的Y切面之源極/汲極區上的開口1603所用的蝕刻製程之部份1800的細節圖。圖15B亦顯示具有開口1503的圖案化的光阻層1501,以及開口1053所露出的硬遮罩層1403的表面。此外,圖17顯示實施例中形成開口1603至層間介電層113中之後的隔離區1303,以及埋置於層間介電層113的第一部份113a與第二部份113b中的其他結構。在層間介電層蝕刻製程時,可移除切割金屬閘極蓋1301的一些材料。如此一來,切割金屬閘極蓋1301的高度可減少至最終蓋高度HH ,其介於約0nm至約5nm之間(比如約2nm),而與切割金屬閘極再填充插塞1001相鄰的層間介電層113減少至最終高度ILDH,其介於約1nm至約50nm之間(比如約30nm)。
當切割金屬閘極保護蓋結構形成為切割金屬閘極虛置閘極插塞的頂部,則不需在進行接點蝕刻之後清潔殘留物,因為虛置切割金屬閘極接點插塞的再填充材料只形成最少量的殘留物或無殘留物。如此一來,最終切割金屬閘極裝置可具有改善的交流電效能,因為在接點蝕刻製程時只有少量或無殘留物位於磊晶表面上,其可提供磊晶表面與後續形成於磊晶層上的接點結構之間的表面接觸所用的表面。此外,最終切割金屬閘極裝置可具有良好的電容效率效能,因為接點蝕刻製程時未損傷切割金屬閘極再填充層,且未損失虛置切割金屬閘極接點插塞的再填充材料,其可使後續形成於虛置切割金屬閘極接點插塞的區域中的導電切割金屬閘極插塞具有所需尺寸。
一些實施例若仍需清潔殘留物,可視情況採用較弱溶液以最小化對磊晶表面的損傷。舉例來說,較弱溶液如去離子水、SC1/SC2、臭氧、或類似物可用於移除任何不想要的殘留物。藉由採用較弱溶液,對磊晶的損傷小或無損傷,且仍可達上述優點。
一旦形成開口1603,可形成第一接點1605以電性連接源極/汲極區111。在形成第一接點1605之前,可視情況形成矽化物接點。矽化物接點可包含鈦、鎳、鈷、或鉺以降低接點的肖特基能障,然而亦可採用其他金屬如鉑、鈀、或類似物。矽化方法可為毯覆性地沉積合適的金屬材料,接著進行退火步驟使金屬與下方露出的矽反應。接著移除未反應的金屬,且移除方法可為選擇性蝕刻製程。矽化物接點的厚度可介於約5nm至約50nm之間。
在所述實施例中,第一接點1605可包含導電材料如鈦、鎢、氮化鈦鋁、碳化鉭、碳氮化鉭、氮化鉭矽、錳、鋯、氮化鈦、氮化鉭、釕、鉬、或氮化鎢,但亦可為任何其他合適材料如鋁、銅、上述之合金、上述之組合、或類似物。沉積導電材料至開口中以填入及/或超填開口的製程,可為濺鍍、化學氣相沉積、電鍍、無電鍍、或類似方法。一旦填入或超填導電材料,可採用平坦化製程如化學機械研磨移除開口之外的沉積材料,不過亦可採用任何合適製程移除導電材料。
在一實施例中,方法包括形成開口於半導體裝置的切割金屬閘極區中;沉積第一再填充材料於開口中以形成切割金屬閘極插塞;進行化學機械研磨以露出金屬閘極結構;蝕刻第一再填充材料以形成凹陷於切割金屬閘極插塞中;將第二再填充材料填入凹陷以形成蓋結構於切割金屬閘極插塞的第一再填充材料上;以及形成多個接點至切割金屬閘極插塞所分隔的多個相鄰裝置的多個源極/汲極區。在一實施例中,形成接點的步驟更包括:以第一蝕刻速率蝕刻源極/汲極區中的層間介電材料;以及以第二蝕刻速率蝕刻蓋結構,使接點開口形成於相鄰裝置的源極/汲極區上並露出源極/汲極區的上表面,且第二蝕刻速率與第一蝕刻速率不同。在一實施例中,層間介電材料的蝕刻速率,與蓋結構的第二再填充材料的蝕刻速率之間的蝕刻速率比例大於1:1。在一實施例中,蝕刻速率比例大於20:1。在一實施例中,蝕刻蓋結構的步驟包括移除小於25%的蓋結構。在一實施例中,蝕刻第一再填充材料以形成凹陷於切割金屬閘極插塞中的步驟更包括:以第一蝕刻速率蝕刻層間介電材料至第一深度;以及以第二蝕刻速率蝕刻第一再填充材料至第二深度,第二蝕刻速率大於第一蝕刻速率,且第二深度大於第一深度。在一實施例中,層間介電材料的第一蝕刻速率與第一再填充材料的第二蝕刻速率之間的蝕刻速率比例小於1:1。
在另一實施例中,方法包括:形成第一金屬閘極於第一半導體鰭狀物上;形成第一開口穿過第一金屬閘極;將第一介電材料填入第一開口;平坦化第一介電材料與第一金屬閘極;使第一介電材料凹陷,以形成第二開口;將第二介電材料填入第二開口;以及平坦化第二介電材料與第一金屬閘極。在一實施例中,方法更包括成長第一磊晶源極/汲極區於第一半導體鰭狀物上;形成第一開口穿過圍繞第一磊晶源極/汲極區周圍的層間介電層的第一部份,其中平坦化第二介電材料與第一金屬閘極的步驟包括平坦化層間介電層的第一部份與第一金屬閘極;以及蝕刻層間介電層的第一部份,以露出第一磊晶源極/汲極區,並移除第一磊晶源極/汲極區與層間介電層的第一部份中的第二介電材料之間的層間介電層的材料的至少一部份。在一實施例中,第二介電材料的硬度大於第一介電材料的硬度。在一實施例中,蝕刻層間介電層的第一部份之步驟更包括採用時控蝕刻製程,其對層間介電層的材料具有第一蝕刻速率,對第二介電材料具有第二蝕刻速率,且第二蝕刻速率小於第一蝕刻速率。在一實施例中,第二蝕刻速率比第一蝕刻速率小至少兩倍。在一些實施例中,第二蝕刻速率比第一蝕刻速率小至少20倍。在一實施例中,蝕刻層間介電層的第一部份之步驟更包括移除層間介電層的第一部份中小於25%的第二介電材料。
在又一實施例中,半導體裝置包括多個金屬閘極結構,位於基板上的層間介電層中;以及隔離結構,位於金屬閘極結構之間,且隔離結構包括介電蓋部份位於介電插塞部份上,其中隔離結構至少部份埋置於層間介電層中,並電性隔離與物理分隔層間介電層中的第一裝置的源極/汲極與第二裝置的源極/汲極。在一實施例中,介電蓋部份包括第一材料,介電插塞部份包括第二材料,且第一材料與第二材料不同。在一實施例中,隔離結構的介電蓋部份與介電插塞部份之間的界面,低於第一裝置的源極/汲極接點覆蓋的磊晶區上表面。在一實施例中,介電蓋部份的平坦表面位於層間介電層的平坦表面中。在一實施例中,第一材料比第二材料硬。
本發明已以數個實施例揭露如上,以利本技術領域中具有通常知識者理解本發明。本技術領域中具有通常知識者可採用本發明為基礎,設計或調整其他製程與結構,用以實施實施例的相同目的,及/或達到實施例的相同優點。本技術領域中具有通常知識者應理解上述等效置換並未偏離本發明之精神與範疇,並可在未偏離本發明之精神與範疇下進行這些不同的改變、置換、與調整。
A-A’、B-B’、C-C’:切線 D1:第一深度 D2:第二深度 HH:最終蓋高度 H1:第一高度 H2:第二高度 H3:第三高度 ILDH:最終高度 RD1:第一凹陷深度 RD2:第二凹陷深度 Th1:第一厚度 Th2:第二厚度 W401X、W401Y、W501X、W501Y:寬度 W701X1:第一寬度 W701X2:第二寬度 101:基板 103:鰭狀物 105:間隔物 107、1303:隔離區 108:層間介電層 109:金屬閘極 109a、113a:第一部份 109b、113b:第二部份 111:源極/汲極區 111a:第一源極/汲極區 111b:第二源極/汲極區 113:層間介電層 201、1401:接點蝕刻停止層 203、1403:硬遮罩層 301、401、1503、1603:開口 303:光阻層 501:窄開口 503:遮罩層 701:切割金屬閘極溝槽 703:殘留的副產物材料 901:第一切割金屬閘極再填充材料 1001:切割金屬閘極再填充插塞 1101:淺溝槽 1201:第二切割金屬閘極再填充材料 1301:切割金屬閘極蓋 1501:光阻層 1605:第一接點 1700、1800:部份
圖1係一些實施例中,一些初始製作步驟形成半導體鰭狀物於基板中並形成金屬閘極於半導體鰭狀物的通道區上的半導體裝置。 圖2係一些實施例中的沉積製程。 圖3係一些實施例中的沉積與圖案化製程。 圖4係一些實施例中的溝槽圖案化製程。 圖5係一些實施例中的沉積製程。 圖6係一些實施例中的移除製程。 圖7係一些實施例中,形成多個切割金屬閘極開口穿過多個金屬閘極的製程。 圖8係一些實施例中,移除高分子副產物與濕式清潔製程。 圖9係一些實施例中的再填充製程。 圖10係一些實施例的平坦化製程。 圖11係一些實施例中的凹陷製程。 圖12係一些實施例中的再填充製程。 圖13係一些實施例中的平坦化製程。 圖14係一些實施例中的沉積製程。 圖15A與15B係一些實施例中的光微影製程。 圖16係一些實施例中,形成接點開口的移除製程。 圖17係一些實施例中,形成接點開口於源極/汲極區上的移除製程沿著圖16所示的Y切面的細節圖。
HH:最終蓋高度
ILDH:最終高度
103:鰭狀物
107、1303:隔離區
111a:第一源極/汲極區
111b:第二源極/汲極區
113a:第一部份
113b:第二部份
1001:切割金屬閘極再填充插塞
1301:切割金屬閘極蓋
1401:接點蝕刻停止層
1403:硬遮罩層
1501:光阻層
1603:開口
1800:部份

Claims (1)

  1. 一種半導體裝置的形成方法,包括: 形成一開口於一半導體裝置的一切割金屬閘極區中; 沉積一第一再填充材料於該開口中以形成一切割金屬閘極插塞; 進行一化學機械研磨以露出一金屬閘極結構; 蝕刻該第一再填充材料以形成一凹陷於該切割金屬閘極插塞中; 將一第二再填充材料填入該凹陷以形成一蓋結構於該切割金屬閘極插塞的該第一再填充材料上;以及 形成多個接點至該切割金屬閘極插塞所分隔的多個相鄰裝置的多個源極/汲極區。
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