TW201943028A - 板狀物的加工方法 - Google Patents

板狀物的加工方法 Download PDF

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Publication number
TW201943028A
TW201943028A TW108110294A TW108110294A TW201943028A TW 201943028 A TW201943028 A TW 201943028A TW 108110294 A TW108110294 A TW 108110294A TW 108110294 A TW108110294 A TW 108110294A TW 201943028 A TW201943028 A TW 201943028A
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Taiwan
Prior art keywords
protective member
package
holding
plate
substrate
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TW108110294A
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English (en)
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TWI811317B (zh
Inventor
金永奭
張秉得
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日商迪思科股份有限公司
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Publication of TW201943028A publication Critical patent/TW201943028A/zh
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Publication of TWI811317B publication Critical patent/TWI811317B/zh

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Abstract

[課題]在不引起端子不良下適當地加工板狀物。[解決手段]一種加工方法，沿著分割預定線將板狀物分割為個個封裝件，其中，將保護構件黏貼至板狀物的端子側以一體化，沿著分割預定線將板狀物單體化為個個封裝件，在封裝件的正面形成導電性的屏蔽層，並將保護構件從各封裝件剝離。

Description

板狀物的加工方法
本發明係關於板狀物的加工方法。
作為板狀物的加工方法，已知的有藉由切割將封裝基板等板狀物沿著分割預定線單體化（例如，參閱專利文獻1）之技術。在專利文獻1所記載之加工方法中，配線基板一邊的面上配設有凸塊等的端子，並且在配線基板另一邊的面上配備半導體晶片，且以密封劑一起密封以形成封裝基板。藉由沿著封裝基板的分割預定線進行切割，封裝基板被分割為個個封裝件，分割後的封裝件透過端子安裝在主基板等上。
[習知技術文獻]
[專利文獻]
[專利文獻1]日本特開2012-039104號公報
[發明所欲解決的課題]
在將上述之板狀物從樹脂層側進行加工以單體化的情況下，需要將板狀物的端子側保持在保持治具或保持膠膜上。以保持治具吸引保持端子時，有損傷端子的風險。以保持膠膜保持時，難以在膠膜本來的特性上附加端子保護的特性，同樣地也有損傷端子的風險。此外，雖然也可考慮保持端子的相反側，但會有露出之端子被加工屑刮傷、加工屑附著在端子上的情況。
本發明係鑑於此點而提出，目的之一在於提供一種板狀物的加工方法，其能夠在不引起端子不良下適當地加工板狀物。
[解決課題的技術手段]
本發明之一態樣之板狀物的加工方法，係沿著分割預定線將板狀物分割為個個封裝件，該板狀物係在交叉之該分割預定線所劃分的配線基材之一邊的面的區域中形成多個端子，且在配線基板之另一邊的面的區域中接合半導體晶片並以密封劑密封而成，該板狀物的加工方法具備：保護構件黏貼步驟，將具有保護該多個端子之黏著層的保護構件黏貼至該一邊的面；單體化步驟，在實施該保護構件黏貼步驟之後，沿著該分割預定線將板狀物及該保護構件分割，以沿著該分割預定線單體化為個個封裝件；屏蔽層形成步驟，在實施該單體化步驟之後，在多個封裝件之該密封劑的上表面及側壁上形成導電性屏蔽層；以及，保護構件剝離步驟，在實施該屏蔽層形成步驟之後，將該保護構件從封裝件上剝離。
根據此構成，端子被保護構件的黏著層覆蓋且板狀物與保護構件一體化。因此，即使板狀物之一邊的面或另一邊的面中任一面被保持在保持治具或保持膠膜上，端子也不會損傷而能夠適當地保護端子。
在本發明之一態樣之板狀物的加工方法中，在實施該保護構件黏貼步驟之後，更可具備保護構件保持步驟，藉由保持治具吸引保持該保護構件側或黏貼至保持膠膜。
在本發明之一態樣之板狀物的加工方法中，在實施該保護構件保持步驟之後，更可具備V形槽形成步驟，以V形槽形成手段切入到板狀物厚度方向半截為止，並沿著對應該分割預定線之區域以具備從該密封劑上表面朝向槽底傾斜之側壁的方式形成V形槽。
[發明功效]
根據本發明，由於端子被保護構件的黏著層覆蓋且板狀物與保護構件一體化，所以能夠在不引起端子不良下適當地對板狀物進行加工。
以下，參閱附圖，並說明關於本實施方式之封裝基板的加工方法。圖1為本實施方式之半導體封裝件的剖面示意圖。圖2為顯示比較例之半導體封裝件的加工方法之說明圖。另外，以下的實施方式僅為一例示，各步驟之間亦可以具備其他步驟，也可以適當地更換步驟的順序。
如圖1所示，半導體封裝件（板狀物）10係所有需要防止所謂的電磁干擾（Electro-Magnetic Interference，EMI）之半導體裝置的封裝件，以藉由外表面的屏蔽層16抑制朝向周圍的電磁雜訊洩漏之方式所構成。在屏蔽層16的內側，安裝於配線基板（配線基材）11的正面之半導體晶片12係以樹脂層（密封劑）13密封，且凸塊14配設於配線基板11的背面。於配線基板11上，形成有包含連接至半導體晶片12的端子或接地線（Ground line）17之各種配線。
半導體晶片12係將半導體晶圓單體化以形成為每個元件，且貼裝至配線基板11的預定位置。又，在封裝件側面（側壁）23上形成從封裝件上表面（密封劑上表面）22向下方往外側擴大的傾斜面25，並藉由濺鍍法等從上方在該傾斜面25上形成導電性的屏蔽層16。與一般的半導體封裝件垂直的封裝件側面不同，因為封裝件側面23的傾斜面25與屏蔽層16的形成方向傾斜地交叉，所以屏蔽層16變成容易形成於傾斜面25。
此外，如圖2A的比較例所示，為了在半導體封裝件形成傾斜面，必須在封裝基板105的樹脂層103側形成V形槽107。通常是在使封裝基板105的凸塊104側黏貼於保持膠膜111之黏著層112的狀態下形成V形槽107。由於難以在保持膠膜111原來的特性上兼具埋入性和防止黏合劑殘留等的凸塊104的保護特性，所以凸塊104恐怕會損傷。
另一方面，如圖2B之其他比較例所示，也可考慮在保持治具113上將封裝基板105單體化，但封裝基板105的凸塊104直接地接觸保持治具113，恐怕產生凸塊10的損壞或污染。如此一來，無論是用保持膠膜111或保持治具113來保持封裝基板105，都會有在凸塊104產生異常、引起端子不良這樣的問題。也可考慮保持凸塊104的相反側，但會有凸塊104被加工屑刮傷、加工屑附著在凸塊104上的情況。另外，並不限於配設有凸塊104等凸型端子的封裝基板105，即使是配設焊盤等平面端子的封裝基板，也有因焊盤的損傷引起相同的端子不良之可能性。
於是，在本實施方式中，藉由不會損傷端子之可剝離的保護構件31（參閱圖3C），在已覆蓋封裝基板15之凸塊14的狀態下實施各種加工。藉此，即使是保持於保持膠膜42（參閱圖3D）或保持治具61（參閱圖6A），或保護構件31的相反側保持於保持膠膜42或保持治具61，也不會產生凸塊14的損壞或污染。因此，從單體化後的半導體封裝件10剝離保護構件31，能防止半導體封裝件10的凸塊14之端子不良。
以下，說明關於封裝基板等之板狀物的加工方法。參閱圖3A至圖5C，首先說明關於使用框架切割之第1加工方法。另外，圖3A為貼裝步驟，圖3B為基板製作步驟，圖3C為保護構件黏貼步驟，圖3D為保護構件保持步驟之各別一例示的圖。圖4A為V形槽形成步驟，圖4B為單體化步驟，圖4C為轉移步驟之各別一例示的圖。圖5A及圖5B為屏蔽層形成步驟，圖5C為保護構件剝離步驟之各別一例示的圖。
如圖3A所示，首先實施貼裝步驟。在貼裝步驟中，配線基板11的正面（另一邊的面）被以交叉的分割預定線劃分成格子狀，多個半導體晶片12配設於所劃分的各元件區域中。在配線基板11內形成有接地線17等配線，在配線基板11的背面（一邊的面）配設有多個凸塊14。引線19的一端連接至半導體晶片12上表面的端子，且引線19的另一端連接至配線基板11正面的端子18。另外，並不限定於引線接合，也可以實施將半導體晶片12背面的端子直接連接至配線基板11正面的端子之覆晶接合。
如圖3B所示，在實施貼裝步驟之後，實施基板製作步驟。在基板製作步驟中，密封劑35被供給至貼裝有多個半導體晶片12的配線基板11的正面側上，以密封劑35將各半導體晶片12一起密封而製作成封裝基板15（參閱圖3C）。在此情況下，安裝有半導體晶片12的配線基板11之背面被保持在保持治具（未圖示）上，且以覆蓋配線基板11上表面（正面）的方式配置有模板36。注入口37在模板36的上壁中開口，用以供給密封劑35的供給噴嘴38定位於注入口37的上方。
然後，密封劑35被從供給噴嘴38通過注入口37供給至配線基板11的上表面，以密封半導體晶片12。在此狀態下，藉由加熱或乾燥使密封劑35硬化，以製作在配線基板11的上表面形成有樹脂層13（參閱圖3C）的封裝基板（基板）15。再者，使用具有硬化性者作為密封劑35，能夠從環氧樹脂、矽氧樹脂、氨基甲酸乙酯樹脂、不飽和聚酯樹脂、丙烯酸氨基甲酸酯樹脂或聚醯亞胺樹脂等之中選擇。此外，密封劑35未限定為液態，也能夠使用片狀或粉末狀的樹脂。以此方法，配線基板11上的多個半導體晶片12被一起密封。另外，預先準備有封裝基板15的情況下，也可以省略貼裝步驟及基板製作步驟。
如圖3C所示，在實施基板製作步驟之後，實施保護構件黏貼步驟。在保護構件黏貼步驟中，以保持封裝基板15之樹脂層13側的狀態，保護凸塊14的保護構件31被黏貼至封裝基板15的背面。保護構件31是在基材33上層積黏著層32而形成，黏著層32具有可埋入凸塊14的厚度及柔軟性。藉由凸塊14埋入該黏著層32，封裝基板15與保護構件31成為一體，以封裝基板15的凸塊14不會接觸其他構件之方式，藉由保護構件31良好地保護住封裝基板15的背面側。
保護構件31的基材33，較佳為以150度至170度耐熱溫度之材料所形成，例如，能從聚對苯二甲酸乙二酯樹脂及聚醯亞胺樹脂中選擇。
另外，黏著層32也可以例如使紫外線硬化熱水膨潤性的液狀樹脂硬化而形成。該液狀樹脂藉由紫外線的照射而固化，並藉由供給90度左右的熱水而膨潤。因此，在後段的V形槽形成步驟或單體化步驟中，即使20度左右的清洗水噴向保護構件31，在加工途中保護構件31也不會從封裝基板15剝離。此外，在後段的保護構件剝離步驟中，藉由以熱水使黏著層32膨潤，能夠不會在凸塊14上殘留黏著劑並良好地剝離保護構件31。
如圖3D所示，在實施保護構件黏貼步驟之後，實施保護構件保持步驟。在保護構件保持步驟中，以堵住環狀框架41中央的方式黏貼保持膠膜42，封裝基板15的保護構件31側被黏貼在該保持膠膜42上。藉此，保持膠膜42的外周部被由環狀框架41所支撐，且封裝基板15被定位在環狀框架41的內側。由於封裝基板15的凸塊14側透過保護構件31黏貼在保持膠膜42上，所以保持膠膜42的黏著劑不會附著在凸塊14上。
保持膠膜42即所謂的切割膠膜，係將黏著層44塗佈在膠膜基材43上所形成。在黏著層44上，使用藉由紫外線或熱等外部刺激來降低黏著性的紫外線硬化型或熱硬化型等的黏著劑。此外，環狀框架41可以俯視形成為環狀，也可以俯視形成為矩形框架狀。
如圖4A所示，在實施保護構件保持步驟之後，實施V形槽形成步驟。在V形槽形成步驟中，使用含有金剛石磨粒等、前端（前端的剖面）成型為V形的切割刀片（以下稱作V形刀片46）。封裝基板15的配線基板11側透過保持膠膜42被保持於卡盤台（未圖示），且V形刀片46被對位在封裝基板15的分割預定線上。然後，在封裝基板15的外側V形刀片46下降至封裝基板15厚度方向半截的深度為止，且在水平方向上相對V形刀片46切割進給封裝基板15。
藉此，封裝基板15被以V形刀片46從樹脂層13側切入而半切斷，並沿著對應於分割預定線的區域以具備從樹脂層13的上表面朝向切割槽底傾斜的側壁之方式形成V形槽47。
另外，在本實施方式中，V形刀片46的前端形成為尖V字形，但不限定於此構成。V形刀片46的前端，只要可以對封裝基板15形成V形槽47的形狀即可。例如，如圖17所示，V形刀片46的前端也可以形成為平坦的V字形。因此，切割刀片的前端為V字形並不限於到切割刀片的前端為止皆為尖的完整V字形，是包含切割刀片的前端為平坦的大致V字形的形狀。此外，V形刀片前端的V字面並不需要是直線地傾斜，也可以是略帶圓弧狀。
如圖4B所示，在實施V形槽形成步驟之後，實施單體化步驟。在單體化步驟中，使用含有金剛石磨粒等、寬度較V形刀片46窄、前端（前端的剖面）成型為矩形的切割刀片（以下稱作平直型刀片48）。平直型刀片48對位於卡盤台上的封裝基板15之V形槽47。然後，在封裝基板15的外側平直型刀片48下降至保持膠膜42厚度方向半截的深度為止，且在水平方向上相對平直型刀片48切割進給封裝基板15。
藉此，封裝基板15被以平直型刀片48從樹脂層13切入直至保持膠膜42中間而完全切斷，並從V形槽47的槽底朝向保持膠膜42形成矩形槽49。如此一來，封裝基板15及保護構件31被沿著V形槽47分割，且封裝基板15沿著分割預定線被單體化為個個半導體封裝件10。另外，並不限定於對所有分割預定線完成V形槽形成步驟後再實施單體化步驟之構成。藉由具備V形刀片46與平直型刀片48的雙刀切割機，也可以在每條分割預定線連續地實施V形槽形成步驟及單體化步驟。
如圖4C所示，在實施單體化步驟之後，實施轉移步驟。在轉移步驟中，紫外線或熱等外部刺激被施加至保持膠膜42（參閱圖4B）的黏著層44，使保持膠膜42的黏著層44的黏著力降低，並從保持膠膜42剝離多個半導體封裝件10。由於主要是降低保持膠膜42的黏著層44的黏著力，所以在保持膠膜42與保護構件31界面上剝離，保護構件31不會從半導體封裝件10上被剝下。然後，當半導體封裝件10從保持膠膜42剝離時，半導體封裝件10被重新黏貼至環狀框架51內側的電漿處理用保持膠膜52上。
半導體封裝件10以在封裝件側面23上也會形成屏蔽層16（參閱圖5A）的方式，保持適當的間隔而配置在保持膠膜52上。另外，電漿處理用的保持膠膜52，係將黏著層54塗佈在膠膜基材53上所形成。在黏著層54上，使用藉由紫外線或熱等外部刺激來降低黏著性的紫外線硬化型或熱硬化型的黏著劑。
又，保持膠膜52的膠膜基材53，較佳為以150度至170度耐熱溫度之材料所形成，例如，能從聚對苯二甲酸乙二酯樹脂及聚醯亞胺樹脂中選擇。此外，環狀框架51可以俯視形成為環狀，也可以俯視形成為矩形框架狀。
如圖5A所示，在實施轉移步驟之後，實施屏蔽層形成步驟。在屏蔽層形成步驟中，以導電性材料在多個半導體封裝件10的封裝件外表面上形成屏蔽層16。在此情況下，各半導體封裝件10被搬入電漿裝置（未圖示）內，在預定的形成條件下對半導體封裝件10從上方藉由濺鍍等的電漿處理，形成以導電性材料所製成的屏蔽層16膜。藉此，在各半導體封裝件10的封裝件上表面22及封裝件側面23（參閱圖5B）上以期望的厚度形成屏蔽層16。
此時，如圖5B所示，封裝件側面23的傾斜面25從封裝件上表面22向下方往外側擴大，傾斜面25對屏蔽層16的形成方向（垂直方向）傾斜地交叉。因此，在半導體封裝件10上形成屏蔽層16之時，不僅在封裝件上表面22也在封裝件側面23的傾斜面25上，形成厚度能發揮足夠的屏蔽效果之屏蔽層16。
此外，因為在封裝件側面23的垂直面26或封裝件間的槽底56上也形成屏蔽層16，所以在從保持膠膜52上拾取半導體封裝件10時，會有在半導體封裝件10的下部因屏蔽層16而產生毛邊的情況。在此情況下，除了屏蔽層16的成膜條件之外，藉由調整封裝件間的長寬比（縱橫比），能夠抑制半導體封裝件10的毛邊產生。封裝件間的長寬比，是藉由在轉移步驟中將半導體封裝件10重新黏貼至保持膠膜52時的封裝件間隔來調整。
當設自封裝件側面23的傾斜面25之下端到槽底56為止的深度為Ymm、封裝件側面23的垂直面26之相對向的間隔為Xmm時，封裝件間的長寬比係以Y／X表示。封裝件側面23的垂直面26之下側或封裝件間的槽底56係易受長寬比的影響，且伴隨封裝件間的長寬比增加形成薄的屏蔽層16。從而，藉由提高長寬比，在難以受長寬比影響的傾斜面25上形成適當厚度的屏蔽層16，並在容易受長寬比影響的垂直面26之下側或槽底56上形成薄的屏蔽層16，可抑制毛邊的產生。
此外如上述，由於在封裝件側面23的垂直面26上也形成屏蔽層16，當封裝件底面24露出時，屏蔽層16也會繞入形成在凸塊14側，恐怕引起零件不良。然而，在本實施方式中，由於半導體封裝件底面24藉由保護構件31完全地覆蓋，屏蔽層16不會繞入形成在封裝件底面24上。如此一來，保護構件31不僅是保護凸塊14免受衝擊等，並防止在屏蔽層16成膜時往半導體封裝件10的凸塊14側之屏蔽層16的繞入。
進一步，配線基板11的接地線17是在封裝件側面23的傾斜面25之下側露出於外部。因為在傾斜面25的下側接地線17連接至適當厚度的屏蔽層16，所以使在半導體封裝件10產生的電磁雜訊通過接地線17釋放至半導體封裝件10外。再者，雖然屏蔽層16在封裝件側面23的垂直面26之下側變薄，但藉由配線基板11的眾多配線（未圖示）電磁雜訊會被切斷。從而，全面地防止朝向半導體封裝件10周圍的電子零件之電磁雜訊的洩漏。
另外，配線基板11的接地線17可以是連接至屏蔽層16，也可以是在封裝件側面23的垂直面26連接至屏蔽層16。此外，屏蔽層16為以銅、鈦、鎳、金等其中之一以上的導電性材料所製成之厚度在數μm以上的金屬層，藉由例如濺鍍法、離子鍍層法、CVD（Chemical vapor deposition，化學氣相沈積法）、PVD（Physical Vapor Deposition，物理氣相沈積法）、電鍍法等而形成。又，保護構件31及保持膠膜52，較佳為全體以具有對屏蔽層形成步驟的處理之耐受性的材料所形成。從而，保護構件31及保持膠膜52，較佳為以具有根據屏蔽層形成步驟之各方式的耐真空性、耐熱性、耐化學性的材料所形成。
如圖5C所示，在實施屏蔽層形成步驟之後，實施保護構件剝離步驟。在保護構件剝離步驟中，保護構件31從半導體封裝件10的凸塊14側剝離。在此情況下，在各半導體封裝件10的樹脂層13側保持在保持治具（未圖示）的狀態下，藉由夾緊保持膠膜52的一端並水平移動，保護構件31被與保持膠膜52一起從半導體封裝件10剝下。例如，若保護構件31的黏著層32是使紫外線硬化熱水膨潤性的液狀樹脂硬化而成者，藉由供給熱水至保護構件31，能夠輕易地將保護構件31從半導體封裝件10剝下。以此方法，製造出以屏蔽層16覆蓋封裝件外表面的半導體封裝件10。
接著，參閱圖6A至圖6C，說明關於使用治具切割之第2加工方法。另外，第2加工方法與第1加工方法不同之處僅關於使用保持治具取代保持膠膜，及在封裝基板形成V形槽同時單體化。從而，在此省略說明關於與第1加工方法相同的步驟，並說明關於保護構件保持步驟、V形槽形成步驟及單體化步驟。圖6A為保護構件保持步驟，圖6B為V形槽形成步驟，圖6C為單體化步驟之各別一例示的圖。
如圖6A所示，在保護構件保持步驟中，封裝基板15的配線基板11側係透過保護構件31保持在保持治具61上。保持治具61的上表面係在對應封裝基板15之分割預定線的位置上形成有閃避槽62，並且以閃避槽62劃分的各區域成為保持封裝基板15的保持面63。由於封裝基板15的凸塊14側透過保護構件31保持在保持治具61的保持面63上，所以藉由保持面63凸塊14不會被損傷。
如圖6B所示，在實施保護構件保持步驟之後，實施V形槽形成步驟。在V形槽形成步驟中，當封裝基板15被保持於保持治具61時，V形刀片46被對位在封裝基板15的分割預定線上。然後，在封裝基板15的外側V形刀片46下降至封裝基板15厚度方向半截的深度為止，且在水平方向上相對V形刀片46切割進給封裝基板15。藉此，封裝基板15被以V形刀片46從樹脂層13側切入，並沿著對應於分割預定線的區域形成V形槽47。
如圖6C所示，在實施V形槽形成步驟之後，實施單體化步驟。在單體化步驟中，平直型刀片48對位於保持治具61上的封裝基板15之V形槽47。然後，在封裝基板15的外側平直型刀片48下降至保持治具61的閃避槽62為止，且在水平方向上相對平直型刀片48切割進給封裝基板15。藉此，平直型刀片48從樹脂層13側完全地切斷，且封裝基板15沿著V形槽47被單體化為個個半導體封裝件10。另外，第2加工方法也可以藉由雙刀切割機在每條分割預定線連續地實施V形槽形成步驟及單體化步驟。
接著，參閱圖7A至圖8C，說明關於使用整合型保持膠膜之第3加工方法。另外，第3加工方法與第1加工方法的相異點僅關於使用可兼用於切割與屏蔽層的形成處理之保持膠膜。從而，在此省略說明關於與第1加工方法相同的步驟，並說明關於保護構件保持步驟、V形槽形成步驟、單體化步驟、屏蔽層形成步驟及保護構件剝離步驟。圖7A為保護構件保持步驟，圖7B為V形槽形成步驟，圖7C為單體化步驟之各別一例示的圖。圖8A及圖8B為屏蔽層形成步驟，圖8C為保護構件剝離步驟之各別一例示的圖。
如圖7A所示，在保護構件保持步驟中，以堵住環狀框架65中央的方式黏貼保持膠膜66，封裝基板15的保護構件31側被黏貼在該保持膠膜66上。藉此，保持膠膜66的外周部被由環狀框架65所支撐，且封裝基板15透過保持膠膜66被定位在環狀框架65的內側。由於封裝基板15的凸塊14側透過保護構件31黏貼在保持膠膜66上，所以保持膠膜66的黏著劑不會附著在凸塊14上。
保持膠膜66為在切割及屏蔽層的形成處理中可兼用之膠膜，係將黏著層68塗佈在膠膜基材67上所形成。在黏著層68上，使用藉由紫外線或熱等外部刺激來降低黏著性的紫外線硬化型或熱硬化型的黏著劑。此外，環狀框架65可以俯視形成為環狀，也可以俯視形成為矩形框架狀。
又，保持膠膜66的膠膜基材67，較佳為以150度至170度耐熱溫度之材料所形成，例如，能從聚對苯二甲酸乙二酯樹脂及聚醯亞胺樹脂中選擇。藉由以對屏蔽層的形成處理具有耐受性的保持膠膜66用作為切割膠膜，可以省略實施膠膜的改貼之轉移步驟。
如圖7B所示，在實施保護構件保持步驟之後，實施V形槽形成步驟。在V形槽形成步驟中，封裝基板15的配線基板11側透過保持膠膜66被保持於卡盤台（未圖示），且V形刀片46被對位在封裝基板15的分割預定線上。然後，在封裝基板15的外側V形刀片46下降至封裝基板15厚度方向半截的深度為止，且在水平方向上相對V形刀片46切割進給封裝基板15。藉此，封裝基板15被以V形刀片46從樹脂層13側切入，並沿著對應於分割預定線的區域形成V形槽47。
如圖7C所示，在實施V形槽形成步驟之後，實施單體化步驟。在單體化步驟中，平直型刀片48對位於卡盤台上的封裝基板15之V形槽47。然後，在封裝基板15的外側平直型刀片48下降至保持膠膜66厚度方向半截的深度為止，且在水平方向上相對平直型刀片48切割進給封裝基板15。藉此，平直型刀片48從樹脂層13側切入保持膠膜66的中間為止，且封裝基板15沿著V形槽47被單體化為個個半導體封裝件10。另外，第3加工方法也可以藉由雙刀切割機在每條分割預定線連續地實施V形槽形成步驟及單體化步驟。
如圖8A所示，在實施單體化步驟之後，實施屏蔽層形成步驟。在屏蔽層形成步驟中，以導電性材料在多個半導體封裝件10的封裝件外表面上形成屏蔽層16。在此情況下，各半導體封裝件10被搬入電漿裝置（未圖示）內，在預定的形成條件下對各半導體封裝件10從上方藉由濺鍍等電漿處理，形成以導電性材料所製成的屏蔽層16膜。藉此，在各半導體封裝件10的封裝件上表面22及封裝件側面23（參閱圖8B）上以期望的厚度形成屏蔽層16。
此時，如圖8B所示，封裝件側面23的傾斜面25從封裝件上表面22向下方往外側擴大，傾斜面25對屏蔽層16的形成方向（垂直方向）傾斜地交叉。因此，在半導體封裝件10上形成屏蔽層16之時，不僅在封裝件上表面22也在封裝件側面23的傾斜面25上，形成厚度能發揮足夠的屏蔽效果之屏蔽層16。進一步，由於保持膠膜66及保護構件31具有對電漿理的耐受性，所以不會因電漿處理造成保持膠膜66及保護構件31劣化。
除了屏蔽層16的成膜條件之外，藉由調整封裝件間的長寬比（縱橫比），可抑制半導體封裝件10的毛邊產生。封裝件間的長寬比是藉由平直型刀片48（參閱圖7C）的寬度尺寸及切入量來調整。此外，由於半導體封裝件10的凸塊14藉由保護構件31完全地覆蓋，防止屏蔽層16繞入形成在封裝件底面24上。進一步，能夠不需換貼保持膠膜66，而實施切割及電漿處理，可以降低作業工作量及成本。
此外，屏蔽層16為以銅、鈦、鎳、金等其中之一以上的導電性材料所製成之厚度在數μm以上的金屬層，藉由例如濺鍍法、離子鍍層法、CVD（Chemical vapor deposition，化學氣相沈積法）、PVD（Physical Vapor Deposition，物理氣相沈積法）、電鍍法等而形成。又，保護構件31及保持膠膜66，係以具有根據屏蔽層形成步驟之各方式的耐真空性、耐熱性、耐化學性的材料所形成。
如圖8C所示，在實施屏蔽層形成步驟之後，實施保護構件剝離步驟。在保護構件剝離步驟中，保護構件31從半導體封裝件10的凸塊14側剝離。在此情況下，在各半導體封裝件10的樹脂層13側保持在保持治具（未圖示）的狀態下，藉由夾緊保持膠膜66的一端並水平移動，保護構件31被與保持膠膜66一起從半導體封裝件10剝下。以此方法，製造出以屏蔽層16覆蓋封裝件外表面的半導體封裝件10。
接著，說明關於半導體封裝件之側面的傾斜角度及屏蔽層的關係。圖9為顯示設置於測試體之屏蔽層的厚度的剖面圖。圖10為顯示測試體之側面的傾斜角與屏蔽層的厚度之關係的圖。
如圖9所示，預備有改變側面72的傾斜角度θ的多個測試體70，並在180℃、8×10-4 Pa之條件下藉由離子鍍層法形成了屏蔽層。側面72的傾斜角度θ設為90°、82°、68°、60°、45°中任一個。此外，基於掃描型電子顯微鏡的觀察圖像，測量形成在上表面71的上部屏蔽層73之厚度t1以及形成在側面72的側部屏蔽層74之厚度t2。上部屏蔽層73及側部屏蔽層74的厚度t1及t2係以方程式（1）所示階梯覆蓋（step coverage）計算出的值，且該值與傾斜角度θ的關係整理於圖10中。
（1）step coverage = (t2/t1) x 100
結果，隨著傾斜角度θ從90°變小階梯覆蓋的值逐漸增大，當傾斜角度θ為45°時階梯覆蓋的值成為100%。具體而言，當設定傾斜角度θ成為45°時，上部屏蔽層73的厚度t1與側部屏蔽層74的厚度t2一致，並且確認了在測試體70的上表面71及側面72上厚度均一的屏蔽層。此外，根據發明人的實驗，階梯覆蓋的值低於50%的話，側部屏蔽層74的成膜需要時間，且製程成本增加，所以範圍較佳為階梯覆蓋的值為50%以上。因此，半導體封裝件的側面之傾斜角度θ較佳為45°以上且82°以下。
如以上所述，根據本實施方式之封裝基板15的加工方法，封裝基板15係在多個凸塊14被以保護構件31覆蓋之狀態下，保持於保持治具或保持膠膜上。此時，凸塊14埋入保護構件31的黏著層32以使封裝基板15與保護構件31成為一體。由於封裝基板15透過保護構件31保持在保持治具或保持膠膜上，因此凸塊14不會損傷，能夠適當地保護凸塊14。
另外，在本實施方式中，雖例示為在配線基板上安裝一個半導體晶片的半導體封裝件，但並不限定於此構成。也可以製造在配線基板上安裝多個半導體晶片的半導體封裝件。例如，如圖11A所示，在配線基板81上安裝多個（例如3個）半導體晶片82a～82c，也可以製造將半導體晶片82a～82c屏蔽在一起的半導體封裝件80。在此情況下，以封裝單位在封裝基板上形成V形槽，並以封裝單位分割封裝基板。另外，半導體晶片82a～82c可以具有相同功能，也可以具有不同功能。
此外，如圖11B所示，也可以在配線基板86上安裝多個（例如2個）半導體晶片87a、87b，並製造將半導體晶片87a、87b個別屏蔽的半導體封裝件85。在此情況下，以晶片單位在封裝基板上形成V形槽，並以晶片單位分割封裝基板。另外，半導體晶片87a、87b可以具有相同功能，也可以具有不同功能。
此外，在本實施方式中，雖構成為在V形槽形成步驟中使用V形刀片作為V形槽形成手段，但不限定於此構成。例如，如圖12A所示，也可以使用普通的平直型刀片91在封裝基板15上形成V形槽作為V形槽形成手段。在此情況下，將平直型刀片91相對於封裝基板15的分割預定線上的垂直面P僅以預定角度傾斜向一側而切割之後，將平直型刀片91相對於垂直面P僅以預定角度傾斜向另一側而切割。藉此，由平直型刀片91將封裝基板15的上表面切出V形，沿著分割預定線形成V形槽。
此外，如圖12B所示，也可以使用雷射燒蝕用的加工頭92在封裝基板15上形成V形槽作為V形槽形成手段。在此情況下，將加工頭92相對於封裝基板15的分割預定線上的垂直面P僅以預定角度傾斜向一方向而實施燒蝕加工之後，將加工頭92相對於垂直面P僅以預定角度傾斜向另一側而實施燒蝕加工。藉由對封裝基板15具有吸收性的雷射光束，將封裝基板15的上表面切出V形，沿著分割預定線形成V形槽。
此外，如圖12C所示，也可以使用斷面儀93在封裝基板15上形成V形槽作為V形槽形成手段。斷面儀93為在鋁製基台94之大致V字形的加工面上電鍍由金剛石磨粒所組成的磨粒層95所構成。相較於V形刀片，斷面儀93較不易磨耗，能夠長久地持續維持V字形。
此外，在本實施方式中，雖構成為在單體化步驟中使用平直型刀片作為分割手段，但不限定於此構成。例如，如圖13A所示，也可以使用雷射燒蝕用的加工頭98將封裝基板15分割作為分割手段。此外，如圖13B所示，也可以使用成型磨石99作為分割手段，在封裝基板15上形成V形槽的同時分割封裝基板15。此外，也可以使用多刀切割刀片取代成型磨石99。亦即，也可以同時實施V形槽形成步驟及單體化步驟。
此外，在本實施方式中，雖構成為在保護構件剝離步驟中將保護構件與保持膠膜一起從半導體封裝件上剝下，但不限定於此構成。例如，如圖14所示，也可以藉由從保護構件31拾取半導體封裝件10，從半導體封裝件10的凸塊14上剝離保護構件31。
此外，在本實施方式中，也可以使用非紫外線硬化型的黏著劑作為保持膠膜，並使用採用紫外線硬化型的黏著劑之膠膜作為保護構件。藉此，如圖15A及圖15B所示，在保護構件剝離步驟中，透過保持膠膜88照射紫外線以使保護構件89的黏著劑硬化之後，將保護構件89與保持膠膜88一起剝下。
此外，在本實施方式中，雖構成為在保護構件保持步驟中藉由保持膠膜或保持治具保持封裝基板之保護構件側，但並不限定在此構成。也可以在保護構件保持步驟中藉由保持膠膜或保持治具保持封裝基板之保護構件的相反側。在此，雖說明關於保持封裝基板之保護構件的相反側以進行加工之一例，但僅為一例示，也可以適當地組合上述各實施方式或變形例以實施。此外，省略說明關於與第1至第3加工方法相同的步驟。
如圖16A所示，在保護構件保持步驟中，封裝基板15之保護構件31的相反側係保持在保持膠膜57上。如圖16B所示，在保護構件保持步驟之後實施平直槽形成步驟，平直型刀片48被對位在封裝基板15的分割預定線上，且在封裝基板15的外側使平直型刀片48下降至封裝基板15厚度方向半截的深度為止。然後，相對於平直型刀片48封裝基板15在水平方向上被切割進給，封裝基板15被從保護構件31側半切斷。
如圖16C所示，在平直槽形成步驟之後，再次實施保護構件保持步驟，封裝基板15之保護構件31側被保持在保持膠膜42上。隨後，實施V形槽形成步驟，以V形刀片46從樹脂層13側切入，沿著分割預定線在封裝基板15形成V形槽47同時單體化為個個半導體封裝件10。亦即，本變形例中是同時實施V形槽形成步驟及單體化步驟。其後，在屏蔽層形成步驟中，以導電性材料在半導體封裝件10的封裝件外表面上形成屏蔽層。
此外，在本實施方式中，雖說明了關於製造半導體晶片係透過引線而引線接合於配線基板的端子之半導體封裝件的構成，但並不限定於此構成。半導體封裝件也可以是半導體晶片直接連接至配線基板的端子之覆晶接合。
此外，在本實施方式中，雖構成為對設置有凸塊作為端子的封裝基板進行加工，但並不限定於此構成。封裝基板的端子並無特別限定，例如，也可以加工設置有焊盤作為端子的封裝基板。
此外，在本實施方式中，保持治具為能夠保持封裝基板之構成即可，例如，也可以由基材（substrate）所構成。
此外，上述實施方式的半導體晶片，係安裝在配線基板上的晶片零件即可。
又，在本實施方式中，可以相同裝置實施封裝基板上的V形槽的形成與封裝基板的分割，也可以個別的裝置實施。
此外，在本實施方式的加工方法中，雖說明了關於適用於封裝基板加工的構成，但並不限定於此構成。也可將本實施方式的加工方法適用於其他的板狀物加工，將板狀物單體化。從而，並不限定於形成V形槽或屏蔽層之構成。
此外，板狀物只要為設有端子者即可，也可以是半導體基板、無機材料基板、封裝基板等各種工件。作為半導體基板，可以使用矽、砷化鎵、碳化矽等各種基板。作為封裝基板，可以使用CSP（Chip Size Package，晶片級封裝）、WLCSP（Wafer Level Chip Size，晶圓級尺寸封裝），SIP（System In Package，系統級封裝）和FOWLP（Fan Out Wafer Level Package，扇出晶圓級封裝）的各種基板。為FOWLP基板的情況時，也可為將晶片安裝在重佈層上之構成。因此，配線基材並不限定為PCB基板等配線基板，為包含FOWLP的重佈層之概念。
此外，半導體封裝件不限定為用於行動電話的行動通訊設備的構成，也可以用於攝影機等其他電子設備。
又，已說明本實施方式及變形例，但作為本發明的其他實施方式，也可以將上述各實施方式及變形例的全體或部分組合。
又，本發明的實施方式不限於上述實施方式及變形例，在未脫離本發明的技術思想精神範圍，亦可作各種變更、置換、變形。進一步，根據技術的進步或衍生的其他技術，若可以其他做法實現本發明之技術思想，亦可以用該方法實施。因此，專利請求範圍係涵蓋所有本發明的技術思想的範圍可能包含的實施方式。
此外，在本實施方式中，雖說明了關於將本發明適用於封裝基板的加工方法之構成，亦可適用於設有端子之其他加工對象的加工方法。
[產業上的利用可能性]
如以上的說明，本發明係具有能夠在引起端子不良下適當地加工板狀物的效果，特別是，對用於行動通訊設備的封裝基板的加工方法有效。
10‧‧‧半導體封裝件（封裝件）
11‧‧‧配線基板（配線基材）
13‧‧‧樹脂層（密封劑）
14‧‧‧凸塊（端子）
15‧‧‧封裝基板（板狀物）
16‧‧‧屏蔽層
22‧‧‧封裝件上表面
23‧‧‧封裝件側面
31‧‧‧保護構件
32‧‧‧黏著層
42‧‧‧保持膠膜
46‧‧‧V形刀片（V形槽形成手段）
47‧‧‧V形槽
48‧‧‧平直型刀片
49‧‧‧矩形槽
61‧‧‧保持治具
圖1為本實施方式之半導體封裝件的剖面示意圖。
圖2中圖2A及圖2B為顯示比較例之半導體封裝件的加工方法之說明圖。
圖3中圖3A為顯示第1加工方法之貼裝步驟的一例，圖3B為顯示第1加工方法之基板製作步驟的一例，圖3C為顯示第1加工方法之保護構件黏貼步驟的一例，圖3D為顯示第1加工方法之保護構件保持步驟之一例。
圖4中圖4A為顯示第1加工方法之V形槽形成步驟的一例，圖4B為顯示第1加工方法之單體化步驟的一示例，圖4C為顯示第1加工方法之轉移步驟的一例。
圖5中圖5A及圖5B為顯示第1加工方法之屏蔽層形成步驟的一例，圖5C為顯示第1加工方法之保護構件剝離步驟的一例。
圖6中圖6A為顯示第2加工方法之保護構件保持步驟的一例，圖6B為顯示第2加工方法之V形槽形成步驟的一示例，圖6C為顯示第2加工方法之單體化步驟的一例。
圖7中圖7A為顯示第3加工方法之保護構件保持步驟的一例，圖7B為顯示第3加工方法之V形槽形成步驟的一例，圖7C為顯示第3加工方法之單體化步驟的一例。
圖8中圖8A及圖8B為顯示第3加工方法之屏蔽層形成步驟的一例，圖8C為顯示第3加工方法之保護構件剝離步驟的一例。
圖9為顯示設置於測試體的屏蔽層之厚度的圖。
圖10為顯示測試體之側面的傾斜角與屏蔽層的厚度之關係的圖。
圖11中圖11A及圖11B為顯示半導體封裝件之變形例的圖。
圖12中圖12A、圖12B及圖12C為顯示V形槽形成步驟之變形例的圖。
圖13中圖13A及圖13B為顯示單體化步驟之變形例的圖。
圖14為顯示保護構件剝離步驟之變形例的圖。
圖15中圖15A及圖15B為顯示保護構件剝離步驟之變形例的圖。
圖16中圖16A、圖16B及圖16C為顯示變形例之半導體封裝件的加工方法之說明圖。
圖17為顯示V形刀片之變形例的圖。

Claims (3)

  1. 一種板狀物的加工方法，係沿著分割預定線將板狀物分割為個個封裝件，該板狀物係在交叉之該分割預定線所劃分的配線基材之一邊的面的區域中形成多個端子，且在配線基材之另一邊的面的區域中接合半導體晶片並以密封劑密封而成，該板狀物的加工方法具備： 保護構件黏貼步驟，將具有保護該多個端子之黏著層的保護構件黏貼至該一邊的面； 單體化步驟，在實施該保護構件黏貼步驟之後，沿著該分割預定線將板狀物及該保護構件分割，以沿著該分割預定線單體化為個個封裝件； 屏蔽層形成步驟，在實施該單體化步驟之後，在多個封裝件之該密封劑的上表面及側壁上形成導電性屏蔽層；以及， 保護構件剝離步驟，在實施該屏蔽層形成步驟之後，將該保護構件從封裝件上剝離。
  2. 如申請專利範圍第1項所述之板狀物的加工方法，其中，在實施該保護構件黏貼步驟之後，更具備保護構件保持步驟，藉由保持治具吸引保持該保護構件側或黏貼至保持膠膜。
  3. 如申請專利範圍第2項所述之板狀物的加工方法，其中，在實施該保護構件保持步驟之後，更具備V形槽形成步驟，以V形槽形成手段切入到板狀物厚度方向半截為止，並沿著對應該分割預定線之區域以具備從該密封劑上表面朝向槽底傾斜之側壁的方式形成V形槽。
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