TW201709450A - 具有中介支撐構造機構的積體電路封裝系統及其製造的方法 - Google Patents

具有中介支撐構造機構的積體電路封裝系統及其製造的方法 Download PDF

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TW201709450A
TW201709450A TW105121201A TW105121201A TW201709450A TW 201709450 A TW201709450 A TW 201709450A TW 105121201 A TW105121201 A TW 105121201A TW 105121201 A TW105121201 A TW 105121201A TW 201709450 A TW201709450 A TW 201709450A
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Taiwan
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integrated circuit
conductive
interposer
base substrate
core
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TW105121201A
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TWI721995B (zh
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朴壽山
金奎相
高麗贊
李巨昌
池熺朝
李喜秀
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星科金朋有限公司
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Publication of TW201709450A publication Critical patent/TW201709450A/zh
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    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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Abstract

一種製造積體電路封裝系統之方法及系統，包括：基底基板，該基底基板包含基底端；在該基底基板上的積體電路裝置；在該基底端上的底部導電接頭；在該底部導電接頭上的導電球，該導電球包含芯體；以及在該導電球上的中介層。

Description

具有中介支撐構造機構的積體電路封裝系統及其製造的方法
本發明一般係關於積體電路封裝系統，更具體地係關於具有中介層支撐構造機構的系統。
可攜式電子設備的快速增長的市場，例如，手機、筆記型電腦及個人數字助理(PDA)是現代生活中的一部分。許多可攜式裝置代表下一代封裝的最大潛在市場機會之一。這些裝置具有對製造一體化具有顯著影響的獨特屬性，因為它們通常必須小、重量輕且功能豐富，並且必須以相對低的成本大量生產。
作為半導體工業的擴展，電子封裝工業已經見證了日益增長的商業競爭壓力，以及日漸增長的消費者期望和減少市場中有意義的產品差異化的機會。
封裝、材料工程及開發是這些下一代電子嵌入策略的核心，其係概述在用於下一代產品開發的藍圖之中。未來的電子系統可以更智能、具有更高的密度、使 用更低的功率、更快速的運作及可以包含比當今更低成本的混合科技裝置和組裝結構。
例如，當前的封裝供應商正在努力適應預計在不久的將來超過一兆赫(THz)的高速電腦裝置。當前的技術、材料、設備及結構對這些新裝置的基本組裝提出了挑戰，但仍然沒有充分地解決冷卻和可靠度問題。
下一級之互連組件的技術能力之雛形還未知，並且還沒有確定明確的有效成本的技術。除了下一代裝置的性能要求，業界現在還要求主要成本係為主要產品之區隔以實現利潤。
因此，目前的方針為正在將電子封裝驅動精密化、超微型化，這需要自動化以實現可接受的產量。這些挑戰不僅需要生產的自動化，還需要將數據和訊息自動化流向生產管理和客戶。
已經有許多方法來藉由相繼世代之半導體來解決微處理器和可攜式電子設備的先進封裝要求。許多工業的藍圖已經認證了當前半導體能力和可用的支持性電子封裝技術之間的顯著差距。當前技術的限制和問題包括增加時脈速度、EMI輻射、熱負荷、第二級組裝可靠性應力和成本。
隨著這些封裝系統的發展以併入具有不同條件需要的更多組件，更有壓力去推動技術性封裝，此點變得越來越具有挑戰性。更重要的是，隨著不斷增加的複雜度，在製造期間，潛在的誤差風險大幅增加。
封裝系統收縮所遇到的問題是球格柵、封裝端和它們需要附接的印刷電路板(PCB)之間的接觸面積的縮減。接觸面積的縮減這種減小使得封裝系統更容易具有較差的電性接觸或者變得與PCB分離。
鑑於不斷增加的商業競爭壓力，隨著消費者期望的增長和市場中有意義的產品之區隔的機會減少，對於這些問題的解決是至關重要的。此外，降低成本、降低生產時間、提高效率及性能以及滿足競爭壓力的需要，增加了對於找到這些問題的答案的關鍵必要性有更大緊迫性。
因此，仍然需要更小的覆蓋區和更堅固的封裝以及製造方法。對這些問題的解決方案已經被長期尋求，但是先前的研發沒有教示或建議任何解決方案，因此，對於這些問題的解決方案早已被本領域技術人員忽略。
本發明提供一種製造積體電路封裝系統的方法，其包括提供基底基板，該基底基板包含基底端；在該基底基板上安裝積體電路裝置；在基底端上形成底部導電接頭；在該底部導電接頭上安裝導電球，該導電球包含芯體；以及在該導電球上安裝中介層。
本發明提供一種積體電路封裝系統，其包括基底基板，該基底基板包含基底端；在該基底基板上之積體電路裝置；在該基底端上之底部導電接頭；在該底部導電接頭上之導電球，該導電球包含芯體；以及在該導電 球上之中介層。
儘管本發明所揭示的特定具體實施例具有其它步驟或元件或替代形式。然而，本文對特定具體實施例的說明其用意不在於限制本發明於所揭露的特殊形式，發明所屬技術領域中具有通常知識者藉由閱讀以下之實施方式及圖式可以清楚明瞭特定具體實施例之其它步驟或元件。
100‧‧‧積體電路封裝系統
102‧‧‧基底基板
103‧‧‧基底端
104‧‧‧系統互連
106‧‧‧積體電路裝置
108‧‧‧晶片互連
109‧‧‧晶片柱
112‧‧‧導電球
113‧‧‧芯體
114‧‧‧抗氧化金屬層
115‧‧‧頂部導電接頭
116‧‧‧底部導電接頭
118‧‧‧中介層
120‧‧‧密封體
300‧‧‧積體電路封裝系統
302‧‧‧防腐塗層
400‧‧‧積體電路封裝系統
402‧‧‧中介層黏合劑
500‧‧‧積體電路封裝系統
602‧‧‧球間距
604‧‧‧中介層間隙高度
606‧‧‧底膠
608‧‧‧層厚度
700‧‧‧製造積體電路封裝系之方法
702、704、706、708、710‧‧‧區塊
第1圖係為本發明之第一具體實施例之具有中介層支撐構造機構的積體電路封裝系統之橫截面圖。
第2圖係為第1圖之積體電路封裝系統之俯視圖。
第3圖係為本發明之第二具體實施例之具有中介層支撐構造機構的積體電路封裝系統之橫截面圖。
第4圖係為本發明之第三具體實施例之具有中介層支撐構造機構的積體電路封裝系統之橫截面圖。
第5圖係為本發明之第四具體實施例之具有中介層支撐構造機構的積體電路封裝系統之橫截面圖。
第6圖係為積體電路封裝系統之例示圖。
第7圖係為本發明之進一步具體實施之製造積體電路封裝系統的方法的流程圖。
詳細描述以下所述之實施例以使得本領域技術人員能夠實現和使用本發明。應當理解，基於本案之 揭露內容，其它實施例將是顯而易見的，並且可以在不脫離本發明的範圍的情況下進行系統，過程或機械改變。
在以下描述中，闡明許多具體細節以提供對本發明的透徹理解。然而，本發明顯然地可在不需要具體細節的情況下進行。為了避免模糊本發明，沒有詳細揭示一些公知的電路、系統配置和製程步驟。
附圖所表示系統的具體實施例的係為半圖式，且未按照比例表示，特別地，一些尺寸係為了清楚呈現在附圖中，且被誇大地表示。類似地，雖然為了便於描述附圖中的視角方位，大致上係表示相近的取向，但大多數為任意的。一般來說，本發明可以在任何方位上進行操作。
在揭示與描述具有一些共同特徵之多個實施例的情況下，為了方便且清楚地說明、描述和理解，相似和相近的特徵通常以相似的元件符號來描述。為了方便描述，將實施例編號為第一實施例、第二實施例等，其並未有任何其它意義或限制本發明。
為了進行說明，如本文所述之術語「水平的」定義為平行於積體電路晶片的平面或表面之平面，而不管其方向。術語「垂直」係指一個方向垂直於如剛才所定義之水平。術語，例如「上」、「下」、「底部」、「頂部」、「側邊」(如在「側壁」)、「較高」、「較低」、「上部」、「之上」和「之下」，是相對於水平面而定義的，如附圖中所示。
「在…上」一詞係指有元件之間的直接物 理接觸。「直接在…上」一詞係指中間元件與元件彼此之間直接物理接觸，元件彼此之間無其它元件。本文所述之術語「處理」包括材料的沉積、圖案形成、曝光、顯影、蝕刻、清洗、成型及/或材料去除或形成前述之結構之需要。
根據第1圖，其表示本發明之第一具體實施例之具有中介層支撐構造機構的積體電路封裝系統100的橫截面圖。此橫截面圖係為沿第2圖的線1--1的剖視圖。積體電路封裝系統100包含基底基板102、積體電路裝置106及中介層118。
基底基板102可為組件和裝置提供支撐和連接。例如，基底基板102包含印刷電路板(PCB)、載體基板、具有電性互連的半導體基板、陶瓷基板或多層結構(例如，具有經絕緣體隔開之一個或多個導體層的積層體)適於如實施例所示之形成在基底基板102上方或之上的電性互連之積體電路系統。為了方便說明，基底基板102係顯示為層疊基板。
基底基板102包括導體層和嵌入在其中的導電線。基底基板102可以包括一個用於安裝組件之組件側、裝置及封裝。基底基板102也可包含系統側，其係一種相反於組件側之一側部，用於連接到下一個系統層級(未示出)。
基底基板102包括介電質芯，如介電材料，樹脂或環氧樹脂。例如，基底基板102包含預浸漬(PPG)的絕緣層、聚合物、增強之纖維、玻璃纖維織物、填料或 其他織物。
基底基板102包括基底端103。基底端103係為形成在本體內或在基底基材102之介電質芯之接觸墊。一些基底端103可沿著基底基材102的頂部表面安裝，以用於安裝裝置、晶片及互連(interconnect)。
積體電路封裝系統100包括中介層118。除了中介層118安裝在積體電路裝置106之上以外，中介層118包括相同或類似基底基板102的結構。例如，中介層118可提供支撐與連接給組件和安裝在基底基板102之上的裝置。為了方便說明，中介層118係表示為層疊基板。
積體電路裝置106係定義為具有用於實現主動電路的一個或多個積體電晶體的半導體裝置。例如，積體電路裝置106包括互連、被動裝置或其組合。例如，覆晶封裝(flip-chip)或晶圓尺寸之晶片可以代表積體電路裝置106。積體電路裝置106較佳以覆晶封裝配置表示。然而，可以理解的是，積體電路裝置106也可以是引線接合配置。
積體電路裝置106可以包括用於連接晶片互連108和晶片柱109的互連側。積體電路裝置106之互連側包含接點，且在裝置上所製造的接點可以直接連接到晶片互連108。積體電路裝置106也可以包含裝置之頂側，其係為互連側之相反一側。
晶片互連108和晶片柱109係為將積體電路裝置106連接到基底基板102的導電結構。晶片互連108 可包含焊料球或焊料塊。晶片柱109可包括立柱或柱，以促進積體電路裝置106到基板102之基底端103的安裝。已經發現，使用該晶片互連108和晶片柱109提供更小的互連件之間的間距，而晶片柱防止晶片互連108之一者和相鄰互連之間的焊料橋接。
積體電路裝置106可藉由晶片互連108和晶片柱109連接或安裝到基底基板102的元件側。晶片互連108可以直接連接到基底基板102的基底端103。系統互連104可以附著於基底基板102的底側。系統互連104可包含焊料球或焊料塊作為例子。
積體電路封裝系統100可以包含導電接頭，其係為黏附金屬結構。例如，頂部導電接頭115可以連接到中介層118之接觸墊，而底部導電接頭116可附著於基底基板102之基底端103，頂部導電接頭115和底部導電接頭116包含錫膏印刷、微落球(micro-ball drop)或用助焊劑預安裝焊料。
舉例來說，導電接頭可以包含用於黏附中介層118、互連群集基底基板102之焊膏。導電接頭可以根據本說明書之封裝規格係可選的，如間隔高度為集成電路裝置。已發現，導電接頭可用於調整用於晶片間隔之封裝高度。
積體電路封裝系統100可包含導電球112。導電球112可為中介層提供結構支撐、可在基底基板與中介層之間提供黏附性，並能提供電性連接。導電球112可 以環繞在基底基板102的周邊上的積體電路裝置106。
導電性球112可以包含芯體113和環繞芯體113之抗氧化金屬層114。導電球112之芯體113可以包含金屬材料，其可以支持安裝在積體電路裝置上的中介層、組件、元件及封裝體的重量。芯體113可以較佳由具有拉伸強度和壓縮強度比焊料更好之同質金屬材料所製成。已經發現，芯體113的強度允許使用比焊料球互連更小的尺寸以支撐中介層118。例如，導電球112可以是直徑比焊球小百分之二十，但是提供比焊球更好的結構支撐和預防軋碎。
例如，芯體113可包含銅主體或銅合金。芯體113被設計為保持其形狀而不變形，並已發現當於用支撐安裝結構時，其可增加的可靠性和電性連接強度。已發現例如銅球的芯體113能有效地支撐中介層118，因為銅的高模量的原因。
芯體113可以尺寸化，以在積體電路裝置106上為中介層118提供間隔，及提供足夠的質量以支撐中介層118用於防止積體電路裝置106的壓碎損壞。例如，具有直徑為150微米至200微米的芯體113可以支撐中介層。
芯主體113可被抗氧化金屬層塗覆或圍繞。由導電性球112所提供之結構支撐提供封裝體含有導電球群之間較小的間距。例如，所述導電球可以包含0.30微米以下之頂部球的間距。
抗氧化金屬層114係用於防止芯體113的氧化和促進封裝的附著。抗氧化金屬層114可包含非焊料漆，相較於焊球及銅芯焊球，其係用於降低球的直徑大小。例如，抗氧化金屬層114可包含鎳(Ni)、金(Au)、鈀(Pd)或其組合，諸如NiAu、NiPd及NiPdAu等化合物。抗氧化金屬層114可包含0.01微米至4微米之薄膜寬度。
抗氧化金屬層114也可以對芯體113提供抗氧化保護，並促使導電球112黏附到基底基板或導電接頭之頂部和底部。已經發現抗氧化金屬層114完全包圍芯體113，且被配置為甚至回流後完全包圍芯體113。進一步而言，已經發現，抗氧化的金屬層114的組成物可以確保芯體113不變形，從而維持芯體113的結構形狀和強度。
積體電路封裝系統100可以包含在中介層118和基底基板102之間的密封體120。密封體20可以為覆蓋積體電路器件106、導電球112和導電接頭的成型化合物。密封體120可提供機械保護、環境保護以及用於積體電路封裝系統100之封裝。舉例而言，密封體120可以由環氧樹脂模製化合物(EMC)、薄膜輔助成型物、聚酰亞胺化合物或線入膜(wire-in film，簡稱WIF)所製成。
由導電球112所提供的結構支撐可預防基底基板102上之積體電路裝置106自中介層118壓碎損壞。因此，已經發現無需額外的密封體、模具及環氧樹脂可以安裝及保護具有100微米以下之極薄晶粒。積體電路封裝系統甚至可以支持厚度為70微米以下的晶粒。
已經發現導電接頭和導電球112可以被用於調整安裝在基底基板102上方和中介層118下方的積體電路裝置106的間隔高度。也發現，封裝配置提供具有0.3毫米以下間距之極細頂端球。例如，導電球112可以包含直徑低於200微米並仍提供足夠的結構支撐以提高積體電路裝置106之上的中介層118。
已經發現直徑為約200微米至150微米之導電球112可縮減頂端球之間距，其係因為接合墊可用於金屬芯而依照尺寸製作以替換尺寸較大之焊球而作為連接用。金屬芯提供給接合墊更強的結構和電性連接，而金屬芯之較小尺寸降低了封裝輪廓。例如，銅芯焊球(CCSP)包含尺寸超過220微米的球，而導電球112可提供用於中介層118更強結構支撐及包括尺寸低於190微米之較小的球。
此外，導電球112的固態銅本體可防止覆蓋焊球上的球與CCSP之間的焊料橋接與短路。利用導電球112的焊料銅材料消除具有彼此間距緊鄰的焊球的焊料橋接。
已經發現導電球112和極薄的晶粒可以組合以在中介層118和基底基板102之間提供具有200μm及以下之厚度之非常低的封裝輪廓。
還已經發現抗氧化金屬層114、頂部導電接頭115、底部導電接頭116或其組合可防止芯體113變形。保持導電球112的形狀可確保了晶粒被保護以免受擠壓損壞並且確保可靠的電性連接。已經發現芯中的金屬材料、 抗氧化金屬層114和導電接頭可防止芯體113變形與失去形狀，以確保可靠的電性連接。例如，芯體113包括銅材料之結構支撐之優點，同時還包括來自周圍層的抗氧化效果。
根據第2圖，其中表示第1圖的積體電路封裝系統100的俯視圖。表示了中介層118的頂部。
根據第3圖，其中表示在本發明之第二實施例中的具有中介層支撐構造機構的積體電路封裝系統300的橫截面圖。積體電路封裝系統300與積體電路封裝系統100相同，除了積體電路封裝系統300包括防腐塗層302，而不是第1圖的抗氧化金屬層114。
積體電路封裝系統300可以包含基底基板102、基底端103、系統互連104、積體電路裝置106、晶片互連、頂部和底部導電接頭、導電球112、中介層118及密封體120。
導電球112包含防腐塗層302，而不是第1圖所示的抗氧化金屬層114。防腐塗層302可以是有機可焊性防腐劑(OSP)。防腐塗層302可以視選擇的以節省成本並減少生產步驟來製造。防腐塗層302的厚度可以在0.01微米至11.0微米的範圍內，以進一步減小間距和總體封裝尺寸。
積體電路封裝系統300和積體電路封裝系統100可以選擇包含多個安裝。例如，安裝導電球可以不需要導電接頭。已經發現導電球112可以包含剛好足夠的 用於黏附的焊料，以進一步減小封裝高度。
此外，例如，積體電路封裝系統300可以選擇包含括具有頂部或底部導電接頭。積體電路封裝系統300的另一選擇可以包含用於與導電球112接合的頂部和底部導電接頭。積體電路封裝系統300可以包含如第1圖之積體電路封裝系統100中所描述的所有發明的優點和益處。
現在依據第4圖，其中表示在本發明的第三實施例中的具有中介層支撐構造機構的積體電路封裝系統400的橫截面圖。積體電路封裝系統400可以類似於積體電路封裝系統100並且可以共享一些相同的元件。然而，積體電路封裝系統400包含中介層黏合劑402和從密封體120顯露的導電球。
積體電路封裝系統400可以包含基底基板102、基底端103、系統互連104、積體電路裝置106、晶片互連108、頂部和底部導電接頭、導電球112、抗氧化金屬層114、中介層118和密封體120。
積體電路封裝系統400具有從在中介層118和密封體120頂部表面之間具有間隔高度之密封體120所顯露的導電球112。頂部導電接頭115和部分顯露的導電球112可以橋接由中介層間隔高度所提供的間隙。
中介層黏合劑402可以形成在積體電路器件106的頂側和中介層118的底側之間。中介層黏合劑402可以包括導熱膏、環氧樹脂、二氧化矽填料或其組合。已 經發現，中介層黏合劑402可以作為散熱之用，用於將熱量從積體電路電露106散發出去。此外，已經發現氣流和散熱可以發生在氣隙或中介層118和密封體120的頂部表面之間的中介層間隙高度。
積體電路封裝系統400可以包括選擇多個安裝。例如，安裝導電球可以不需要導電接頭。已經發現導電球112可以包含剛好足夠的用於黏附的焊料，以進一步減小封裝高度。
積體電路封裝系統400可以選擇包含多個安裝。例如，安裝導電球可以不需要導電接頭。已經發現導電球112可以包含剛好足夠的用於黏附的焊料，以進一步減小封裝高度。
此外，例如，積體電路封裝系統400可以包括具有頂部或底部導電接頭的選擇。積體電路封裝系統400的另一選擇可以包括用於與導電球112接合的頂部和底部導電接頭。積體電路封裝系統400也可以包含可選的底膠(未示出)，其係用於為極薄之厚度70微米以下的晶粒提供結構支撐。
中介層黏合劑402和底膠可以防止積體電路裝置106的翹曲和開裂，並且為中介層118和基底基板102的周圍部分提供結構支撐。積體電路封裝系統400也可以包含所有的如第1圖的積體電路封裝系統100中所描述的本發明的優點和益處。
依據第5圖，其中表示在本發明的第四實施 例中的具有中介層支撐構造機構的積體電路封裝系統500的橫截面圖。積體電路封裝系統500與積體電路封裝系統300相同，除了積體電路封裝系統500包含如第1圖所示的封裝改質之外。
積體電路封裝系統500可以包含基底基板102、基底端103、系統互連104、積體電路裝置106、晶片互連108、頂部和底部導電接頭、導電球112、抗氧化金屬層114、中介層118及密封體120。
積體電路封裝系統500具有從在中介層118和密封體120頂部表面之間具有間隔高度之密封體120所顯露的導電球112。頂部導電接頭115和導電球的顯露部分112可以橋接由中介層間隙高度所提供的間隙。
中介層黏合劑402可以形成在積體電路裝置106的頂側和中介層118的底側之間。積體電路封裝系統500可以選擇包括多個安裝選擇。例如，安裝導電球可以不需要導電接頭。已經發現導電球112可以包含剛好足夠之用於黏附的焊料，以進一步減小封裝高度。
此外，例如，積體電路封裝系統500可以選擇包含具有頂部或底部導電接頭。積體電路封裝系統500的另一選擇可以包含用於與導電球112接合之頂部和底部導電接頭。積體電路封裝系統500也可以包含如第3圖所示之積體電路封裝系統300及第4圖所示之積體電路封裝系統400中所描述的所有發明的優點和益處。
積體電路封裝系統500和積體電路封裝系 統400可以使用薄膜輔助成型製程以在密封體120上方形成顯露出上端或突出部分的導電球。
一個例示性方法包含以下步驟：步驟(a)提供基底基板102，步驟(b)接著是在基底基板102上形成導電球112。接下來，步驟(c)包括提供薄膜，其中薄膜實質上是平坦的，步驟(d)隨後是將薄膜耦合到導電球112。
步驟(e)包括在基底基板102上和導電球周圍沉積密封體120，其中步驟(e)可以與步驟(d)結合或伴隨步驟(d)進行。在步驟(e)的密封或模製過程期間，密封體120或實質上平坦的薄膜或兩者可操作以將導電球從初始位置改變到升高位置，以實現導電球自密封體120突出之顯露部分。
在密封或模製過程期間，當實質上平坦的薄膜與導電球物理接觸並且沉積封裝時，薄膜和密封體120的組合以及薄膜輔助的模製之製程條件(例如，壓力、溫度)能夠實現導電球突出於密封體120之頂部表面上方。突出部的高度可以在50微米至30微米的範圍內，此提供足夠的表面空間來安裝導電球至頂部組件，諸如中介層118。
現在依據第6圖，其中表示出了積體電路封裝系統400的例示性尺寸圖。積體電路封裝系統400可以包含基底基板102、基底端103、系統互連104、積體電路裝置106、晶片互連108、底部導電接頭116、導電球112、抗氧化金屬層114、頂部和底部阻焊層、中介層118及密 封體120。
圖式表示使得頂部球間距(導電球之間的間距)為0.30毫米以下的範圍(為了方便說明，這些尺寸可以包含0.30毫米至0.20毫米的範圍)係為可能之例示性尺寸。圖式可以包含導電球112(a)的直徑、球至球空間(b)的尺寸以及底部阻焊劑和中介層118(c)之間的高度。
圖式也可以包含積體電路器件106(d)之晶粒的例示性厚度，從底部阻焊劑到密封體120(e)之頂部表面的高度，以及導電球上的點與相鄰球(f)上之同樣的點之間的之頂部球間距。此圖式也可以包含在積體電路裝置106的頂部表面和中介層118(g)的底部表面之間的間隙或間隔空間。
針對頂部球間距在0.30毫米至0.23毫米之間的封裝，芯體113或銅球的直徑可以保持相等。例如，直徑(a)可以為180微米以下。在具有等於或小於0.20毫米的頂部球間距的封裝中，直徑(a)可以減少百分之十七。已經發現導電球112的結構強度提供使用直徑為180微米以下的球以支撐頂部中介層之能力。減小的直徑(a)允許頂部球間距減小到0.30毫米及以下。
導電球112可以提供在導電球之間的球至球的空間(b)為120微米以下。例如，當形成具有縮減的頂部球距(f)之封裝時，球至球的空間(b)可以減少百分之六十。
積體電路裝置106的晶粒厚度(d)可以包含 100微米以下之高度。此外，已經發現當減小整個封裝尺寸時，導電球112可以支持厚度減少百分之三十的晶粒。
可以基於附接方法來調整中介層118和底部阻焊層(e)之間的晶粒高度。例如，如果使用質量回流(MR)，則高度可以低於170微米，如果使用熱壓結合(TCB)，則高度可以低於135微米。已經發現熱壓縮可以用於將中介層118附接到導電球以進一步減小封裝高度。
積體電路封裝系統400可以包含球間距602，其係由頂部球間距(f)表示。由於由小尺寸導電球所提供的結構支撐的緣故，球間距602可以在0.30微米至0.20微米的範圍之間。已經發現，相較於焊球，球間距602的尺寸可以縮減，因為導電球比相同尺寸的焊球提供更多的結構支撐。也已經發現導電球112的實心銅球的建構防止焊料在焊球上之小間距內彼此橋接和短路。
積體電路封裝系統400也可以包含從密封體120的頂部表面到中介層118的底部表面之由(g)所示的中介層間隙高度604。導電球112可自具有與中介層之間隙高度604相等的密封體120顯露出來。這允許在嵌入中介層118在導電球112上方之前製造封裝的底部部分。
當使用質量回流技術時，頂部中介層和晶粒頂部之間的間隙可以為50微米至30微米。對於TCB方法，範圍可以為70微米至50微米。該範圍可以表示在積體電路裝置106的頂部和插中介層118的底部之間的可選擇之中介層黏合劑(第6圖未示出)的高度或厚度。
底膠606可以在積體電路裝置106和基底基板102之間。底膠606可以是用於保護晶片柱109和芯片連108的模製材料。
圖式也可以包含導電球112的詳細視圖。導電球112可以包含用於圍繞芯體113的塗層之層厚度608。塗層可以包含第1圖之抗氧化金屬層114或第3圖的防腐塗層302。塗層係為0.01微米和0.4微米之間的薄層，其係用於保護芯體113的表面。
已經發現，與更複雜或焊球相關的封裝設計相比，導電球112在封裝中的組件之間提供小尺寸。導電球112可以提供小的接合焊盤和間距，並且仍然為積體電路裝置106提供環境以防止軋碎。
已經發現，由導電球112所提供的減小的間距可以允許更精細的頂部球間距，其減小了封裝的信號和功率行進路徑。封裝的輪廓也減小，其係因為由180微米以下的導電球112提供堅固的結構支撐，並且不會對積體電路器件造成軋碎損壞。已經發現，芯體113，諸如銅芯在中介層和基體積板之間提供了堅固且非脆性的連接。
現在依據第7圖，其中表示本發明的另一實施例的積體電路封裝系之製造方法700的流程圖。方法700包括：提供基底基板，該基底基板包含在區塊702中的基底端；在區塊704中將積體電路裝置安裝在基底基板上；在區塊706中形成底部導電接頭在基底端上；將導電球安裝述底部導電接頭上，該導電球包含在區塊708中的芯體；以及 在區塊710中安裝中介層在導電球上。
選擇地，例示性流程可以包括預焊接製程。安裝積體電路裝置後，諸如焊料之導電接合材料可以附接到基底基板、中介層或其組合。
所使用的方法、製程、設備、裝置、產品及/或系統係直接、具有成本效益、不複雜、高度通用、準確、靈敏且有效，並且可以透過調整已知的組件來實現，以達成穩定、有效率且具有經濟效益的製造、應用及利用。
本發明的另一個重要態樣是其有價值地支持和幫助於降低成本、簡化系統和增加產能的歷史趨勢。因此，本發明的這些和其他有價值之態樣使得該技術的狀態進一步至少達到下一個水準。
儘管已經結合特定的最佳模式來描述本發明，但是應當理解，根據前述描述，許多替代、改良及變化對於本領域技術人員將是顯而易見的。因此，旨在包括落入申請專利範圍內的所有這樣的替代、改良和變化。迄今為止在此闡述或在附圖中所示的所有事項應以說明性和非限制性的意義來解釋。
100‧‧‧積體電路封裝系統
102‧‧‧基底基板
103‧‧‧基底端
104‧‧‧系統互連
106‧‧‧積體電路裝置
108‧‧‧晶片互連
109‧‧‧晶片柱
112‧‧‧導電球
113‧‧‧芯體
114‧‧‧抗氧化金屬層
115‧‧‧頂部導電接頭
116‧‧‧底部導電接頭
118‧‧‧中介層
120‧‧‧密封體

Claims (20)

  1. 一種製造積體電路封裝系統之方法，其包括：提供基底基板，該基底基板包含基底端；在該基底基板上安裝積體電路裝置；在該基底端上形成底部導電接頭；在該底部導電接頭上安裝導電球，該導電球包含芯體；以及在該導電球上安裝中介層。
  2. 如申請專利範圍第1項所述之方法，復包括在該中介層與該基底基板之間形成密封體。
  3. 如申請專利範圍第1項所述之方法，復包括在該積體電路與該中介層之間施用中介層黏合劑。
  4. 如申請專利範圍第1項所述之方法，復包括形成圍繞該芯體的抗氧化金屬層，該抗氧化金屬層包含Ni、Au、NiPd、NiAu、NiPdAu、或其組合。
  5. 如申請專利範圍第1項所述之方法，復包括形成圍繞該芯體之防腐塗層，該防腐塗層包含有機可焊性防腐劑。
  6. 一種製造積體電路封裝系統之方法，其包括：提供基底基板，該基底基板包含基底端；在該基底基板上安裝積體電路裝置；在該基底端上形成底部導電接頭；在該底部導電接頭上安裝導電球；該導電球包含芯體及塗層；以及 在該導電球上安裝中介層。
  7. 如申請專利範圍第6項所述之方法，其中，安裝該導電球包含安裝銅球。
  8. 如申請專利範圍第6項所述之方法，復包括在該積體電路裝置與該基底基板之間施用底膠。
  9. 如申請專利範圍第6項所述之方法，復包括：其中，形成該底部導電接頭包含形成該底部導電接頭直接與該基底端接觸，該底部導電接頭包含預先安裝之具有助溶劑之焊料。
  10. 如申請專利範圍第6項所述之方法，其中，形成圍繞該芯體之該塗層包括形成具有0.01微米至4微米的層厚度之該層。
  11. 一種積體電路封裝系統，其包括：基底基板，該基底基板包含基底端；積體電路裝置，在該基底基板上；底部導電接頭，在該基底端上；導電球，在該底部導電接頭上，該導電球包含芯體；以及中介層，在該導電球上。
  12. 如申請專利範圍第11項所述之系統，復包括在該中介層與該基底基板之間之密封體。
  13. 如申請專利範圍第11項所述之系統，復包括在該積體電路裝置與該中介層之間之中介層黏著劑。
  14. 如申請專利範圍第11項所述之系統，復包括圍繞該芯 體的抗氧化金屬層，該抗氧化金屬層包含Ni、Au、NiPd、NiAu、NiPdAu、或其組合。
  15. 如申請專利範圍第11項所述之系統，復包括圍繞該芯體之防腐塗層，該防腐塗層包含有機可焊性防腐劑。
  16. 如申請專利範圍第11項所述之系統，其中，該導電球包含圍繞該芯體之塗層。
  17. 如申請專利範圍第16項所述之系統，其中，該芯體包含銅球。
  18. 如申請專利範圍第16項所述之系統，復包括在該積體電路裝置與該基底基板之間的底膠。
  19. 如申請專利範圍第16項所述之系統，復包括該底部導電接頭與該基底端直接接觸，該底部導電接頭包含預先安裝之具有助溶劑之焊料。
  20. 如申請專利範圍第16項所述之系統，其中，該塗層包含具有0.01微米至4微米之層厚度。
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KR20170005774A (ko) 2017-01-16
US20160190054A1 (en) 2016-06-30
KR102561718B1 (ko) 2023-07-31
US9859200B2 (en) 2018-01-02

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