TW201630136A - 複合式電路板及其製作方法，以及半導體封裝結構 - Google Patents

複合式電路板及其製作方法，以及半導體封裝結構 Download PDF

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TW201630136A
TW201630136A TW104107113A TW104107113A TW201630136A TW 201630136 A TW201630136 A TW 201630136A TW 104107113 A TW104107113 A TW 104107113A TW 104107113 A TW104107113 A TW 104107113A TW 201630136 A TW201630136 A TW 201630136A
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layer
solder resist
circuit board
pattern layer
insulating sealant
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黃昱程
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臻鼎科技股份有限公司
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Abstract

一種複合式電路板，其包括：一絕緣封膠層，其包括第一表面及與第一表面相對的第二表面；一防焊層，其形成於絕緣封膠層的第一表面；一線路圖形層，其形成於絕緣封膠層的第一表面且嵌設於防焊層中，該線路圖形層的厚度與防焊層的厚度相當；複數個導電柱，其嵌設於絕緣封膠層中，每一導電柱具有與該線路圖形層電性導通連接的第一端面和相對絕緣封膠層裸露的第二端面。所述的複合式電路板成本低廉，還可有效避免後續封裝過程中半導體封裝結構產品產生翹曲等不良。本發明還提供該複合式電路板的製作方法及應用該複合式電路板的半導體封裝結構。

Description

複合式電路板及其製作方法，以及半導體封裝結構
本發明涉及一種複合式電路板及其製作方法，以及應用該複合式電路板的半導體封裝結構。
半導體封裝結構通常包括電路板及電性連接該電路板的半導體晶片。然而，現有的半導體晶片的熱膨脹係數與電路板的熱膨脹係數通常相差較大，容易造成半導體封裝結構產生翹曲等不良，導致產品良率較低。
鑒於此，有必要提供一種可有效避免封裝過程產生翹曲等不良的複合式電路板及應用其的半導體封裝結構。
另外，還有必要提供一種上述複合式電路板的製作方法。
一種複合式電路板，其包括：
一絕緣封膠層，其包括第一表面及與第一表面相對的第二表面；
一防焊層，其形成於絕緣封膠層的第一表面；
一線路圖形層，其形成於絕緣封膠層的第一表面且嵌設於防焊層中，該線路圖形層的厚度與防焊層的厚度相當；
複數個導電柱，其嵌設於絕緣封膠層中，每一導電柱具有與該線路圖形層電性導通連接的第一端面和相對絕緣封膠層裸露的第二端面；
一支撐板，其形成於防焊層和線路圖形層上，且支撐板開設有一開口以局部裸露所述防焊層和線路圖形層。
一種應用上述複合式電路板的半導體封裝結構，該半導體封裝結構包括複合式電路板及與複合式電路板的線路圖形層電性導通連接的半導體晶片。
一種半導體封裝結構，其包括上述複合式電路板及與線路圖形層電性導通連接的半導體晶片，所述絕緣封膠層的熱膨脹係數與所述半導體晶片的熱膨脹係數相當。
一種複合式電路板的製作方法，包括步驟：
提供一支撐板；
在該支撐板的一表面的局部形成防焊層；
在該支撐板形成有防焊層的表面且未被該防焊層覆蓋的區域形成線路圖形層，該線路圖形層的厚度與防焊層的厚度相當；
在該線路圖形層表面形成複數個導電柱，每一導電柱具有與線路圖形層電性導通連接的第一端面和與第一端面相對的第二端面；
在該防焊層及線路圖形層表面形成絕緣封膠層，且所述複數個導電柱嵌設於該絕緣封膠層中，且導電柱的第二端面相對絕緣封膠層裸露；
對支撐板進行蝕刻形成一開口，以局部裸露所述防焊層和線路圖形層。
本發明藉由對複合式電路板的結構和材料的優化設計，不僅可有效降低成本，還可有效避免後續封裝過程中半導體封裝結構產品產生翹曲等不良。此外，該複合式電路板的製作方法工藝簡單，採用電鍍導電柱替代了傳統的機械鑽孔，並可實現精細的線路圖形的製備，還可製作出厚度較薄的複合式電路板，從而降低半導體封裝結構的整體厚度。
圖1是本發明一較佳實施方式的複合式電路板的剖視示意圖。
圖2是本發明第二較佳實施方式的複合式電路板的剖視示意圖。
圖3是本發明較佳實施方式的半導體封裝結構的剖視示意圖。
圖4是圖1所示的複合式電路板的加工流程示意圖一。
圖5是圖1所示的複合式電路板的加工流程示意圖二。
請參閱圖1，本發明一較佳實施方式的複合式電路板10包括：
一絕緣封膠層15，其包括第一表面153及與第一表面153相對的第二表面155；
一防焊層11，其形成於絕緣封膠層15的第一表面153；
一線路圖形層13，其形成於絕緣封膠層15的第一表面153且嵌設於防焊層11中，該線路圖形層13的厚度與防焊層11的厚度相當；
複數個導電柱17，其嵌設於絕緣封膠層15中，每一導電柱17具有與該線路圖形層13電性導通連接的第一端面171和相對絕緣封膠層15裸露的第二端面173；
一支撐板30，其形成於防焊層11和線路圖形層13上，且支撐板30開設有一開口33以局部裸露所述防焊層11和線路圖形層13。
每一導電柱17的第二端面173與絕緣封膠層15的第二表面155相平齊或相對突出於所述絕緣封膠層15的第二表面155。
該防焊層11由業界常規使用的防焊油墨塗布形成。
該絕緣封膠層15主要成分為環氧樹脂。該絕緣封膠層15的熱膨脹係數（3～6ppm/℃）與半導體晶片的熱膨脹係數（3～4ppm/℃）相當，可有效避免後續封裝半導體結構時造成的翹曲等不良。本發明採用環氧樹脂作為構成絕緣封膠層15的主要材料，相較於傳統電路板使用的銅箔基板材料（CCL）和聚丙烯（PP），其成本更加低廉。
該線路圖形層13、導電柱17的材質可為業界常規使用的各種導電的金屬，優選為金屬銅。
該支撐板30具有足夠的硬度和強度，以防止所述複合式電路板10搬運輸送過程中發生彎折變形等損毀，且可更方便的拿取所述複合式電路板10。本實施例中，該支撐板30可為被銅層包覆的聚合物板材。
所述防焊層11和線路圖形層13相對支撐板30的開口33裸露的區域形成為一黏晶區域（圖未示）以連接一半導體晶片50。
請參閱圖2，本發明第二較佳實施方式的複合式電路板20，其在上述的複合式電路板10的基礎上還增加有第二防焊層21和第二線路圖形層23。該第二防焊層21和第二線路圖形層23形成於絕緣封膠層15的第二表面155，且該第二線路圖形層23嵌設於該第二防焊層21中，且第二線路圖形層23的部分表面相對該第二防焊層21裸露，第二線路圖形層23與導電柱17的第二端面173電性導通連接。
請參閱圖3，本發明一較佳實施方式的半導體封裝結構100，其包括上述的複合式電路板20及半導體晶片50。該半導體晶片50與線路圖形層13藉由焊錫60實現電性導通連接。本實施例中，該半導體晶片50可為業界常規使用的覆晶晶片（flip-chip）或打線晶片（wire-bond）。
可以理解的，當採用覆晶晶片，則需要在複合式電路板20與覆晶晶片的結合處填充膠體（圖未示），一方面膠體可包裹住所述焊錫60以保護焊錫60，另一方面可增強複合式電路板20與覆晶晶片二者之間的結合力。
可以理解的，其他的實施方式中，該半導體封裝結構100中的複合式電路板20也可用複合式電路板10替代。
請參閱圖4-5，本發明一較佳實施方式的製作上述複合式電路板10的方法包括如下步驟：
(S1)提供一支撐板30。
該支撐板30具有足夠的硬度和強度，用以承載所述複合式電路板10。本實施例中，該支撐板30為被銅層包覆的聚合物板材，如圖4所示。
(S2)在該支撐板30一表面的局部形成防焊層11。
該步驟具體可為：在支撐板30的一表面全部塗覆感光防焊油墨，然後對該塗覆後的感光防焊油墨進行曝光顯影，以去除支撐板30表面的部分感光防焊油墨，使該支撐板30的局部表面形成防焊層11。
該步驟中對感光防焊油墨進行曝光時，可預先在支撐板30上開設相應的通孔31（如圖4所示。需說明的是，圖4所示的通孔31的位置僅為示意，不代表實際通孔31的開設位置），光線（如紫外線）從支撐板30未塗覆感光防焊油墨的一側射入，藉由所述通孔31照射到感光防焊油墨。
(S3)在該支撐板30形成有防焊層11的表面、且未被該防焊層11覆蓋的區域形成線路圖形層13。
本實施例中，形成線路圖形層13的方法可為電鍍。該線路圖形層13的厚度與防焊層11的厚度相當。本發明的方法可實現精細的線路圖形的製備。
(S4)在該線路圖形層13表面形成複數個導電柱17，每一導電柱17具有與線路圖形層13電性導通連接的第一端面171和與第一端面171相對的第二端面173。
請參閱圖5，該步驟具體包括：在防焊層11及線路圖形層13的表面形成一保護幹膜70（如圖5所示，支撐板30遠離線路圖形層13的表面也需形成保護幹膜70）；對形成於防焊層11及線路圖形層13的表面的保護幹膜70進行曝光顯影以去除部分保護幹膜70，並使線路圖形層13局部裸露；在該線路圖形層13局部裸露的表面形成複數個導電柱17與該線路圖形層13連通（形成導電柱17的方法可為電鍍）；最後去除殘留的保護幹膜70即可。本發明的方法採用電鍍導電柱17替代了傳統的機械鑽孔方式。
(S5)在該防焊層11及線路圖形層13表面形成一絕緣封膠層15，且所述複數個導電柱17嵌設於該絕緣封膠層15中，且導電柱17的第二端面173相對絕緣封膠層15裸露。
該步驟具體可為：將步驟(S4)獲得的產品放入一模具（圖未示）中，注塑熔融樹脂於該防焊層11及線路圖形層13的表面形成絕緣封膠層15，並使所述複數個導電柱17嵌設於該絕緣封膠層15中（如圖5所示）。該步驟還可包括對注塑形成的絕緣封膠層15的表面進行研磨，以使導電柱17的第二端面173相對絕緣封膠層15裸露。
可以理解的，進行步驟(S5)之前，還可對所述複數個導電柱17進行微蝕刻以粗化所述導電柱17的表面，如此可增強導電柱17與絕緣封膠層15二者之間的結合力。
該方法還可包括對支撐板30進行局部蝕刻形成一開口33的步驟，以局部裸露所述防焊層11和線路圖形層13。局部蝕刻的方式同樣可參上所述的方式，即在支撐板30上形成保護幹膜70，並對保護幹膜70進行曝光顯影以去除部分保護幹膜70使支撐板30需蝕刻的表面得以裸露；然後對裸露的支撐板30進行蝕刻去除。蝕刻去除方法可採用常規的蝕刻液進行化學蝕刻。
本發明複合式電路板的製作方法工藝簡單，可製作出厚度較薄的複合式電路板，從而降低半導體封裝結構的整體厚度。
可以理解的，製作上述複合式電路板20時，還需要在上述步驟(S5)的基礎上進一步進行形成第二防焊層21和第二線路圖形層23的步驟。具體可增加如下步驟：在絕緣封膠層15的表面形成（如物理氣相沉積）第二線路圖形層23使其與複數個導電柱17的第二端面173電性導通連接；對該第二線路圖形層23進行局部蝕刻去除部分的第二線路圖形層23，並使絕緣封膠層15裸露；再在裸露的絕緣封膠層15表面塗覆防焊油墨形成第二防焊層21。
對該第二線路圖形層23進行局部蝕刻的方法具體可為：在第二線路圖形層23的表面形成保護幹膜70（注：支撐板30遠離線路圖形層13的表面也需形成保護幹膜70）；對形成於第二線路圖形層23的表面的保護幹膜70進行曝光顯影以去除部分保護幹膜70，使第二線路圖形層23需蝕刻的表面得以裸露；然後對裸露的第二線路圖形層23進行蝕刻去除。蝕刻去除方法可採用常規的蝕刻液進行化學蝕刻。
可以理解的，在製作複合式電路板的最後階段，還可在線路圖形層13、或線路圖形層13和第二線路圖形層23的表面塗覆有機保焊劑（OSP）（圖未示），以保護線路圖形層13和/或第二線路圖形層23的表面；或是在線路圖形層13、或線路圖形層13和第二線路圖形層23的表面形成（如電鍍）鎳鈀金層（圖未示），以避免線路圖形層13和/或第二線路圖形層23裸露表面的氧化。
本發明藉由對複合式電路板的結構和材料的優化設計（包括在基板結構中引入絕緣封膠層，並藉由材料的設計使絕緣封膠層的熱膨脹係數與半導體晶片的熱膨脹係數相當），不僅可有效降低成本，還可有效避免後續封裝過程中半導體封裝結構產品產生翹曲等不良。此外，該複合式電路板的製作方法工藝簡單，採用電鍍導電柱替代了傳統的機械鑽孔，並可實現精細的線路圖形的製備，還可製作出厚度較薄的複合式電路板，從而降低半導體封裝結構的整體厚度。
10，20‧‧‧複合式電路板
11‧‧‧防焊層
13‧‧‧線路圖形層
21‧‧‧第二防焊層
23‧‧‧第二線路圖形層
15‧‧‧絕緣封膠層
153‧‧‧第一表面
155‧‧‧第二表面
17‧‧‧導電柱
171‧‧‧第一端面
173‧‧‧第二端面
30‧‧‧支撐板
33‧‧‧開口
31‧‧‧通孔
50‧‧‧半導體晶片
60‧‧‧焊錫
70‧‧‧保護幹膜
100‧‧‧半導體封裝結構
無
10‧‧‧複合式電路板
11‧‧‧防焊層
13‧‧‧線路圖形層
15‧‧‧絕緣封膠層
153‧‧‧第一表面
155‧‧‧第二表面
17‧‧‧導電柱
171‧‧‧第一端面
173‧‧‧第二端面
30‧‧‧支撐板
33‧‧‧開口

Claims (16)

  1. 一種複合式電路板，其包括：
    一絕緣封膠層，其包括第一表面及與第一表面相對的第二表面；
    一防焊層，其形成於絕緣封膠層的第一表面；
    一線路圖形層，其形成於絕緣封膠層的第一表面且嵌設於防焊層中，該線路圖形層的厚度與防焊層的厚度相當；
    複數個導電柱，其嵌設於絕緣封膠層中，每一導電柱具有與該線路圖形層電性導通連接的第一端面和相對絕緣封膠層裸露的第二端面；
    一支撐板，其形成於防焊層和線路圖形層上，且支撐板開設有一開口以局部裸露所述防焊層和線路圖形層。
  2. 如申請專利範圍第1項所述的複合式電路板，其中：每一導電柱的第二端面與絕緣封膠層的第二表面相平齊或相對突出於所述絕緣封膠層的第二表面。
  3. 如申請專利範圍第1項所述的複合式電路板，其中：該絕緣封膠層的熱膨脹係數為3～6ppm/℃。
  4. 如申請專利範圍第1項所述的複合式電路板，其中：該絕緣封膠層的主要成分為環氧樹脂。
  5. 如申請專利範圍第1項所述的複合式電路板，其中：該線路圖形層、導電柱的材質均為金屬銅。
  6. 如申請專利範圍第1項所述的複合式電路板，其中：該複合式電路板還包括第二防焊層和第二線路圖形層，該第二防焊層和第二線路圖形層形成於絕緣封膠層的第二表面，該第二線路圖形層嵌設於該第二防焊層中，且第二線路圖形層的部分表面相對該第二防焊層裸露，該第二線路圖形層與導電柱電性導通連接。
  7. 如申請專利範圍第1項所述的複合式電路板，其中：所述防焊層和線路圖形層相對開口裸露的區域形成一黏晶區域以連接半導體晶片。
  8. 一種半導體封裝結構，其包括如申請專利範圍第1~7任一項所述的複合式電路板及與所述線路圖形層電性導通連接的半導體晶片，所述絕緣封膠層的熱膨脹係數與所述半導體晶片的熱膨脹係數相當。
  9. 一種複合式電路板的製作方法，包括步驟：
    提供一支撐板；
    在該支撐板的一表面的局部形成防焊層；
    在該支撐板形成有防焊層的表面且未被該防焊層覆蓋的區域形成線路圖形層，該線路圖形層的厚度與防焊層的厚度相當；
    在該線路圖形層表面形成複數個導電柱，每一導電柱具有與線路圖形層電性導通連接的第一端面和與第一端面相對的第二端面；
    在該防焊層及線路圖形層表面形成絕緣封膠層，且所述複數個導電柱嵌設於該絕緣封膠層中，且導電柱的第二端面相對絕緣封膠層裸露；
    對支撐板進行蝕刻形成一開口，以局部裸露所述防焊層和線路圖形層。
  10. 如申請專利範圍第9項所述的複合式電路板的製作方法，其中：所述形成線路圖形層和複數個導電柱的的方法均為電鍍。
  11. 如申請專利範圍第9項所述的複合式電路板的製作方法，其中：在該支撐板的局部表面形成防焊層的步驟具體包括：在支撐板的一表面全部塗覆感光防焊油墨，然後對該塗覆後的感光防焊油墨進行曝光顯影以去除支撐板表面的部分感光防焊油墨，使該支撐板的局部表面形成防焊層。
  12. 如申請專利範圍第9項所述的複合式電路板的製作方法，其中：所述形成複數個導電柱的步驟具體包括：在防焊層及線路圖形層的表面形成保護幹膜；對該保護幹膜進行曝光顯影以去除部分保護幹膜，並使線路圖形層局部裸露；在該線路圖形層局部裸露的表面形成複數個導電柱與該線路圖形層連通；去除殘留的保護幹膜。
  13. 如申請專利範圍第9項所述的複合式電路板的製作方法，其中：形成絕緣封膠層的步驟具體包括：採用模具注塑法，注塑熔融樹脂於該防焊層及線路圖形層的表面形成絕緣封膠層，並使所述複數個導電柱嵌設於該絕緣封膠層中；對注塑形成的絕緣封膠層的表面進行研磨。
  14. 如申請專利範圍第9項所述的複合式電路板的製作方法，其中：該方法還包括在形成絕緣封膠層的步驟前，對所述複數個導電柱進行微蝕刻以粗化所述導電柱的表面的步驟。
  15. 如申請專利範圍第9項所述的複合式電路板的製作方法，其中：該方法還包括在形成絕緣封膠層的步驟後，在絕緣封膠層的一表面形成第二線路圖形層與複數個導電柱的第二端面電性導通連接；對該第二線路圖形層進行局部蝕刻去除部分的第二線路圖形層，並使絕緣封膠層裸露；再在裸露的絕緣封膠層表面塗覆防焊油墨形成第二防焊層。
  16. 如申請專利範圍第9項所述的複合式電路板的製作方法，其中：該絕緣封膠層的主要成分為環氧樹脂，該絕緣封膠層的熱膨脹係數為3～6ppm/℃。
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TWI622151B (zh) * 2016-12-07 2018-04-21 矽品精密工業股份有限公司 用於半導體封裝的承載基板與其封裝結構，及半導體封裝元件的製作方法

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CN110366308A (zh) * 2019-08-02 2019-10-22 昆山丘钛微电子科技有限公司 线路板制造方法及线路板
CN110996519A (zh) * 2019-12-17 2020-04-10 Tcl华瑞照明科技（惠州）有限公司 线路板及其制作方法

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* Cited by examiner, † Cited by third party
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TWI622151B (zh) * 2016-12-07 2018-04-21 矽品精密工業股份有限公司 用於半導體封裝的承載基板與其封裝結構，及半導體封裝元件的製作方法

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