TW201611205A - 電子裝置、零件安裝基板及電子機器 - Google Patents

電子裝置、零件安裝基板及電子機器 Download PDF

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Publication number
TW201611205A
TW201611205A TW104126134A TW104126134A TW201611205A TW 201611205 A TW201611205 A TW 201611205A TW 104126134 A TW104126134 A TW 104126134A TW 104126134 A TW104126134 A TW 104126134A TW 201611205 A TW201611205 A TW 201611205A
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Taiwan
Prior art keywords
main surface
terminal
electronic device
substrate
circuit board
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TW104126134A
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English (en)
Inventor
Kunihiko Saruta
Hiroshi Ozaki
Hidetoshi Kabasawa
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Sony Corp
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Publication of TW201611205A publication Critical patent/TW201611205A/zh

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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/0032—Packages or encapsulation
    • B81B7/0045—Packages or encapsulation for reducing stress inside of the package structure
    • B81B7/0048—Packages or encapsulation for reducing stress inside of the package structure between the MEMS die and the substrate
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/0032—Packages or encapsulation
    • B81B7/0074—3D packaging, i.e. encapsulation containing one or several MEMS devices arranged in planes non-parallel to the mounting board
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
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    • H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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Abstract

本發明提供一種能夠抑制基板之翹曲之電子裝置、零件安裝基板及電子機器。 本技術之一形態之電子裝置包括第1電路基板、及第2電路基板。上述第1電路基板具有第1主面、第2主面、及複數個外部端子。上述複數個外部端子包含位於最外周之第1端子群，且呈矩陣狀配置於上述第1主面。上述第2電路基板具有與上述第2主面對向之端子面、及複數個連接端子。上述複數個連接端子係配置於上述端子面，包含與上述第1端子群之至少一部分對向之第2端子群，且電性連接於上述第2主面。

Description

電子裝置、零件安裝基板及電子機器
本技術係關於一種表面安裝型之電子裝置、以及具備上述電子裝置之零件安裝基板及電子機器。
近年來，電子裝置之安裝技術飛躍地進步，開發有積層半導體晶片並安裝之晶片堆疊(COC)技術等各種積層安裝技術。
利用該等積層安裝技術之電子裝置等具有例如使用焊料等將電路基板與積層於其上之半導體晶片相互連接之構造。又，為了確保連接可靠性，多於半導體晶片與電路基板之間填充底部填充樹脂。於該情形時，由於底部填充樹脂層與端子之熱膨脹係數互不相同，故於熱環境下，會對電路基板施加極大之熱應力，其結果，存在電路基板產生翹曲之情況。由於電路基板之翹曲對可靠性或裝置特性等造成影響，故於實現積層安裝方面成為大的課題。
於專利文獻1中，揭示有一種具備虛設端子之配線基板。虛設端子係沿著基板之對角線上配置。由於對基板之對角線上施加較大之應力，故誘發基板之翹曲。因此，若將端子電極配置於基板之對角線上，則有因基板之翹曲而導致產生端子電極之連接不良之虞。因此，於專利文獻1中，以避開基板之對角線上之方式配置端子電極，且於對角線上設置虛設端子，藉此，避免因基板翹曲而導致產生之端子電極之連接不良。
又，於專利文獻2中，揭示有一種接著於多層電路配線基板之支 持板。該支持板之尺寸小於多層電路配線基板上之供設置二次安裝用電極墊之區域的尺寸。於支持板之尺寸與供設置二次安裝用電極墊之區域之尺寸相同之情形時，尤其會在多層電路配線基板之外周產生翹曲。其原因在於，多層電路配線基板之材料即樹脂材料、與支持該多層電路配線基板之支持板之材料即金屬之熱膨脹係數互不相同。有因多層電路配線基板之翹曲而導致尤其在配置於多層電路配線基板之外周之二次安裝用電極墊中產生連接不良之虞。因此，於專利文獻2中，形成尺寸較供設置二次安裝用電極墊之區域小之支持板，避免應力向最外側之二次安裝用電極墊集中，藉此，提高連接可靠性。
[先前技術文獻] [專利文獻]
[專利文獻1]日本專利第4082220號
[專利文獻2]日本專利第4779619號
近年來，應用電子裝置之電子機器等越來越高性能化及多功能化，為了提高電子裝置之可靠性，而要求抑制基板之翹曲。
鑒於如上情況，本技術之目的在於提供一種能夠抑制基板之翹曲的電子裝置、零件安裝基板及電子機器。
本技術之一形態之電子裝置包括第1電路基板、及第2電路基板。
上述第1電路基板具有第1主面、第2主面、及複數個外部端子。上述複數個外部端子包含位於最外周之第1端子群，且呈矩陣狀配置於上述第1主面。
上述第2電路基板具有與上述第2主面對向之端子面、及複數個 連接端子。上述複數個連接端子係配置於上述端子面，包含與上述第1端子群之至少一部分對向之第2端子群，且電性連接於上述第2主面。
於上述電子裝置中，複數個外部端子及複數個連接端子於最外周分別包含相互對向之第1及第2端子群。藉此，於因溫度變化所致之熱膨脹或熱收縮時，降低作用於第1電路基板之外周部之彎曲應力，其結果，能夠抑制基板之翹曲。
上述第1端子群及上述第2端子群中之至少一端子群之一部分亦可為虛設端子。
例如，存在電路設計上難以使第1端子群與第2端子群相互對向配置之情形。於該情形時，若由虛設端子構成至少一端子群之一部分，則能夠使第1端子群與第2端子群於所期望之位置對向。
於上述第1電路基板之形狀為矩形之情形時，上述虛設端子典型而言係配置於上述第1主面及上述第2主面中之至少一主面之四角。
藉由在彎曲應力較大之基板之四角配置虛設端子，可高效率地抑制基板之翹曲。
上述第1電路基板可為有機基板，亦可為半導體基板。半導體基板亦可為包含積體電路之IC(Integrated Circuit，積體電路)晶片等。
根據上述電子裝置，可無關於第1電路基板之構成材料、種類，而抑制溫度變化時之翹曲。
上述電子裝置亦可進而包括形成於上述第2主面與上述端子面之間之底部填充樹脂層。
根據上述構成，可確保第1電路基板與第2電路基板之接合可靠性，並且抑制因底部填充樹脂層與各端子群之熱膨脹係數之差異所致之第1電路基板之翹曲。
上述第1電路基板亦可進而具有絕緣性樹脂膜。上述絕緣性樹脂 膜係配置於上述第1主面與上述複數個外部端子之間，且由較上述複數個外部端子更軟質之樹脂材料構成。
藉此，可緩和複數個外部端子對第1主面造成之應力，從而能夠抑制第1電路基板之翹曲。
上述複數個外部端子及上述複數個連接端子亦可各自包含突起電極。該等突起電極能以互不相同之材料構成，亦能以相同之材料構成。於上述各突起電極由相互相同之材料構成之情形時，可將兩突起電極之熱膨脹係數設為相同，故能夠抑制因該熱膨脹係數之差異所致之第1電路基板之翹曲。
上述第2電路基板並不限定於由單一之基板構成之情形，亦可由複數個基板構成。
上述第2電路基板並無特別限定，可為IC晶片，亦可為具有感測器部之基板。感測器部例如可為攝像元件或MEMS(Micro Electro Mechanical Systems，微機電系統)裝置等。
根據上述電子裝置，由於能夠抑制第1電路基板之翹曲，故可穩定地確保第2電路基板之裝置特性。
本技術之一形態之零件安裝基板包括第1電路基板、第2電路基板、及第3電路基板。
上述第1電路基板具有第1主面、第2主面、及複數個外部端子。上述複數個外部端子包含位於最外周之第1端子群，且呈矩陣狀配置於上述第1主面。
上述第2電路基板具有與上述第2主面對向之端子面、及複數個連接端子。上述複數個連接端子係配置於上述端子面，包含與上述第1端子群中之至少一部分對向之第2端子群，且電性連接於上述第2主面。
上述第3電路基板係與上述第1主面對向地配置，且電性連接於 上述複數個外部端子。
本技術之一形態之電子機器包括第1電路基板、第2電路基板、及第3基板。
上述第1電路基板具有第1主面、第2主面、及複數個外部端子。上述複數個外部端子包含位於最外周之第1端子群，且呈矩陣狀配置於上述第1主面。
上述第2電路基板具有與上述第2主面對向之端子面、及複數個連接端子。上述複數個連接端子係配置於上述端子面，包含與上述第1端子群中之至少一部分對向之第2端子群，且電性連接於上述第2主面。
上述第3電路基板係與上述第1主面對向地配置，且電性連接於上述複數個外部端子。
如上所述，根據本技術，能夠抑制基板之翹曲。
再者，此處所記載之效果未必受到限定，亦可為本揭示中所記載之任一效果。
1‧‧‧電子裝置
2‧‧‧電子裝置
10‧‧‧第1電路基板
11‧‧‧基板本體
12‧‧‧外部端子
12A‧‧‧端子群
12B‧‧‧端子群
12C‧‧‧虛設端子
13‧‧‧焊墊部
13C‧‧‧虛設焊墊
14‧‧‧樹脂膜
15‧‧‧配線層
16‧‧‧保護膜
17‧‧‧積體電路
20‧‧‧第2電路基板
21‧‧‧基板本體
22‧‧‧連接端子
22C‧‧‧虛設端子
23‧‧‧補強部
30‧‧‧安裝基板
41‧‧‧底部填充樹脂層
42‧‧‧底部填充樹脂層
100‧‧‧零件安裝基板
111‧‧‧第1主面
112‧‧‧第2主面
120‧‧‧突起電極
201‧‧‧第2電路基板
202‧‧‧第2電路基板
211‧‧‧端子面
220‧‧‧突起電極
221‧‧‧連接端子
222‧‧‧連接端子
300‧‧‧零件安裝基板
400‧‧‧零件安裝基板
500‧‧‧零件安裝基板
600‧‧‧零件安裝基板
P‧‧‧焊墊部
X‧‧‧軸
Y‧‧‧軸
Z‧‧‧軸
圖1係概略性地表示本技術之第1實施形態之電子裝置之構成的剖視圖。
圖2係具備上述電子裝置之零件安裝基板之概略剖視圖。
圖3表示上述電子裝置中之第1電路基板之外部端子之配置形態的一例，A係自第2主面觀察到之第1電路基板之俯視圖，B係自第1主面觀察到之第1電路基板之俯視圖(後視圖)。
圖4係模式性地說明上述電子裝置之一作用之剖視圖。
圖5A、B係構成本技術之第2實施形態之電子裝置之第1電路基板的俯視圖及後視圖。
圖6A、B係表示根據溫度變化而施加至第1電路基板之彎曲應力之面內分佈的模擬結果。
圖7係本技術之第3實施形態中搭載有電子裝置之零件安裝基板之概略剖視圖。
圖8係圖7所示之電子裝置之主要部分之放大剖視圖。
圖9係本技術之第4實施形態中搭載有電子裝置之零件安裝基板之概略剖視圖。
圖10係本技術之第5實施形態中搭載有電子裝置之零件安裝基板之概略剖視圖。
圖11係本技術之第6實施形態中搭載有電子裝置之零件安裝基板之概略剖視圖。
圖12係構成圖11所示之電子裝置之第1電路基板之俯視圖。
以下，一面參照圖式一面說明本發明之實施形態。
<第1實施形態>
圖1係概略性地表示本技術之第1實施形態之電子裝置1之構成的剖視圖。圖2係具備電子裝置1之零件安裝基板100之概略剖視圖。
於各圖中，X軸及Y軸表示相互正交之平面方向，Z軸表示與其等正交之高度(厚度)方向(於以下各圖中亦相同)。
[電子裝置之基板構成]
如圖1所示，本實施形態之電子裝置1包括第1電路基板10、及第2電路基板20。電子裝置1係作為整體上形成為大致長方體形狀之單一封裝零件而構成。第2電路基板20係藉由例如覆晶方式安裝於第1電路基板10上。
零件安裝基板100包括電子裝置1、及安裝基板30(第3電路基板)。電子裝置1係安裝於安裝基板30上。於圖示之例中，電子裝置1 係覆晶安裝於安裝基板30上，但並不限定於此，亦能以引線接合方式安裝。
零件安裝基板100例如搭載於攝錄影機、遊戲機、攜帶型資訊終端等各種電子機器。安裝基板30可為單面基板，亦可為雙面基板。於安裝基板30，搭載除電子裝置1以外之其他多種電性、電子零件，而構成電子機器之控制電路之至少一部分。
繼而，對構成電子裝置1之第1及第2電路基板10、20之詳細情況進行說明。
第1電路基板10具有基板本體11、及複數個外部端子12。基板本體11具有第1主面111、及第2主面112，複數個外部端子12係配置於第1主面111。於第2主面112，設置有與第2電路基板20電性連接之複數個焊墊部13。
於本實施形態中，第1電路基板10之平面形狀形成為正方形。並不限定於此，第1電路基板10之平面形狀亦可由長方形或其他多邊形構成。厚度亦並無特別限定，例如為100μm~150μm。第1電路基板10典型而言係由配線基板、半導體裸晶(IC晶片)等構成。
作為配線基板，可應用樹脂基板、金屬基板、陶瓷基板等，於該情形時，基板本體11係由合成樹脂材料、金屬材料或陶瓷材料、及內置於其等之配線材料等構成。另一方面，於由半導體裸晶構成第1電路基板10之情形時，基板本體11係由矽基板或鎵-砷基板等半導體基板構成。於半導體基板，構成包含電晶體或記憶體等之積體電路、貫通半導體基板之正面及背面之通孔等。第1電路基板10亦可內置控制第2電路基板20之驅動之控制電路。
第1主面111構成基板本體11之一主面(於圖1中為下表面)，第2主面112構成與第1主面111為相反側之主面(於圖1中為上表面)。典型而言，第1及第2主面111、112之外部端子12及焊墊部13之形成區域以外 之區域，由以氧化矽膜、氮化矽膜等構成之電性絕緣性之保護膜被覆。
複數個外部端子12及複數個焊墊部13係由積層於基板本體11之兩主面111、112之特定形狀之導體層構成。構成外部端子12及焊墊部13之導體材料並無特別限定，可由Cu、Al等金屬單層膜構成，亦可由Au/Ti/Ni等不同種金屬之積層膜構成。
複數個外部端子12亦可包含突起電極120，該突起電極120電性、機械地連接於形成在安裝基板30表面之焊盤部(或焊墊部)。突起電極120係由分別設置於複數個外部端子12之焊料凸塊(球形凸塊)構成，但除此以外，亦可由鍍敷凸塊、金凸塊等構成。
於第1電路基板10與安裝基板30之接合部，如圖2所示，亦可形成底部填充樹脂層42。藉此，上述接合部之機械強度提高，故能夠確保接合部之可靠性。底部填充樹脂層42典型而言由環氧系樹脂等熱固性樹脂材料構成，亦可視需要而含有適當之填料。
複數個焊墊部13係與配置於第2電路基板20之端子面211之複數個連接端子22對應地配置。焊墊部13之數量可與外部端子12之數量相同，亦可不同。該等外部端子12及焊墊部13經由基板本體11之內部而相互電性連接。外部端子12典型而言具有將焊墊部13之佈局重新排列於第1主面111之功能。
第2電路基板20具有基板本體21、及複數個連接端子22。基板本體21具有與第1電路基板10(第2主面112)對向之端子面211，且複數個連接端子22係配置於端子面211。
於本實施形態中，第2電路基板20之平面形狀與第1電路基板10同樣地形成為正方形。並不限定於此，第2電路基板10之平面形狀亦可由長方形或其他多邊形構成。又，於本實施形態中，第2電路基板20係形成為與第1電路基板10相同之大小，但並不限定於此，亦可以 小於(或大於)第1電路基板10之尺寸形成。
第2電路基板20典型而言由配線基板、IC晶片、感測器裝置等構成。具體而言，第2電路基板20係由表面形成有積體電路之裸晶構成，或者，具有內置有CCD(Charge Coupled Device，電荷耦合裝置)/CMOS(Complementary Metal Oxide Semiconductor，互補型金屬氧化物半導體)成像器等之攝像裝置、使用MEMS(Micro Electro Mechanical System)技術而製作之角速度感測器等感測器部。基板本體21可由單層之矽基板構成，亦可由SOI(Silicon On Insulator，絕緣層上之矽)基板等複合基板構成。
複數個連接端子22係沿著基板本體21之周緣(4邊)以單行排列。複數個連接端子22係由積層於基板本體21之端子面211之特定形狀之導體層構成。構成連接端子22之導體材料並無特別限定，可由Cu、Al等金屬單層膜構成，亦可由Au/Ti/Ni等不同種金屬之積層膜構成。
複數個連接端子22亦可包含突起電極220，該突起電極220電性、機械地連接於第1電路基板10之焊墊部13。突起電極220係由分別設置於複數個連接端子22之焊料凸塊(球型凸塊)構成，但除此以外，亦可由鍍敷凸塊、金凸塊等構成。於本實施形態中，突起電極220係由與構成外部端子12之突起電極120相同或同種之焊料材料構成，但當然並不限定於此。
於第1電路基板10(第2主面112)與第2電路基板20(端子面211)之間，如圖2所示，亦可形成底部填充樹脂層41。藉此，上述接合部之機械強度提高，故能夠確保接合部之可靠性。底部填充樹脂層41典型而言由環氧系樹脂等熱固性樹脂材料構成，亦可視需要含有適當之填料。
其次，對外部端子12及連接端子22之配置形態進行說明。
圖3A、B表示第1電路基板10之外部端子12及焊墊部13之配置形 態之一例，A係自第2主面112觀察到之第1電路基板10之俯視圖，B係自第1主面111觀察到之第1電路基板10之俯視圖(後視圖)。
再者，於各圖中，外部端子12及焊墊部13(連接端子22)分別被描述為圓形，但實際形狀並不限定於此，亦可形成為矩形狀等。
複數個外部端子12係呈矩陣狀配置於第1主面111。外部端子12包含位於最外周之複數個端子群12A(第1端子群)、及較該等端子群12A位於更靠基板內方側(中央側)之複數個端子群12B。端子群12A係沿著基板本體11之周緣(4邊)呈直線狀排列。
另一方面，複數個焊墊部13係以與第2電路基板20之複數個連接端子22對應之方式，如圖3A、B所示般沿著基板本體11之周緣(4邊)以單行排列。複數個焊墊部13典型而言以較外部端子12窄之間距排列。焊墊部13之尺寸並無特別限定，可如圖所示般小於外部端子12，亦可與外部端子12相同。
於本實施形態中，複數個焊墊部13、即與其等對應之複數個連接端子22構成隔著基板本體11(於Z軸方向上)與複數個端子群12A對向之端子群(第2端子群)。
複數個連接端子22(焊墊部13)無需始終與構成端子群12A之所有外部端子12對向，只要以與構成端子群12A之至少一部分外部端子12對向之方式配置即可。於本實施形態中，複數個連接端子22係以與構成端子群12A之所有外部端子12對向之方式配置。並不限定於此，複數個連接端子22亦可以與構成端子群12A之複數個外部端子12中之位於基板本體11之3邊、或者對向之2邊之外部端子12對向之方式配置。
[電子裝置之作用]
以上述方式構成之本實施形態之電子裝置1係如圖2所示般，藉由相對於安裝基板30覆晶安裝，而構成零件安裝基板100。電子裝置1向安裝基板30之安裝典型而言係使用回焊爐。
於回焊爐中，藉由將電子裝置1及安裝基板30加熱至特定溫度，使塗佈於安裝基板30之焊盤部之預備焊料(省略圖示)及突起電極120之一部分再熔融，而將外部端子12接合於安裝基板30上。此時，因第1電路基板10之基板本體11、外部端子12(突起電極120)、連接端子22(突起電極220)、底部填充樹脂層41等之熱膨脹係數之差異，而導致如圖4中模式性地表示般於基板本體11產生應力。
此處，於位於第1電路基板10之兩主面111、112之周緣部的外部端子12及連接端子22之配置相互偏移之情形時，因自該等外部端子12及連接端子22之按壓位置之差異而導致於該周緣部附近產生較大之彎曲應力。該彎曲應力尤其使第1電路基板10之外周產生較大翹曲，由此存在如下情形：對電子裝置1之裝置特性造成不良影響，或產生與安裝基板30之接合不良。
相對於此，於本實施形態中，位於第1電路基板10之兩主面111、112之周緣部的外部端子12(端子群12A)及連接端子22係如上所述般以隔著基板本體11於Z軸方向上相互對向之方式配置。因此，外部端子12(端子群12A)及連接端子22之各者相對於基板本體11之按壓位置相互重合，其結果，基板本體11之外周部之彎曲應力受到緩和。即，以於基板本體11之上下來自各端子之按壓力均衡之方式取得應力之平衡，故第1電路基板10之外周部之彎曲應力降低，其結果，不易產生基板之變形。
如上所述，根據本實施形態，可不使第1電路基板10產生翹曲，而將電子裝置1安裝於安裝基板30。尤其是於第1電路基板10之厚度薄至例如100μm~150μm之情形時，可獲得顯著之效果。藉此，可確保電子裝置1之裝置特性，並且可對安裝基板30精確地進行安裝。又，能夠提供裝置特性及接合可靠性優異之零件安裝基板100或搭載有該零件安裝基板100之電子機器。
又，由於設置於外部端子12及連接端子22之突起電極120、220分別由同種焊料材料構成，故兩突起電極120、220之熱膨脹係數相互相同，藉此，可不依存於溫度變化量，而抑制第1電路基板10之翹曲。
進而，根據本實施形態，對於內置有零件安裝基板100之電子機器之溫度變化，亦能夠確保電子裝置1之所期望之可靠性。亦即，即便因電子機器內部之溫度變化而導致電子裝置1產生熱膨脹(或熱收縮)，亦能夠抑制因第1電路基板10之彎曲應力所致之翹曲之產生，故能夠防止電子裝置1之裝置特性之劣化等。
<第2實施形態>
圖5A、B係構成本技術之第2實施形態之電子裝置之第1電路基板10的俯視圖及後視圖。以下，主要對與第1實施形態不同之構成進行說明，關於與上述實施形態相同之構成，標註相同符號並省略或簡化其說明。
於電子裝置中，關於第1電路基板10之複數個外部端子12及第2電路基板20之複數個連接端子22，為了於各基板10、20間收發電性信號，必須確保某種程度之個數。又，不僅各端子12、22之個數根據設計或製程變更，而且尺寸或配置等亦根據設計或製程而變更。因此，存在於第1電路基板10之外周難以將位於其兩主面之端子之位置重疊之情形。於該情形時，藉由在第1電路基板10之其中一主面或兩主面配置實際上不進行電性連接之虛設焊墊，可使基板外周部之焊墊位置對向。
如圖5A、B所示，於本實施形態中，在第1主面101之四角，配置作為外部端子12之一部分之虛設端子12C，在第2主面102之四角，配置作為焊墊部13之一部分之虛設焊墊13C。虛設端子12C構成複數個外部端子12中之位於最外周之端子群12A(第1端子群)之一部分。
另一方面，於第2電路基板20之端子面211，連接於虛設焊墊13C之虛設端子22C作為連接端子22之一部分配置。虛設端子22C構成隔著基板本體11於Z軸方向上與上述端子群12A對向之端子群(第2端子群)之一部分。
藉此，於第1電路基板10之外周四角之位置，可將外部端子12及連接端子22相互重疊(使其等對向)。
將於不配置虛設端子12C、22C之情形時，根據溫度變化而施加至第1電路基板10之彎曲應力之面內分佈示於圖6A。顏色之濃淡表示彎曲應力之強弱。即，於位於第1電路基板10之四角之顏色較濃之部分，施加有較強之彎曲應力。另一方面，將於配置有虛設端子12C、22C之情形時，根據溫度變化而施加至第1電路基板10之彎曲應力之面內分佈示於圖6B。可知與圖6A相比，施加至第1電路基板10之四角之彎曲應力之強度下降。
如上所述，根據本實施形態，由於將相互對向之虛設端子12C、22C配置於第1電路基板10之四角，故可降低第1電路基板10之四角之彎曲應力。藉此，可有效地抑制第1電路基板10之翹曲。
典型而言，虛設端子12C係以與其他外部端子12(12A、12B)相同之材料、大小、形狀形成。虛設端子22C(焊墊部13C)亦同樣地，以與其他連接端子22(焊墊部13)相同之材料、大小、形狀形成。又，虛設端子12C、22C之位置或數量並不限定於上述例，亦可配置於其他任意之位置。於該情形時，亦無需配置虛設端子12C、22C之兩者，亦可配置其中任一者。
<第3實施形態>
圖7係本技術之第3實施形態中搭載有電子裝置之零件安裝基板300之概略剖視圖，圖8係上述電子裝置之主要部分之放大剖視圖。以下，主要對與第1實施形態不同之構成進行說明，對與上述實施形態 相同之構成，標註相同之符號並省略或簡化其說明。
存在如下情形：為了確保電子裝置1與安裝基板30之接合可靠性，而於電子裝置1與安裝基板30之接合部設置底部填充樹脂層42。於該情形時，由於多數情況下底部填充樹脂之熱膨脹係數大於外部端子12(突起電極120)之熱膨脹係數，故於低溫時底部填充樹脂強烈地收縮，相對地複數個外部端子12對第1電路基板10賦予較強之應力，此有誘發第1電路基板10之翹曲之虞。
因此，於本實施形態中，第1電路基板10進而具有設置於第1主面111與複數個外部端子12之間之樹脂膜14。如圖8所示般第1電路基板10於第1主面111形成再配線用之配線層15，該配線層15將焊墊部P、與配置於與該焊墊部P不同位置之外部端子12之間電性連接。樹脂膜14係形成於第1主面111與配線層15之間。再者，外部端子12(突起電極120)係設置於保護配線層15之保護膜16之開口部。
樹脂膜14係由較外部端子12更軟質之電性絕緣性樹脂材料構成。典型而言，樹脂膜14係由如聚醯亞胺等之低楊氏模數之材料構成。藉此，可緩和第1主面111自外部端子12受到之應力，故能夠抑制第1電路基板10之翹曲。
<第4實施形態>
圖9係本技術之第4實施形態中搭載有電子裝置之零件安裝基板400之概略剖視圖。以下，主要對與第1實施形態不同之構成進行說明，對與上述實施形態相同之構成，標註相同之符號並省略或簡化其說明。
於本實施形態之零件安裝基板400中，第1電路基板10係由具有積體電路17之半導體晶片構成。積體電路17典型而言形成於矽基板之表面。
於在基板上製作有IC之情形時，由於IC之電晶體之載子移動率 根據應力產生變化，故有當作用於基板之翹曲變大時裝置特性大幅變化之虞。
於本實施形態中，與上述第1實施形態同樣地，由於複數個外部端子12與連接端子22於第1電路基板10之周緣位置相互對向，故因溫度變化所致而作用於第1電路基板10之彎曲應力緩和。藉此，第1電路基板10之翹曲被抑制，故能夠抑制構成積體電路17之電晶體等之裝置特性之變化。積體電路17可如圖示般形成於供配置外部端子12之面(第1主面)，亦可形成於供配置連接端子22之面(第2主面)。
<第5實施形態>
圖10係本技術之第5實施形態中搭載有電子裝置之零件安裝基板500之概略剖視圖。以下，主要對與第1實施形態不同之構成進行說明，對與上述實施形態相同之構成，標註相同之符號並省略或簡化其說明。
於本實施形態之零件安裝基板500中，具有形成於第2電路基板20之上表面之框狀之補強部23。補強部23係沿著第2電路基板20之周緣而形成。藉此，對第2電路基板20之彎曲應力之剛性提高，不僅能夠抑制第1電路基板10之翹曲，而且能夠抑制第2電路基板20之翹曲。
補強部23典型而言亦可藉由將構成第2電路基板20之SOI基板之活化層加工成特定形狀而形成。於上述活化層設置致動器部或感測器部等MEMS機構部，補強部23可構成為支持該MEMS機構部之框架部。
<第6實施形態>
圖11係本技術之第6實施形態中搭載有電子裝置2之零件安裝基板600之概略剖視圖，圖12係構成電子裝置2之第1電路基板10之俯視圖。以下，主要對與第1實施形態不同之構成進行說明，對與上述實施形態相同之構成，標註相同之符號並省略或簡化其說明。
於本實施形態之零件安裝基板600中，電子裝置2係由複數個電路基板構成第2電路基板，於本實施形態中，由2個電路基板201、202構成第2電路基板。該等2個電路基板201、202係相互鄰接地積層於第1電路基板10上(第2主面)。
於第2電路基板201、202各自之端子面，分別配置有與第1電路基板10上之複數個焊墊部13連接之複數個連接端子221、222。複數個連接端子221、222係沿著各電路基板201、202之周圍分別以單行排列。各個連接端子221、222之一部分係如圖12所示般，構成與複數個外部端子12中之位於最外周之端子群12A之一部分對向之端子群(第2端子群)。再者，連接端子221、222之剩餘之一部分係分別以與較端子群12A位於更靠內方側之端子群12B之一部分對向之方式配置。
於以上述方式構成之本實施形態之電子裝置2及零件安裝基板600中，各電路基板201、202之連接端子221、222係以與位於最外周之外部端子12相互對向之方式配置。因此，與第1實施形態同樣地，緩和因溫度變化所致而作用於第1電路基板10之彎曲應力，藉此能夠抑制第1電路基板10之翹曲。
以上，對本技術之實施形態進行了說明，但本技術並非僅限定於上述實施形態者，當然可添加各種變更。
例如，於以上之各實施形態中，作為電子裝置，列舉2個電路基板之積層構造為例進行了說明，但本技術亦能夠應用於積層3個以上之電路基板(例如IC晶片)而成之堆疊構造之電子裝置。
又，上述各實施形態並不限定於各自單獨地實施之情形，亦可同時實施複數個實施形態。例如，第2實施形態中所說明之虛設端子亦能夠同樣地應用於其他實施形態。
再者，本技術亦可採用如下構成。
(1)一種電子裝置，其包括： 第1電路基板，其具有第1主面、第2主面、及複數個外部端子，該等複數個外部端子包含位於最外周之第1端子群，且呈矩陣狀配置於上述第1主面；及第2電路基板，其具有與上述第2主面對向之端子面、及複數個連接端子，該等複數個連接端子係配置於上述端子面，包含與上述第1端子群之至少一部分對向之第2端子群，且電性連接於上述第2主面。
(2)如上述(1)之電子裝置，其中上述第1端子群及上述第2端子群中之至少一端子群之一部分為虛設端子。
(3)如上述(2)之電子裝置，其中上述第1電路基板之形狀為矩形，上述虛設端子係配置於上述第1主面及上述第2主面中之至少一主面之四角。
(4)如上述(1)至(4)中任一項之電子裝置，其中上述第1電路基板包含半導體基板。
(5)如上述(4)之電子裝置，其中上述半導體基板包含積體電路。
(6)如上述(1)至(5)中任一項之電子裝置，其進而包括形成於上述第2主面與上述端子面之間之底部填充樹脂層。
(7)如上述(1)至(6)中任一項之電子裝置，其中上述第1電路基板進而具有絕緣性樹脂膜，該絕緣性樹脂膜係配置於上述第1主面與上述複數個外部端子之間，且較上述複數個外部端子更軟質。
(8)如上述(1)至(7)中任一項之電子裝置，其中 上述複數個連接端子各自包含含有第1接合材料構成之突起電極，上述複數個外部端子分別各自含有與上述第1接合材料相同之第2接合材料構成之突起電極。
(9)如上述(1)至(8)中任一項之電子裝置，其中上述第2電路基板具有各自包含上述複數個連接端子之複數個基板。
(10)如上述(1)至(9)中任一項之電子裝置，其中上述第2電路基板係具有感測器部之基板。
(11)一種零件安裝基板，其包括：第1電路基板，其具有第1主面、第2主面、及複數個外部端子，該等複數個外部端子包含位於最外周之第1端子群，且呈矩陣狀配置於上述第1主面；第2電路基板，其具有與上述第2主面對向之端子面、及複數個連接端子，該等複數個連接端子係配置於上述端子面，包含與上述第1端子群之至少一部分對向之第2端子群，且電性連接於上述第2主面；及第3基板，其係與上述第1主面對向地配置，且電性連接於上述複數個外部端子。
(12)一種電子機器，其包括：第1電路基板，其具有第1主面、第2主面、及複數個外部端子，該等複數個外部端子包含位於最外周之第1端子群，且呈矩陣狀配置於上述第1主面；第2電路基板，其具有與上述第2主面對向之端子面、及複數個連接端子，該等複數個連接端子係配置於上述端子面，包含與上述第1端子群之至少一部分對向之第2端子群，且電性連接於上述第2主 面；及第3基板，其係與上述第1主面對向地配置，且電性連接於上述複數個外部端子。
1‧‧‧電子裝置
10‧‧‧第1電路基板
12‧‧‧外部端子
20‧‧‧第2電路基板
22‧‧‧連接端子
30‧‧‧安裝基板
41‧‧‧底部填充樹脂層
42‧‧‧底部填充樹脂層
100‧‧‧零件安裝基板
120‧‧‧突起電極
220‧‧‧突起電極
X‧‧‧軸
Y‧‧‧軸
Z‧‧‧軸

Claims (12)

  1. 一種電子裝置，其包括：第1電路基板，其具有第1主面、第2主面、及包含位於最外周之第1端子群且呈矩陣狀配置於上述第1主面之複數個外部端子；及第2電路基板，其具有與上述第2主面對向之端子面、及複數個連接端子，該等複數個連接端子係配置於上述端子面，包含與上述第1端子群之至少一部分對向之第2端子群，且電性連接於上述第2主面。
  2. 如請求項1之電子裝置，其中上述第1端子群及上述第2端子群中之至少一端子群之一部分為虛設端子。
  3. 如請求項2之電子裝置，其中上述第1電路基板之形狀為矩形，上述虛設端子係配置於上述第1主面及上述第2主面中之至少一主面之四角。
  4. 如請求項1之電子裝置，其中上述第1電路基板包含半導體基板。
  5. 如請求項4之電子裝置，其中上述半導體基板包含積體電路。
  6. 如請求項1之電子裝置，其中進而包括形成於上述第2主面與上述端子面之間的底部填充樹脂層。
  7. 如請求項1之電子裝置，其中上述第1電路基板進而具有絕緣性樹脂膜，該絕緣性樹脂膜係 配置於上述第1主面與上述複數個外部端子之間，且較上述複數個外部端子更為軟質。
  8. 如請求項1之電子裝置，其中上述複數個連接端子各自包含含有第1接合材料構成之突起電極，上述複數個外部端子各自包含含有與上述第1接合材料相同之第2接合材料構成之突起電極。
  9. 如請求項1之電子裝置，其中上述第2電路基板具有各自包含上述複數個連接端子之複數個基板。
  10. 如請求項1之電子裝置，其中上述第2電路基板係具有感測器部之基板。
  11. 一種零件安裝基板，其包括：第1電路基板，其具有第1主面、第2主面、及包含位於最外周之第1端子群且呈矩陣狀配置於上述第1主面之複數個外部端子；第2電路基板；其具有與上述第2主面對向之端子面、及複數個連接端子，該等複數個連接端子係配置於上述端子面，包含與上述第1端子群之至少一部分對向之第2端子群，且電性連接於上述第2主面；及第3基板，其係與上述第1主面對向地配置，且電性連接於上述複數個外部端子。
  12. 一種電子機器，其包括：第1電路基板，其具有第1主面、第2主面、及包含位於最外周之第1端子群且呈矩陣狀配置於上述第1主面之複數個外部端子； 第2電路基板；其具有與上述第2主面對向之端子面、及複數個連接端子，該等複數個連接端子係配置於上述端子面，包含與上述第1端子群之至少一部分對向之第2端子群，且電性連接於上述第2主面；及第3基板，其係與上述第1主面對向地配置，且電性連接於上述複數個外部端子。
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