TW201536132A - 壓著頭、使用其之安裝裝置及安裝方法 - Google Patents

壓著頭、使用其之安裝裝置及安裝方法 Download PDF

Info

Publication number
TW201536132A
TW201536132A TW104107069A TW104107069A TW201536132A TW 201536132 A TW201536132 A TW 201536132A TW 104107069 A TW104107069 A TW 104107069A TW 104107069 A TW104107069 A TW 104107069A TW 201536132 A TW201536132 A TW 201536132A
Authority
TW
Taiwan
Prior art keywords
pressing
head
substrate
electronic component
elastic
Prior art date
Application number
TW104107069A
Other languages
English (en)
Other versions
TWI654912B (zh
Inventor
Noboru Asahi
Yoshinori Miyamoto
Toshifumi Takegami
Masatsugu Nimura
Original Assignee
Toray Industries
Toray Eng Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toray Industries, Toray Eng Co Ltd filed Critical Toray Industries
Publication of TW201536132A publication Critical patent/TW201536132A/zh
Application granted granted Critical
Publication of TWI654912B publication Critical patent/TWI654912B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75Apparatus for connecting with bump connectors or layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525Means for applying energy, e.g. heating means
    • H01L2224/753Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/75301Bonding head
    • H01L2224/75314Auxiliary members on the pressing surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525Means for applying energy, e.g. heating means
    • H01L2224/753Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/75301Bonding head
    • H01L2224/75314Auxiliary members on the pressing surface
    • H01L2224/75315Elastomer inlay
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525Means for applying energy, e.g. heating means
    • H01L2224/753Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/75301Bonding head
    • H01L2224/75314Auxiliary members on the pressing surface
    • H01L2224/75315Elastomer inlay
    • H01L2224/75316Elastomer inlay with retaining mechanisms
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7598Apparatus for connecting with bump connectors or layer connectors specially adapted for batch processes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119Arrangement of the bump connectors prior to mounting
    • H01L2224/81191Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818Bonding techniques
    • H01L2224/81801Soldering or alloying
    • H01L2224/81815Reflow soldering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83192Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855Hardening the adhesive by curing, i.e. thermosetting
    • H01L2224/83862Heat curing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/921Connecting a surface with connectors of different types
    • H01L2224/9211Parallel connecting processes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • H01L24/92Specific sequence of method steps

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

本發明係將來自壓著頭之熱有效地傳遞至電子零件側,且可吸收複數個電子零件之高度不均而以適當之按壓進行安裝。具體而言,本發明包含壓著頭14、使壓著頭14昇降之缸體13、及載置暨保持基板之保持台10;其中壓著頭14包含:頭本體16;按壓構件17,其按壓安裝於頭本體16之下部之電子零件;及彈性構件19,其係介置於頭本體16與按壓構件17之間,以隔開特定間隔分割之複數個面抵接於頭本體16與按壓構件17之至少一者之面。

Description

壓著頭、使用其之安裝裝置及安裝方法
本發明係關於一種壓著頭、使用其之安裝裝置及安裝方法,該壓著頭係用以將IC、LSI等半導體裝置或其他電子零件接著、直接電性接合或以積層狀態直接安裝於可撓性基板、環氧玻璃基板、玻璃基板、陶瓷基板、矽中介層(Silicon Interposer)、矽基板等電路基板。
伴隨著以半導體裝置為首之電子零件之小型化與高密度化,作為將電子零件安裝於電路基板之方法,覆晶安裝、進而藉由貫通電子零件之貫通電極而以三維積層之三維積層安裝正急速發展。因此,確保安裝之接合之可靠性愈發重要。例如,作為用以確保半導體晶片之接合部分之連接可靠性之方法,普遍採用如下方法:於接合形成於半導體晶片上之凸塊與電路基板之電極焊墊後,於半導體晶片與電路基板之間隙注入液狀密封接著劑而使其硬化。
又,近年來,提出一種將預先形成有接著劑之附凸塊之半導體晶片或基板覆晶連接,而同時進行電性接合與樹脂密封之方法。例如,於自下模向上經彈性施力而自該下模隔開之基板保持板上,介隔絕緣接著劑而載置臨時安裝有半導體裝置之基板,並使內置加熱器之上模朝該基板接近對向。於該狀態下,藉由來自上模之輻射熱將基板預熱後,使該上模下降而一面按壓及加熱半導體裝置,一面將其固著於基板(參照專利文獻1)。
又,另一先前技術之構成為:藉由1個加熱加壓頭將複數個半導 體晶片同時壓著於基板時,吸收半導體晶片之高度不均,而對所有半導體晶片均勻地使按壓作用。具體而言,於加熱加壓頭形成有收納同時按壓複數個半導體晶片之複數個加熱加壓工具的空腔,於該空腔之基端側插入彈性體,而於加壓加熱頭內彈性支持加熱加壓工具(參照專利文獻2)。
[先前技術文獻] [專利文獻]
專利文獻1:日本特開2011-159847號公報
專利文獻2:日本特開2010-34423號公報
然而,介置於加熱加壓頭與加熱加壓工具之間之彈性體會因考慮到用以吸收半導體晶片之高度不均之彈性變形而形成之厚度,而阻礙向半導體晶片之熱傳遞。其結果,產生導致熱傳遞之延遲及熱損之不佳狀況。此種不佳狀況並非限於半導體晶片,亦會產生於其他電子零件之安裝中。該情形時,如提高加熱機之溫度或使用焊料凸塊,會產生於焊料熔融前接著劑即硬化而導致連接不良之不佳狀況。
本發明係鑑於此種狀況而完成者,其主要目的在於提供一種壓著頭、使用其之安裝裝置及安裝方法,該壓著頭可對電子零件作用適當之按壓以吸收電子零件之高度不均,從而防止破損,且加快向電子零件之傳熱而進行電子零件之凸塊與基板電極之確實之連接,並於短時間內進行熱傳導。
為了達成此種目的,本發明係採用如下構成。
即,一種壓著頭,其特徵在於:其係將電子零件安裝於基板者,且包含: 頭本體;按壓構件,其係安裝於上述頭本體之下部且按壓電子零件;及彈性構件,其係介置於上述頭本體與按壓構件之間,以隔開特定間隔而被分割之複數個面抵接於頭本體與按壓構件之至少一者之面。
(作用/效果)根據該構成,介置於壓著頭與按壓構件之間之彈性構件係藉由小面積之分割部分而抵接於按壓構件或壓著頭之至少一者。因此,當壓著時之按壓作用於該按壓構件時,分割部位之各者一面向鄰接之分割部位彼此之間所形成之空間擴大面積,一面以大致放射狀作彈性變形。即,可使以較按壓構件小面積地抵接之彈性構件一面於與按壓力正交之方向有效地擴大面積,一面作彈性變形。因此,即便使彈性構件之厚度較薄,亦可提高藉由彈性變形之緩衝性。
又,伴隨著彈性構件之薄化,可將來自壓著頭之熱有效地傳遞至按壓構件。因此,可防止對電子零件過度之按壓所引起之破損,且將對頭本體進行加熱時之熱於短時間內確實地傳遞至電子零件側。
另,於上述構成中,壓著頭亦可包含例如同時按壓複數個電子零件之複數個按壓構件;且就每個按壓構件介置具有複數個面之彈性構件。
作為該構成之一實施形態,彈性構件亦可由1片彈性片材之單面上具有被分割成複數個之凸面之彈性片材構成。
作為另一實施形態,彈性構件亦可於頭本體與按壓構件之間將複數個彈性構件隔開特定間隔排列配置而構成。
再者,亦可為包含埋設於頭本體之加熱器之構成。
根據上述構成,可將複數個電子零件全體同時且均等地加熱壓著於基板上。
又,為了達成此種目的,本發明係採用如下構成。
即,一種安裝裝置,其特徵在於:其係將電子零件安裝於基板者,且包含:如上述中任一項之壓著頭;昇降機構,其係使上述壓著頭昇降;及保持台,其載置暨保持上述基板。
(作用/效果)根據該構成,可防止於載置暨保持於保持台上之基板安裝電子零件時,因過度之按壓而引起之破損,且使基板與電子零件之界面於短時間內確實地昇溫。
另,對於上述構成,電子零件可為具有凸塊之半導體裝置,且介隔熱硬化性樹脂而安裝於基板者。該情形時,可連接半導體裝置之凸塊與基板之電極,且使介置於半導體裝置與基板之間之熱硬化性樹脂於短時間內熱硬化。
又,為了達成此種目的,本發明係採用如下構成。
一種安裝方法,其特徵在於:其係安裝電子零件者,且於藉由上述壓著頭一面將電子零件加壓於基板上並進行加熱,一面將其安裝於基板之過程中,於構成上述壓著頭之頭本體與按壓構件之間隔開特定間隔具有彈性構件,該彈性構件在頭本體與按壓構件之至少任一側之面被分割,且一面使上述彈性構件於厚度方向變形,一面使彈性構件向鄰接之彈性構件彼此之間隙變位。
(作用/效果)根據該方法,複數個彈性構件一面向鄰接之分割部位彼此之間所形成之空間擴大面積,一面以放射狀彈性變形。即,可使以較按壓構件小面積地抵接之彈性構件於與按壓力正交之方向有效地彈性變形。因此,即便使彈性構件之厚度較薄,亦可提高藉由彈性變形之緩衝性。
又,伴隨著彈性構件之薄化,可將來自壓著頭之熱有效地傳遞 至按壓構件。因此,可吸收電子零件之高度不均,而防止過度之按壓所引起之破損,且將對頭本體進行加熱時之熱於短時間內確實地傳遞至電子零件側。
根據本發明之壓著頭、使用其之安裝裝置及安裝方法,可在不使電子零件破損的情況下,吸收高度不均,同時加快向電子零件之傳熱而進行電子零件之凸塊與基板電極之確實之連接,而可實現使介置於該電子零件與基板之間之熱硬化性樹脂於短時間內熱硬化之正式壓著。
1‧‧‧搬送機構
2‧‧‧正式壓著裝置
3‧‧‧可動台
4‧‧‧搬送臂
5‧‧‧導軌
6‧‧‧保持框架
7‧‧‧扣止爪
8‧‧‧可動平台
9‧‧‧按壓機構
10‧‧‧保持台
11‧‧‧加熱器
13‧‧‧缸體
14‧‧‧壓著頭
15‧‧‧加熱器
16‧‧‧頭本體
17‧‧‧按壓構件
18‧‧‧支持架
19‧‧‧彈性構件
20‧‧‧槽
21‧‧‧分割部位
23‧‧‧控制部
24‧‧‧操作部
B‧‧‧凸塊
C‧‧‧半導體裝置
G‧‧‧熱硬化性樹脂
P‧‧‧熱傳遞延遲用之板
S1~S9‧‧‧步驟
W‧‧‧基板
X‧‧‧方向
Y‧‧‧方向
Z‧‧‧方向
θ‧‧‧方向
圖1係顯示構成安裝裝置之正式壓著裝置之概略整體構成之立體圖。
圖2係搬送機構之俯視圖。
圖3係搬送機構之前視圖。
圖4係壓著頭之縱剖面圖。
圖5係壓著頭之立體圖。
圖6係按壓構件與彈性構件之立體圖。
圖7係顯示實施例裝置之一連串動作之流程圖。
圖8係顯示板及基板之搬送動作之前視圖。
圖9係顯示於基板正式壓著半導體裝置之動作之圖。
圖10係顯示於基板正式壓著半導體裝置之動作之圖。
圖11係變化例裝置之立體圖。
以下,參照圖式說明本發明之一實施例。
於本實施例中,採用使用NCP(Non-Conductive Paste:非導電膏)、NCF(Non-Conductive Film:非導電膜)等作為熱硬化性樹脂,而將作為電子零件之半導體裝置安裝於基板之情形為例進行說明。又, 於本發明之安裝方法中,熱硬化性樹脂較佳為NCF(非導電性接著劑薄膜)。
另,作為本發明之「半導體裝置」,例如為IC晶片、半導體晶片、光元件、表面安裝零件、晶片、晶圓、TCP(Tape Carrier Package:捲帶式封裝)、FPC(Flexible Printed Circuit:可撓性印刷電路板)等具有凸塊者。又,該等半導體裝置無關於其種類或大小,係表示與基板接合之側之所有形態,使用例如對平面顯示面板之晶片接合即COG(Chip On Glass:玻璃覆晶)、TCP、及FPC之接合即OLB(Outer Lead Bonding:外引腳接合)等。
又,本發明之所謂「基板」係使用例如可撓性基板、環氧玻璃基板、玻璃基板、陶瓷基板、矽中介層、矽基板等。
首先,參照圖式對本實施例所使用之裝置進行具體說明。圖1係顯示構成本發明安裝裝置之正式壓著裝置之概略構成的立體圖,圖2係顯示搬送機構之要部構成之俯視圖。
如圖1及圖2所示,本發明之安裝裝置包含搬送機構1及正式壓著裝置2。以下,對各構成進行詳細敘述。
搬送機構1具備可動台3及搬送臂4。可動台3係以沿著導軌5於水平軸方向可移動之方式構成。
搬送臂4係將基端側連結於可動台3之昇降驅動機構,以於上下(Z)方向、及繞Z軸(θ)方向分別移動自如地構成。又,搬送臂4係於前端具備保持框架6。如圖2及圖3所示,保持框架6係形成為馬蹄形,於角部具備扣止熱傳導延遲用板及基板W之複數個扣止爪7。
正式壓著裝置2包含可動平台8及按壓機構9等。
可動平台8具備吸附保持基板W之保持台10。保持台10係以於水平2軸(X,Y)方向、上下(Z)方向、及繞Z軸(θ)方向分別移動自如地構成。另,保持台10之外形係設定為可收納於保持框架6之內側之尺 寸。又,保持台10係於內部埋設有加熱具11。
按壓機構9包含缸體13及壓著頭14等。即,構成為:於壓著頭14之上方連結有缸體13,使壓著頭14於上下移動。
如圖4所示,壓著頭14具備:頭本體16,其係埋設有加熱具15;及支持架18,其係於該頭本體16之下部收納有複數條按壓構件17。另,加熱具15相當於本發明之加熱器。
按壓構件17係形成為向下凸形狀。其前端具有與半導體裝置C大致相同尺寸之抵接面,且以分別按壓配置於基板W之複數個半導體裝置C之方式進行對位。另,按壓構件17係以使前端通過形成於支持架18且略大於該凸部之貫通孔,而使基端側由支持架18支持之方式構成。藉由螺固支持架18,可使按壓構件17之基端側由支持架18與頭本體16固持。
再者,壓著頭14係於頭本體16與按壓構件17之間具備彈性構件19。如圖5及圖6所示,彈性構件19係於按壓構件17之基端之面積以下之1片片材形成格子狀之槽20而構成。藉由該槽20於片材面形成複數個凸狀之分割部位21。藉由適當變更槽20之寬度及深度,於被壓縮時,可調整分割部位21之厚度方向之變位量。即,隨著厚度因壓縮而變薄,分割部位之面積於與該按壓方向正交之水平方向上以放射狀擴大變位。即,可藉由槽20確保可擴大分割部位21之面積之空間。
作為彈性構件,雖可使用普通橡膠,但尤其自加熱之觀點而言,較佳為使用耐熱性之氟橡膠。又,彈性構件之彈性率較佳為70~90。若彈性率較小,則向橫向之剛性變小,而容易產生位置偏移。又,若彈性率過大,則由於彈性效果變小,故而無法使膜厚較薄。
控制部23係以使壓著頭14之加熱具15及保持台10之加熱具11之溫度成為與使熱硬化性樹脂G硬化之溫度同等或其以上之溫度之方式進 行控制。
接著,一面參照圖7所示之流程圖及圖8至圖10,一面對使用上述實施例裝置將半導體裝置C正式壓著於該基板W之一連串動作進行說明。另,於本實施例中,係採用對已於在先步驟之臨時壓著步驟中藉由NCF將複數個半導體裝置C預先臨時壓著於基板W之狀態搬送而來者,使熱硬化性樹脂完全硬化而進行正式壓著之情形為例進行說明。
首先,操作操作部24而設定保持台10及壓著頭14所具備之兩個加熱具11、15之溫度。此處,兩個加熱具11、15之溫度係設定為熱傳導延遲用之板P與基板W之界面及壓著頭14與半導體裝置C之界面之溫度高於熱硬化性樹脂G之硬化溫度。即,如下述般進行設定:於吸附保持於保持台10之基板W到達壓著頭14之下側之安裝位置之時點,經由半導體裝置C及板P而傳遞至熱硬化性樹脂G之熱成為硬化溫度(步驟S1)。
又,於本實施例中,對板P使用不鏽鋼。此處,板P係例如設定為熱傳係數(W/m.K)L與板之厚度(mm)T之關係、即L/T成為1以上且20以下。另,板P並非限定於不鏽鋼,只要為不致因壓著頭14之按壓而變形之材質即可,亦可為金屬、陶瓷、碳及多孔質材等。
當完成初始設定,則使裝置作動(步驟S2)。於正式壓著裝置側,控制部23接通加熱具11、15而以將初始設定之溫度保持為一定之方式開始溫度控制。
如圖3所示,藉由配備於臨時壓著步驟側之未圖示之搬送機器人,將板P載置於搬送機構1之保持框架6,其後將基板W載置於該板P上(步驟S3)。
以板P與基板W疊合之狀態,向正式壓著裝置2搬送。使該板P位於下側而將基板W如圖8之二點鏈線所示,移載至保持台10。於板P形 成有複數個貫通孔,經由貫通孔將其吸附保持於保持台10(步驟S4)。又,保持台10係藉由未圖示之驅動機構,向前方(圖1之Y方向)即壓著頭14下方之預先決定之安裝位置移動。
自板P及基板W被吸附保持於保持台10之時點利用加熱具11開始加熱(步驟S5)。
當保持台10到達安裝位置時,如圖9所示,藉由缸體13之作動,壓著頭14下降,同時夾住複數個半導體裝置C。此時,藉由已經加熱之壓著頭14,對半導體裝置C一面加熱一面按壓(步驟S6)。
即,壓著頭14下降至特定高度時,由於熱硬化性樹脂G處於未硬化之狀態,故如圖10所示,藉由壓著頭14之加壓將半導體裝置C之凸塊B壓入至熱硬化性樹脂G。即,於半導體裝置C之凸塊B到達基板W之電極後,熱硬化性樹脂硬化。另,於對半導體裝置之凸塊使用焊料之情形時,以於接著劑完全硬化前熔融焊料之方式控制加熱器之溫度。
又,凸塊B到達基板W而進行按壓時,彈性構件19被壓縮。此時,各分割部位21向槽20擴大面積。
當對半導體裝置C加壓及加熱直至達到熱硬化性樹脂G硬化之特定時間時(步驟S7),係使壓著頭14返回至上方之待機位置而解除加壓,且藉由搬送機構1搬出板P與基板W(步驟S8)。
將板P與基板W搬送至特定位置之後,交接至其他搬送機器人或收納於倉儲櫃。
以上,結束1片基板W上之半導體裝置之安裝。其後,對特定片數之基板反復進行相同動作。
根據該構成,由於頭本體16與按壓構件17之間所具備之彈性構件19之各個分割部位21隨著壓縮而一面往槽方向以放射狀擴大面積,一面作彈性變形,故即便為與先前之1片平坦之片材相同之厚度,亦 可使壓縮時之變位量較先前之片材更大。因此,即便使片材整體之厚度較薄,亦可獲得與先前之片材同等以上之變位量。其結果,由於彈性構件19之厚度變薄,故可將埋設於頭本體16之加熱具11之熱有效地傳遞至按壓構件17,故而可於短時間內確實地使熱硬化性樹脂G熱硬化。
本發明並非限於上述實施例者,亦可如下述般實施變形。
(1)於上述實施例裝置中,彈性構件19並非限定於上述實施例,亦可例如為以下所述般構成。
例如,亦可將面積小於按壓構件17之基端面之彈性構件19隔開特定間隔而以二維陣列狀排列配備。另,於該等各實施例中,分割部位21之形狀並非限定於矩形,只要為能夠以放射狀均等變位之形狀即可,例如亦可為圓形或六角形狀等。
(2)上述實施例裝置之壓著頭14亦可利用於對1個半導體裝置C進行正式壓著之單一型式,或如圖11所示,具備複數個該單一型式之多重型式。
(3)於上述實施例裝置中,壓著頭14之加熱具15雖採用埋設於頭本體16之構成,但亦可為自頭本體16之外部加熱之構成。又,於上述實施例中,雖對加熱器加熱至高溫,但亦可使用於步驟中令溫度變化之脈衝加熱器,亦可不介隔熱傳導延遲用之板而進行安裝。
另,於上述實施例中,雖已例示將具有凸塊之複數個半導體裝置介隔熱硬化性樹脂而安裝於基板之例,但若為必須對半導體裝置作用適當之按壓以吸收高度不均之安裝,則亦可有效應用本發明。例如,本發明亦可應用於無須介置熱硬化性樹脂之覆晶安裝、或將半導體晶片之非電極面介隔熱硬化性樹脂而安裝於基板之晶片接合等。再者,於將半導體裝置以外之電子零件(電阻器、電容器、壓電元件等)安裝於基板時,亦可使用本發明。
14‧‧‧壓著頭
15‧‧‧加熱器
16‧‧‧頭本體
17‧‧‧按壓構件
18‧‧‧支持架
19‧‧‧彈性構件

Claims (8)

  1. 一種壓著頭,其特徵在於:其係將電子零件安裝於基板者,且包含:頭本體;按壓構件,其係安裝於上述頭本體之下部且按壓電子零件;及彈性構件,其係介置於上述頭本體與按壓構件之間,以隔開特定間隔而被分割之複數個面抵接於頭本體與按壓構件之至少一者之面。
  2. 如請求項1之壓著頭,其中包含同時按壓複數個半導體裝置之複數個按壓構件;且就每個上述按壓構件介置具有複數個面之彈性構件。
  3. 如請求項2之壓著頭,其中上述彈性構件係於1片彈性片材之單面上具有被分割成複數個之凸面之彈性片材。
  4. 如請求項1至3中任一項之壓著頭,其中上述彈性構件係於頭本體與按壓構件之間將複數個彈性構件隔開特定間隔而排列配置。
  5. 如請求項1至4中任一項之壓著頭,其中包含埋設於上述頭本體之加熱器。
  6. 一種安裝裝置,其特徵在於:其係將電子零件安裝於基板者,且包含:如請求項1至5中任一項之壓著頭;昇降機構,其係使上述壓著頭昇降;及保持台,其載置暨保持上述基板。
  7. 如請求項6之安裝裝置,其中上述電子零件為具有凸塊之半導體裝置,且介隔熱硬化性樹脂而安裝於上述基板。
  8. 一種安裝方法,其特徵在於:其係將電子零件安裝於基板者,且於藉由壓著頭一面將電子零件加壓於基板上並進行加熱,一面將其安裝於基板之過程中,於構成上述壓著頭之頭本體與按壓構件之間隔開特定間隔具有彈性構件,該彈性構件在頭本體與按壓構件之至少任一側之面被分割;且一面使上述彈性構件於厚度方向變形,一面使彈性構件向鄰接之彈性構件彼此之間隙變位。
TW104107069A 2014-03-05 2015-03-05 Clamping head, mounting device and mounting method using same TWI654912B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2014-042750 2014-03-05
JP2014042750A JP6234277B2 (ja) 2014-03-05 2014-03-05 圧着ヘッド、それを用いた実装装置および実装方法

Publications (2)

Publication Number Publication Date
TW201536132A true TW201536132A (zh) 2015-09-16
TWI654912B TWI654912B (zh) 2019-03-21

Family

ID=54055252

Family Applications (1)

Application Number Title Priority Date Filing Date
TW104107069A TWI654912B (zh) 2014-03-05 2015-03-05 Clamping head, mounting device and mounting method using same

Country Status (4)

Country Link
JP (1) JP6234277B2 (zh)
KR (1) KR20160127807A (zh)
TW (1) TWI654912B (zh)
WO (1) WO2015133446A1 (zh)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6663805B2 (ja) 2016-06-28 2020-03-13 東レエンジニアリング株式会社 実装装置および実装方法
TWI673805B (zh) * 2017-01-30 2019-10-01 日商新川股份有限公司 安裝裝置以及安裝系統
JP2019050341A (ja) * 2017-09-12 2019-03-28 東レエンジニアリング株式会社 圧着ヘッドおよび実装装置
JP7181013B2 (ja) * 2018-06-20 2022-11-30 Juki株式会社 電子部品実装装置及び電子部品実装方法
JP2020080383A (ja) * 2018-11-13 2020-05-28 株式会社ブイ・テクノロジー 表示装置の製造方法及び製造装置
US11482505B2 (en) 2019-03-29 2022-10-25 Samsung Electronics Co., Ltd. Chip bonding apparatus

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0786336A (ja) * 1993-09-10 1995-03-31 Fujitsu Ltd ボンディング装置
JP2007294607A (ja) * 2006-04-24 2007-11-08 Sony Chemical & Information Device Corp 押圧ヘッド及び押圧装置
JP2010034423A (ja) * 2008-07-30 2010-02-12 Fujitsu Ltd 加圧加熱装置及び方法
JP2011009357A (ja) * 2009-06-24 2011-01-13 Fujitsu Ltd 実装装置
JP5401709B2 (ja) 2010-02-02 2014-01-29 アピックヤマダ株式会社 半導体装置の接合装置及び接合方法

Also Published As

Publication number Publication date
KR20160127807A (ko) 2016-11-04
JP6234277B2 (ja) 2017-11-22
WO2015133446A1 (ja) 2015-09-11
JP2015170646A (ja) 2015-09-28
TWI654912B (zh) 2019-03-21

Similar Documents

Publication Publication Date Title
TWI654912B (zh) Clamping head, mounting device and mounting method using same
JP4781802B2 (ja) サポートプレートの貼り合わせ手段及び貼り合わせ装置、並びにサポートプレートの貼り合わせ方法
CN109103117B (zh) 结合半导体芯片的设备和结合半导体芯片的方法
US20100024667A1 (en) Pressure-heating apparatus and method
KR20120109963A (ko) 접합장치 및 접합방법
TWI644370B (zh) 半導體安裝設備、半導體安裝設備頭、及用於製造層疊式晶片之方法
TW201705323A (zh) 安裝裝置及安裝方法
JP2015084388A (ja) 搭載部品収納治具、マルチ部品実装装置およびマルチ部品実装方法
KR102004606B1 (ko) 전자 부품 실장 장치
JP2011159847A (ja) 半導体装置の接合装置及び接合方法
KR20200051608A (ko) 압착 헤드 및 실장 장치
CN111344849B (zh) 封装装置
JP2005252072A (ja) 素子の実装方法及び搬送装置
JP6461822B2 (ja) 半導体装置の実装方法および実装装置
JP6752722B2 (ja) 実装装置および実装方法
JP3872763B2 (ja) ボンディング方法
KR102284943B1 (ko) 본딩 장치 및 본딩 방법
JP7023700B2 (ja) 実装装置及び実装方法
KR101263340B1 (ko) 구동용 회로기판의 본딩장치
JP2006135019A (ja) 電子部品実装方法及び装置

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees