JP2005252072A - 素子の実装方法及び搬送装置 - Google Patents

素子の実装方法及び搬送装置 Download PDF

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JP2005252072A
JP2005252072A JP2004062245A JP2004062245A JP2005252072A JP 2005252072 A JP2005252072 A JP 2005252072A JP 2004062245 A JP2004062245 A JP 2004062245A JP 2004062245 A JP2004062245 A JP 2004062245A JP 2005252072 A JP2005252072 A JP 2005252072A
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Prior art keywords
transfer substrate
semiconductor chip
circuit board
dicing sheet
mounting method
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JP2004062245A
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English (en)
Inventor
Kazuhiko Suzuki
和彦 鈴木
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Seiko Epson Corp
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Seiko Epson Corp
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Priority to JP2004062245A priority Critical patent/JP2005252072A/ja
Priority to US11/054,413 priority patent/US20050196901A1/en
Priority to CN2005100525532A priority patent/CN1665004A/zh
Publication of JP2005252072A publication Critical patent/JP2005252072A/ja
Pending legal-status Critical Current

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Abstract

【課題】 素子を回路基板上に容易に実装する。
【解決手段】 ダイシングシート上でダイシングされると共に非ダイシングシート側の面に接続端子11が形成された素子1を、接着剤が塗布された転写基板に一括して転写する工程と、上記転写基板から各素子1をピックアップして回路基板2上に実装する工程とを含む。
【選択図】 図1

Description

本発明は、素子の実装方法及び搬送装置に関するものである。
従来、半導体チップ等の素子を回路基板に実装する場合には、例えば半導体チップに凸形状の導電部材からなるバンプ(接続端子)を設け、そのバンプを回路基板に接合することで半導体チップを回路基板に接合している(例えば、特許文献1参照)。
このような半導体チップは、例えばシリコンなどの半導体ウエハをダイジングシート上でダイシングすることにより分割形成される。そして、各半導体チップは、真空吸引口を持つフェースダウンボンダのヘッドなどに吸着・保持されハンドリングされて、ステージ上に固定された回路基板にボンディングされる。
特開2000−124245号公報
しかしながら、通常、半導体チップのバンプは、半導体ウエハの非ダイシングシート側に形成されているため、半導体チップを基板上にボンディングする際には、まず、半導体チップをピックアップして所定のトレー等にバンプ形成面を下にして収納し、その後、トレーから半導体チップを吸着・保持して回路基板に実装している。このため、半導体チップのバンプがトレーと接触し傷つく場合があった。また、従来の実装方法においては、半導体チップをピックアップして所定のトレー等に収納する際に、手作業あるいは反転機構を有するハンドラ等を用いているが、例えば、半導体チップが微小(例えば、縦横0.5mm程度)の場合には、そのハンドリングが困難となり、半導体チップの収納に失敗する場合があった。
本発明は、上述する問題点に鑑みてなされたもので、素子を回路基板上に容易に実装することを目的とする。
上記目的を達成するために、本発明に係る素子の実装方法は、ダイシングシート上でダイシングされると共に非ダイシングシート側の面に接続端子が形成された素子を、接着剤が塗布された転写基板に一括して転写する工程と、上記転写基板から各素子をピックアップして回路基板上に実装する工程とを含むことを特徴とする。
このような特徴を有する本発明に係る素子の実装方法によれば、ダイシングシート上においてダイシングされた素子が接着剤を塗布された転写基板に転写された後に、当該転写基板からピックアップされて回路基板上に実装される。このため、本発明に係る素子の実装方法によれば、転写基板を反転させることによって、容易に素子を一括して反転させることができるため、素子を転写基板からピックアップして回路基板上に実装するまでの間に、各素子ごとに反転させる必要がなくなる。したがって、素子を回路基板上に容易に実装することが可能となる。
また、本発明に係る素子の実装方法によれば、素子の接続端子が形成された面が接着剤と接触されるため、接続端子が傷つくことを防止することが可能となる。
また、本発明に係る素子の実装方法においては、上記接着剤が熱可塑性の樹脂であるという構成を採用することができる。
素子を転写基板からピックアップした際には、素子の接続端子に接着剤が付着した状態となる。このため、接着剤として熱可塑性の樹脂を用いることによって、接着剤を素子と回路基板との間に充填されるアンダーフィルとして用いることができる。
また、本発明に係る素子の実装方法においては、上記接着剤が半田であるという構成を採用することができる。
素子を転写基板からピックアップした際には、素子の接続端子に接着剤が付着した状態となる。このため、接着剤として半田を用いることによって、素子を回路基板に実装した際に、接続端子と回路基板との間に容易に金属間化合物を形成することが可能となる。
次に、本発明に係る搬送装置は、ダイシングシート上でダイシングされると共に非ダイシングシート側の面に接続端子が形成された素子を所定箇所に搬送する搬送装置であって、接着剤が塗布されると共に上記ダイシングシート上から上記素子を一括して転写される転写基板と、当該転写基板を搬送する転写基板搬送手段とを備えることを特徴とする。
このような本発明に係る搬送装置によれば、ダイシングシート上でダイシングされた素子を一括して転写基板に転写し、その転写基板を搬送する。このため、搬送された転写基板から各素子をピックアップして回路基板上に実装することによって、容易に素子を回路基板上に実装することが可能となる。
また、本発明に係る搬送装置は、上記転写基板を反転する転写基板反転手段を備えることが好ましい。
このように転写基板反転手段を備えることによって、転写基板を反転して搬送することができるため、より容易に素子を回路基板上に実装することが可能となる。
以下、図面を参照して、本発明に係る素子の実装方法及び搬送装置の一実施形態について説明する。なお、以下の図において、各部材を認識可能な大きさとするために、各部材の縮尺を適宜変更している。
(第1実施形態)
図1は、微小半導体チップ1(素子)が実装された回路基板2の全体構成を示す概略図である。この図に示すように、微小半導体チップ1には、一方側の面にバンプ11(接続端子)が複数形成されており、各バンプ11が回路基板2の導電部21と接続されている。そして、微小半導体チップ1と回路基板2との間には、バンプ11を保護するためのアンダーフィル3が配置されており、このアンダーフィル3は熱可塑性の樹脂によって形成されている。なお、微小半導体チップ1としては、例えば、縦横0.5mm程度の面発光レーザが用いられる。
次ぎに、このような微小半導体チップ1を回路基板2に実装するための実装方法について説明する。
まず、図2(a)に示すように、シリコン等からなる半導体ウエハ4を紫外線硬化樹脂が塗布されたダイシングシート5上に配置し、この半導体ウエハ4をダイヤモンドブレードやレーザによって複数に分割することによって、微小半導体チップ1を形成する。その後、図2(b)に示すように、紫外線を照射することによって紫外線硬化樹脂の接着力を低下させる。なお、半導体ウエハ4の非ダイシングシート側の面には、各微小半導体チップ1に対応するバンプ11が予め複数形成されている。また、半導体ウエハ4には、各種半導体素子及び電子回路等が予め形成されている。
続いて、図2(c)に示すように、ダイシングシート5上の半導体ウエハ4に対して加熱した転写基板6を押圧する。この転写基板6の一方側の面には、図3に示すように、熱可塑性の樹脂7が均一に塗布されている。そして、転写基板6は、熱可塑性の樹脂7が塗布された面を半導体ウエハ4に対して押圧される。なお、転写基板6は、剛性を有する部材によって形成されていることが好ましく、例えばセラミックスによって形成することができる。また、転写基板6に塗布される熱可塑性の樹脂7の厚みdは、各微小半導体チップ1が有するバンプ11の高さhよりも厚いことが好ましい。このように、熱可塑性の樹脂7の厚みdをバンプ11の高さhよりも厚くすることによって、バンプ11が転写基板6と直接接触することを防止することができるため、バンプ11が傷つくことを防止することができる。
その後、転写基板6を冷却することによって、熱可塑性の樹脂7を硬化させ、ダイシングシート5と転写基板6とを解離することによって、図4(d)に示すように、一括して微小半導体チップ1をダイシングシート5から転写基板6に転写する。なお、ここで、上述のように、ダイシングシート5に紫外線が照射されることによって、ダイシングシート5上に塗布された紫外線硬化樹脂の接着力が低下されているため、微小半導体チップ1は、容易に転写基板6に転写される。
そして、微小半導体チップ1が一括して転写された転写基板6は、反転された後、微小半導体チップ1を回路基板2に実装するボンディング装置に搬送される。このように、微小半導体チップ1が一括して転写された転写基板6を反転させることは、各微小半導体チップ1を反転させることに比べて非常に容易であり、また失敗する可能性が極めて低い。このため、本実施形態に係る素子の実装方法によれば、確実に微小半導体チップ1を反転させることができる。
続いて、転写基板6に転写された各微小半導体チップ1は、ボンディング装置が備えるヘッド8によって回路基板2に実装される。このヘッド8は、微小半導体チップ1を真空吸着することによって保持するものであり、真空吸着機構及び加熱機構を有している。
そして、このようなヘッド8を図4(e)に示すように、単一の微小半導体チップ1と接触させることによって、その微小半導体チップ1は、ヘッド8に吸着される。ここで、ヘッド8は、加熱機構を有しているため、ヘッド8がある微小半導体チップ1と接触することによって、その微小半導体チップ1の周囲の熱可塑性の樹脂7が軟化する。このため、微小半導体チップ1を容易に転写基板6から解離することができる。なお、微小半導体チップ1を転写基板6から解離した際には、図4(f)に示すように、微小半導体チップ1には、熱可塑性の樹脂7がそのまま付着している。このように、本実施形態に係る素子の実装方法によれば、熱可塑性の樹脂7が塗布された転写基板6に微小半導体チップ1が転写されるため、微小半導体チップ1のバンプ11をトレー等に直接接触させることがない。このため、バンプ11が傷つくことを防止しつつ容易に微小半導体チップ1を反転させることができる。
その後、ヘッド8を回路基板2の所定位置上まで移動し、微小半導体チップ1を回路基板2に対して加熱・押圧することによって、微小半導体チップ1のバンプ11と回路基板2の導電部21とを接続させる。ここで、微小半導体チップ1に付着した熱可塑性の樹脂7は、ヘッド8の加熱機構によって加熱され軟化されているため、微小半導体チップ1を回路基板2に対して押圧することによって、容易に微小半導体チップ1のバンプ11と回路基板2の導電部21とを直接接触させることができる。
そして、ヘッド8を微小半導体チップ1から解離し、その後、熱可塑性の樹脂7を冷却することによって硬化させることによって、微小半導体チップ1が回路基板2上に実装される。また、熱可塑性の樹脂7は、硬化されることによって、そのままアンダーフィル3として用いられる。このように、転写基板6に塗布される接着剤として熱硬化性の樹脂7を用いることによって、微小半導体チップ1と回路基板2とを接合した後にアンダーフィルを微小半導体チップ1と回路基板2との間に充填する必要なくなる。
このように本第1実施形態に係る素子の実装方法によれば、ダイシングシート5上においてイシングされた微小半導体チップ1が熱可塑性の樹脂7を塗布された転写基板6に転写された後に、当該転写基板6からピックアップされて回路基板2上に実装される。このため、転写基板6を反転させることによって、容易に微小半導体チップ1を一括して反転させることができるため、微小半導体チップ1を転写基板6からピックアップして回路基板2上に実装するまでの間に、各微小半導体チップ1ごとに反転させる必要がなくなる。したがって、微小半導体チップ1を回路基板2上に容易に実装することが可能となる。
(第2実施形態)
次に、本発明の第2実施形態に係る素子の実装方法について説明する。なお、本第2実施形態の説明において、上記第1実施形態と同様の部分については、その説明を省略あるいは簡略化する。
なお、本第2実施形態に係る素子の実装方法は、転写基板6に塗布する接着剤として半田9を用いている点が上記第1実施形態と異なる。なお、本第2実施形態において用いられる半田9は、鉛フリー半田である。
本第2実施形態に係る素子の実装方法においては、 図5(a)に示すように、半田9が塗布された転写基板6をダイシングシート5上の半導体ウエハ4に対して押圧する。なお、転写基板6が半導体ウエハ4に対して押圧される際には、転写基板6が加熱されることによって、半田9は転写基板6を逆さにした際にこぼれない程度に軟化しているものとする。なお、転写基板6に塗布される半田9の厚みDは、各微小半導体チップ1が有するバンプ11の高さhよりも薄いことが好ましい。このように、半田9の厚みdをバンプ11の高さhよりも薄くすることによって、微小半導体チップの回路および隣接バンプ間の短絡を抑えることができる。このように、半田9が塗布された転写基板6を半導体ウエハ4に対して押圧することによって、バンプ11の表面に金属間化合物が形成される。
その後、転写基板6を冷却することによって、半田9を硬化させ、ダイシングシート5と転写基板6とを解離することによって、図5(b)に示すように、一括して微小半導体チップ1をダイシングシート5から転写基板6に転写する。そして、微小半導体チップ1が一括して転写された転写基板6は、反転された後、微小半導体チップ1を回路基板2に実装するボンディング装置に搬送される。
そして、ヘッド8を図5(c)に示すように、単一の微小半導体チップ1と接触させることによって、その微小半導体チップ1は、ヘッド8に吸着される。ここで、ヘッド8は、加熱機構を有しているため、ヘッド8がある微小半導体チップ1と接触することによって、その微小半導体チップ1の周囲の半田9が軟化する。このため、微小半導体チップ1を容易に転写基板6から解離することができる。なお、微小半導体チップ1を転写基板6から解離した際には、微小半導体チップ1のバンプ11の表面には、金属間化合物が形成されている。
その後、ヘッド8を回路基板2の所定位置上まで移動し、微小半導体チップ1を回路基板2に対して加熱・押圧することによって、微小半導体チップ1のバンプ11と回路基板2の導電部21とを接続させる。
そして、ヘッド8を微小半導体チップ1から解離し、その後、微小半導体チップ1と回路基板2との間にアンダーフィル3を充填することで、微小半導体チップ1が回路基板2上に実装される。
このような本第2実施形態に係る素子の実装方法によれば、上記第1実施形態に係る素子の実装方法と同様に、転写基板6を反転させることによって、容易に微小半導体チップ1を一括して反転させることができるため、微小半導体チップ1を転写基板6からピックアップして回路基板2上に実装するまでの間に、各微小半導体チップ1ごとに反転させる必要がなくなり、微小半導体チップ1を回路基板2上に容易に実装することが可能となる。
(第3実施形態)
次に、本発明の第3実施形態として、上記第1あるいは第2実施形態において用いられる搬送装置について説明する。
図6は、本第3実施形態に係る搬送装置100の制御系を表したブロック図である。本第3実施形態に係る搬送装置100は、上記第1及び第2実施形態において示した転写基板6と、当該転写基板6を搬送する転写基板搬送装置110(転写基板搬送手段)と、転写基板6を反転する転写基板反転装置120(転写基板反転手段)と、転写基板搬送装置110及び転写基板反転装置120を制御する制御装置130とを備えて構成されており、図6に示すように、転写基板搬送装置110と転写基板反転装置120との各々が制御装置130と電気的に接続されている。なお、本実施形態に係る搬送装置100を上記第1実施形態に係る素子の実装方法に用いる場合には、転写基板6に熱可塑性の樹脂7が塗布され、本実施形態に係る搬送装置100を上記第2実施形態に係る素子の実装方法に用いる場合には、転写基板6に半田9が塗布される。
そして、制御装置130は、転写基板6を半導体ウエハ4に押圧する場合には、転写基板搬送装置110によって転写基板6を半導体ウエハ4上に移動(搬送)し、その後、再び転写基板搬送装置110によって転写基板6を半導体ウエハ4に対して押圧するように移動(搬送)する。
続いて、制御装置130は、転写基板搬送装置110によって転写基板6を半導体ウエハ4が載置されたダイシングシート5から解離する。その後、制御装置130は、転写基板反転装置120によって転写基板6を反転してから、上記第1及び第2実施形態において示したボンディング装置に転写基板6を転写基板搬送装置110を用いて搬送する。
このような本第3実施形態に係る搬送装置100によれば、転写基板6と当該転写基板6を搬送する転写基板搬送装置110とを備えているため、転写基板6に各微小半導体チップ1を容易に転写し、さらにボンディング装置に搬送することができる。
また、本第3実施形態に係る搬送装置100によれば、転写基板反転装置120を備えているため、各微小半導体チップ1が転写された転写基板6を反転してボンディング装置に搬送することができる。
以上、添付図面を参照しながら本発明に係る素子の実装方法及び搬送装置の好適な実施形態について説明したが、本発明は上記実施形態に限定されないことは言うまでもない。上述した実施形態において示した各構成部材の諸形状や組み合わせ等は一例であって、本発明の主旨から逸脱しない範囲において設計要求等に基づき種々変更可能である。
例えば、転写基板6の接着剤塗布領域を仕切板等によって、複数の領域に分割するようにしても良い。このように、転写基板6の接着剤塗布領域を複数領域に分割することによって、例えば接着剤として熱可塑性の樹脂を用いた場合には、バンプ11に付着する熱可塑性の樹脂の量を容易に調整することが可能となる。
微小半導体チップ1が実装された回路基板2の全体構成を示す概略図である。 本発明の第1実施形態に係る素子の実装方法について説明するための図である。 転写基板6の斜視図である。 本発明の第1実施形態に係る素子の実装方法について説明するための図である。 本発明の第2実施形態に係る素子の実装方法について説明するための図である。 本発明の第3実施形態に係る搬送装置100の制御系を示したブロック図である。
符号の説明
1……微小半導体チップ(素子)、11……バンプ(接続端子)、2……回路基板、21……導電部、3……アンダーフィル、4……半導体ウエハ、5……ダイシングシート、6……転写基板、7……熱可塑性の樹脂、8……ヘッド、9……半田、100……搬送装置、110……転写基板搬送装置(転写基板搬送手段)、120……転写基板反転装置(転写基板反転手段)、130……制御装置


Claims (5)

  1. ダイシングシート上でダイシングされると共に非ダイシングシート側の面に接続端子が形成された素子を、接着剤が塗布された転写基板に一括して転写する工程と、
    前記転写基板から各素子をピックアップして回路基板上に実装する工程と
    を含むことを特徴とする素子の実装方法。
  2. 前記接着剤は、熱可塑性の樹脂であることを特徴とする請求項1記載の素子の実装方法。
  3. 前記接着剤は、半田であることを特徴とする請求項1記載の素子の実装方法。
  4. ダイシングシート上でダイシングされると共に非ダイシングシート側の面に接続端子が形成された素子を所定箇所に搬送する搬送装置であって、
    接着剤が塗布されると共に前記ダイシングシート上から前記素子を一括して転写される転写基板と、
    当該転写基板を搬送する転写基板搬送手段と
    を備えることを特徴とする搬送装置。
  5. 前記転写基板を反転する転写基板反転手段を備えることを特徴とする請求項4記載の搬送装置。


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JP2007208129A (ja) * 2006-02-03 2007-08-16 Citizen Electronics Co Ltd 表面実装型発光素子の製造方法
JP2016062959A (ja) * 2014-09-16 2016-04-25 株式会社東芝 基板分離方法および半導体製造装置

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KR100888195B1 (ko) * 2007-08-06 2009-03-12 한국과학기술원 능동소자가 내장된 유기기판 제조방법
US20120273935A1 (en) * 2011-04-29 2012-11-01 Stefan Martens Semiconductor Device and Method of Making a Semiconductor Device
US9418895B1 (en) * 2015-03-14 2016-08-16 International Business Machines Corporation Dies for RFID devices and sensor applications
CN110838462B (zh) * 2018-08-15 2022-12-13 北科天绘(合肥)激光技术有限公司 一种器件阵列的巨量转移方法及系统

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US5376561A (en) * 1990-12-31 1994-12-27 Kopin Corporation High density electronic circuit modules
US6338980B1 (en) * 1999-08-13 2002-01-15 Citizen Watch Co., Ltd. Method for manufacturing chip-scale package and manufacturing IC chip
TW569424B (en) * 2000-03-17 2004-01-01 Matsushita Electric Ind Co Ltd Module with embedded electric elements and the manufacturing method thereof

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JP2007208129A (ja) * 2006-02-03 2007-08-16 Citizen Electronics Co Ltd 表面実装型発光素子の製造方法
JP4745073B2 (ja) * 2006-02-03 2011-08-10 シチズン電子株式会社 表面実装型発光素子の製造方法
JP2016062959A (ja) * 2014-09-16 2016-04-25 株式会社東芝 基板分離方法および半導体製造装置
US10199253B2 (en) 2014-09-16 2019-02-05 Toshiba Memory Corporation Method for manufacturing semiconductor devices through peeling using UV-ray

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