JP2005252072A - 素子の実装方法及び搬送装置 - Google Patents
素子の実装方法及び搬送装置 Download PDFInfo
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- JP2005252072A JP2005252072A JP2004062245A JP2004062245A JP2005252072A JP 2005252072 A JP2005252072 A JP 2005252072A JP 2004062245 A JP2004062245 A JP 2004062245A JP 2004062245 A JP2004062245 A JP 2004062245A JP 2005252072 A JP2005252072 A JP 2005252072A
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- transfer substrate
- semiconductor chip
- circuit board
- dicing sheet
- mounting method
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Abstract
【解決手段】 ダイシングシート上でダイシングされると共に非ダイシングシート側の面に接続端子11が形成された素子1を、接着剤が塗布された転写基板に一括して転写する工程と、上記転写基板から各素子1をピックアップして回路基板2上に実装する工程とを含む。
【選択図】 図1
Description
また、本発明に係る素子の実装方法によれば、素子の接続端子が形成された面が接着剤と接触されるため、接続端子が傷つくことを防止することが可能となる。
素子を転写基板からピックアップした際には、素子の接続端子に接着剤が付着した状態となる。このため、接着剤として熱可塑性の樹脂を用いることによって、接着剤を素子と回路基板との間に充填されるアンダーフィルとして用いることができる。
素子を転写基板からピックアップした際には、素子の接続端子に接着剤が付着した状態となる。このため、接着剤として半田を用いることによって、素子を回路基板に実装した際に、接続端子と回路基板との間に容易に金属間化合物を形成することが可能となる。
このように転写基板反転手段を備えることによって、転写基板を反転して搬送することができるため、より容易に素子を回路基板上に実装することが可能となる。
図1は、微小半導体チップ1(素子)が実装された回路基板2の全体構成を示す概略図である。この図に示すように、微小半導体チップ1には、一方側の面にバンプ11(接続端子)が複数形成されており、各バンプ11が回路基板2の導電部21と接続されている。そして、微小半導体チップ1と回路基板2との間には、バンプ11を保護するためのアンダーフィル3が配置されており、このアンダーフィル3は熱可塑性の樹脂によって形成されている。なお、微小半導体チップ1としては、例えば、縦横0.5mm程度の面発光レーザが用いられる。
そして、このようなヘッド8を図4(e)に示すように、単一の微小半導体チップ1と接触させることによって、その微小半導体チップ1は、ヘッド8に吸着される。ここで、ヘッド8は、加熱機構を有しているため、ヘッド8がある微小半導体チップ1と接触することによって、その微小半導体チップ1の周囲の熱可塑性の樹脂7が軟化する。このため、微小半導体チップ1を容易に転写基板6から解離することができる。なお、微小半導体チップ1を転写基板6から解離した際には、図4(f)に示すように、微小半導体チップ1には、熱可塑性の樹脂7がそのまま付着している。このように、本実施形態に係る素子の実装方法によれば、熱可塑性の樹脂7が塗布された転写基板6に微小半導体チップ1が転写されるため、微小半導体チップ1のバンプ11をトレー等に直接接触させることがない。このため、バンプ11が傷つくことを防止しつつ容易に微小半導体チップ1を反転させることができる。
次に、本発明の第2実施形態に係る素子の実装方法について説明する。なお、本第2実施形態の説明において、上記第1実施形態と同様の部分については、その説明を省略あるいは簡略化する。
本第2実施形態に係る素子の実装方法においては、 図5(a)に示すように、半田9が塗布された転写基板6をダイシングシート5上の半導体ウエハ4に対して押圧する。なお、転写基板6が半導体ウエハ4に対して押圧される際には、転写基板6が加熱されることによって、半田9は転写基板6を逆さにした際にこぼれない程度に軟化しているものとする。なお、転写基板6に塗布される半田9の厚みDは、各微小半導体チップ1が有するバンプ11の高さhよりも薄いことが好ましい。このように、半田9の厚みdをバンプ11の高さhよりも薄くすることによって、微小半導体チップの回路および隣接バンプ間の短絡を抑えることができる。このように、半田9が塗布された転写基板6を半導体ウエハ4に対して押圧することによって、バンプ11の表面に金属間化合物が形成される。
次に、本発明の第3実施形態として、上記第1あるいは第2実施形態において用いられる搬送装置について説明する。
図6は、本第3実施形態に係る搬送装置100の制御系を表したブロック図である。本第3実施形態に係る搬送装置100は、上記第1及び第2実施形態において示した転写基板6と、当該転写基板6を搬送する転写基板搬送装置110(転写基板搬送手段)と、転写基板6を反転する転写基板反転装置120(転写基板反転手段)と、転写基板搬送装置110及び転写基板反転装置120を制御する制御装置130とを備えて構成されており、図6に示すように、転写基板搬送装置110と転写基板反転装置120との各々が制御装置130と電気的に接続されている。なお、本実施形態に係る搬送装置100を上記第1実施形態に係る素子の実装方法に用いる場合には、転写基板6に熱可塑性の樹脂7が塗布され、本実施形態に係る搬送装置100を上記第2実施形態に係る素子の実装方法に用いる場合には、転写基板6に半田9が塗布される。
また、本第3実施形態に係る搬送装置100によれば、転写基板反転装置120を備えているため、各微小半導体チップ1が転写された転写基板6を反転してボンディング装置に搬送することができる。
Claims (5)
- ダイシングシート上でダイシングされると共に非ダイシングシート側の面に接続端子が形成された素子を、接着剤が塗布された転写基板に一括して転写する工程と、
前記転写基板から各素子をピックアップして回路基板上に実装する工程と
を含むことを特徴とする素子の実装方法。 - 前記接着剤は、熱可塑性の樹脂であることを特徴とする請求項1記載の素子の実装方法。
- 前記接着剤は、半田であることを特徴とする請求項1記載の素子の実装方法。
- ダイシングシート上でダイシングされると共に非ダイシングシート側の面に接続端子が形成された素子を所定箇所に搬送する搬送装置であって、
接着剤が塗布されると共に前記ダイシングシート上から前記素子を一括して転写される転写基板と、
当該転写基板を搬送する転写基板搬送手段と
を備えることを特徴とする搬送装置。 - 前記転写基板を反転する転写基板反転手段を備えることを特徴とする請求項4記載の搬送装置。
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JP2004062245A JP2005252072A (ja) | 2004-03-05 | 2004-03-05 | 素子の実装方法及び搬送装置 |
US11/054,413 US20050196901A1 (en) | 2004-03-05 | 2005-02-09 | Device mounting method and device transport apparatus |
CN2005100525532A CN1665004A (zh) | 2004-03-05 | 2005-03-01 | 器件安装方法和器件输送装置 |
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JP2007208129A (ja) * | 2006-02-03 | 2007-08-16 | Citizen Electronics Co Ltd | 表面実装型発光素子の製造方法 |
JP2016062959A (ja) * | 2014-09-16 | 2016-04-25 | 株式会社東芝 | 基板分離方法および半導体製造装置 |
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KR100888195B1 (ko) * | 2007-08-06 | 2009-03-12 | 한국과학기술원 | 능동소자가 내장된 유기기판 제조방법 |
US20120273935A1 (en) * | 2011-04-29 | 2012-11-01 | Stefan Martens | Semiconductor Device and Method of Making a Semiconductor Device |
US9418895B1 (en) * | 2015-03-14 | 2016-08-16 | International Business Machines Corporation | Dies for RFID devices and sensor applications |
CN110838462B (zh) * | 2018-08-15 | 2022-12-13 | 北科天绘(合肥)激光技术有限公司 | 一种器件阵列的巨量转移方法及系统 |
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US5376561A (en) * | 1990-12-31 | 1994-12-27 | Kopin Corporation | High density electronic circuit modules |
US6338980B1 (en) * | 1999-08-13 | 2002-01-15 | Citizen Watch Co., Ltd. | Method for manufacturing chip-scale package and manufacturing IC chip |
TW569424B (en) * | 2000-03-17 | 2004-01-01 | Matsushita Electric Ind Co Ltd | Module with embedded electric elements and the manufacturing method thereof |
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2004
- 2004-03-05 JP JP2004062245A patent/JP2005252072A/ja active Pending
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2005
- 2005-02-09 US US11/054,413 patent/US20050196901A1/en not_active Abandoned
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---|---|---|---|---|
JP2007208129A (ja) * | 2006-02-03 | 2007-08-16 | Citizen Electronics Co Ltd | 表面実装型発光素子の製造方法 |
JP4745073B2 (ja) * | 2006-02-03 | 2011-08-10 | シチズン電子株式会社 | 表面実装型発光素子の製造方法 |
JP2016062959A (ja) * | 2014-09-16 | 2016-04-25 | 株式会社東芝 | 基板分離方法および半導体製造装置 |
US10199253B2 (en) | 2014-09-16 | 2019-02-05 | Toshiba Memory Corporation | Method for manufacturing semiconductor devices through peeling using UV-ray |
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US20050196901A1 (en) | 2005-09-08 |
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