TW201301481A - 雙極高電子遷移率電晶體及其形成方法 - Google Patents
雙極高電子遷移率電晶體及其形成方法 Download PDFInfo
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- 238000000034 method Methods 0.000 title claims description 12
- 239000000463 material Substances 0.000 claims abstract description 26
- 230000005669 field effect Effects 0.000 claims abstract description 17
- 229910052718 tin Inorganic materials 0.000 claims abstract description 14
- 239000004065 semiconductor Substances 0.000 claims abstract description 8
- 239000011669 selenium Substances 0.000 claims description 22
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 12
- 229910052711 selenium Inorganic materials 0.000 claims description 12
- BUGBHKTXTAQXES-UHFFFAOYSA-N Selenium Chemical compound [Se] BUGBHKTXTAQXES-UHFFFAOYSA-N 0.000 claims description 11
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 6
- 229910052733 gallium Inorganic materials 0.000 claims description 6
- 238000005229 chemical vapour deposition Methods 0.000 claims description 5
- 229910052751 metal Inorganic materials 0.000 claims description 5
- 239000002184 metal Substances 0.000 claims description 5
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 4
- 229910052785 arsenic Inorganic materials 0.000 claims description 4
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 claims description 4
- 229910052799 carbon Inorganic materials 0.000 claims description 4
- -1 碲Te Substances 0.000 claims description 4
- 229910000980 Aluminium gallium arsenide Inorganic materials 0.000 claims 1
- 229910052714 tellurium Inorganic materials 0.000 abstract description 6
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 39
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 36
- FTWRSWRBSVXQPI-UHFFFAOYSA-N alumanylidynearsane;gallanylidynearsane Chemical compound [As]#[Al].[As]#[Ga] FTWRSWRBSVXQPI-UHFFFAOYSA-N 0.000 description 12
- 239000002019 doping agent Substances 0.000 description 12
- 238000000137 annealing Methods 0.000 description 10
- 229910052732 germanium Inorganic materials 0.000 description 6
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 6
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 description 5
- 230000000694 effects Effects 0.000 description 5
- 239000000758 substrate Substances 0.000 description 5
- WEVYAHXRMPXWCK-UHFFFAOYSA-N Acetonitrile Chemical compound CC#N WEVYAHXRMPXWCK-UHFFFAOYSA-N 0.000 description 3
- 238000001451 molecular beam epitaxy Methods 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- PORWMNRCUJJQNO-UHFFFAOYSA-N tellurium atom Chemical compound [Te] PORWMNRCUJJQNO-UHFFFAOYSA-N 0.000 description 3
- 230000010354 integration Effects 0.000 description 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 125000006850 spacer group Chemical group 0.000 description 2
- 229910005540 GaP Inorganic materials 0.000 description 1
- 208000012868 Overgrowth Diseases 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- HZXMRANICFIONG-UHFFFAOYSA-N gallium phosphide Chemical compound [Ga]#P HZXMRANICFIONG-UHFFFAOYSA-N 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 238000009877 rendering Methods 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
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Abstract
一種外延層結構，包括場效應電晶體結構和異質結雙極電晶體結構。異質結雙極電晶體結構包含與場效應電晶體結構組合形成的n摻雜次集電極和集電極，其中次集電極或集電極中至少一部分包含Sn、Te或Se。在一個實施例中，基極形成在集電極上方；以及發射極形成在基極上方。雙極電晶體和場效應電晶體每個獨立地包含III-V族半導體材料。
Description
本申請案主張2011年6月23日提交的美國臨時申請案第61/500,546號的權利。
以上申請案的全部教示經由引用併入於本文。
本案係關於雙極高電子遷移率電晶體及該雙極高電子遷移率電晶體之形成方法。
砷化鎵(GaAs)異質結雙極電晶體(HBT)積體電路已發展成用於很多應用的重要技術，尤其是用於無線通訊系統的功率放大器(PAs)。未來需要期望具有更高集成水準的器件以改良性能或功能，減小封裝尺寸，或降低成本。獲得此種集成的一個方法是將HBT PA與由GaAs贗晶高電子遷移率電晶體(pHEMT)形成的射頻開關組合。
為了單片集成HBT和pHEMT器件，已使用雙極高電子遷移率電晶體(BiHEMT)結構。典型的BiHEMT外延結構包括生長在HEMT外延層頂上的HBT外延層。BiHEMT的組合外延層結構很難生產並且BiHEMT的組合外延層結構可包括超過30個離散的層。此種外延層結構可藉由例
如生長技術(比如金屬有機化學氣相沉積(MOCVD)或分子束外延(MBE))形成。可替換地，該等層的順序可以顛倒並且在HBT的頂上生長HEMT是有利的。該等器件有時也被稱為雙極場效應電晶體(BiFET)。
為了在BiHEMT結構中製造pHEMT器件，必需蝕刻或移除pHEMT層上的HBT層。由於在pHEMT表面和HBT表面之間大的高度差(典型地1-3 μm)，如此導致顯著的器件加工難度。此高度差的任何減少將有助於降低該等加工難度。HBT的次集電極層和集電極層是關注該等努力的明顯選擇因為該等次集電極層和集電極層構成高度差的大百分比。次集電極層典型地位於集電極層下面並且次集電極層典型地以較高的摻雜密度生長。但是，應注意，此處使用術語「集電極」來指HBT的基極下面的集電極和次集電極層的整體，而術語「次集電極」是指圖1所示的集電極下面的高摻雜的層。
雖然希望集電極層變薄，但是如此將減小電晶體擊穿電壓並降低器件健壯性。使次集電極層變薄增加了集電極薄層電阻和電晶體寄生電阻。藉由增加次集電極中的摻雜，可以減小集電極薄層電阻。但是，大多數現有基於n-p-n GaAs的HBT次集電極外延層已摻雜接近上限(一般稱為「飽和」)的矽Si。而且，由於生長附加層期間的退火影響，集電極和次集電極上的附加層(例如HBT的基極和發射極結構)的生長可以惡化GaAs：Si薄層電阻和電子濃度。該退火可導致顯著減小常規的矽摻雜的GaAs膜的電
子濃度(相對于該電子濃度之原生值)。該等結果可以經由三個現象的交互來解釋：a)鎵空穴的平衡濃度增加；b)鎵空穴趨向于與矽施主原子形成複合物因此使摻雜劑原子不活躍；以及c)生長GaAs的生長條件對非平衡狀態的影響。【1】
因此需要一種解決上述問題或使問題最小化之BiHEMT。
本發明提供了一種BiHEMT外延層結構，包括場效應電晶體結構，該場效應電晶體結構包括接觸層，以及形成在場效應電晶體結構上方的異質結雙極電晶體結構。異質結雙極電晶體結構包含形成在場效應電晶體結構的接觸層上方的n摻雜次集電極和集電極，其中次集電極和集電極中至少一個每個獨立地包括由錫Sn、碲Te和硒Se組成的群組中的至少一個成員。基極在集電極上方，並且發射極在基極上方，其中場效應電晶體結構和異質結雙極電晶體的集電極和次集電極中至少一個，以及場效應電晶體結構的接觸層，每個獨立地包含III-V族半導體。集電極和次集電極的合適材料的實例包括GaAs、AlGaAs和InGaP。優選地，次集電極和集電極包括GaAs。而且，優選地，集電極和次集電極由相同材料形成，雖然該集電極和次集電極可以由不同的材料形成。在優選的實施例中，III-V族半
導體材料包括鎵和砷。集電極的厚度典型地在約5000 Å到3μm之間。次集電極的厚度典型地在約3000 Å到2μm之間。在另一優選實施例中，場效應電晶體是高電子遷移率電晶體。
典型地，集電極中錫Sn、碲Te或硒Se摻雜劑的濃度在約1E15 cm-3(每立方釐米1x1015濃度)到約5E17 cm-3之間。在另一實施例中，集電極可摻雜矽。在一個實施例中，次集電極的至少一部分是n型，錫Sn、碲Te或硒Se濃度大於1E18 cm-3，而在另一實施例中，次集電極的至少一部分是n型，電子濃度大於1E19 cm-3。
在一個優選實施例中，從材料InGaP、AlInGaP或AlGaAs中選擇發射極。在另一優選實施例中，基極摻雜碳，濃度為約1E19 cm-3到約7E19 cm-3。
本發明還提供了用於形成雙極高電子遷移率電晶體的方法，其中異質結雙極電晶體藉由該方法形成在場效應電晶體上；其中集電極層摻雜錫Sn、碲Te或硒Se。在一個優選實施例中，該等層由金屬有機化學氣相沉積形成。
本發明提供了對BiHEMT結構的集電極及/或次集電極增加最大摻雜和減小最小薄層電阻限制的結構和方法。藉由用錫Sn、碲Te或硒Se，包括該等錫Sn、碲Te或硒Se的組合，摻雜集電極和次集電極層，可以減小由於GaAs：Si層的薄層電阻和電子濃度惡化的負面影響。產生的BiHEMT器件可展示出減小的次集電極厚度、使拓撲減少並改良器件加工，同時維持想要的低集電極薄層電阻。
以下是本發明的示例性實施例的說明。
雖然已結合示例性實施例具體示出和說明了本發明，但是本領域技術人員將理解，可以做出對形式和細節的各種改變而不脫離所附權利要求包含的本發明的範圍。
圖1是本發明的代表性BiHEMT外延層結構的示意圖。注意，在器件製造期間HBT的層被移除以在基礎層上形成pHEMT。此舉導致在HBT和pHEMT的表面之間的顯著拓撲。在光刻步驟中此種拓撲可導致問題，尤其是對於pHEMT。對於pHEMT開關，最小特徵典型地是柵電極以及需要精確光學以限定<1 μm的尺度。BiHEMT晶片的拓撲可導致不均勻的光致抗蝕劑厚度及/或印刷柵極圖案的光學系統的焦點深度問題。為了減輕該等問題中的一些問題，可能必須橫向地使pHEMT與BiHEMT分離，但此舉會浪費晶片面積。應注意圖1所示的層是代表性的且已為了說明而簡化。可以預期附加的層、分級的層和其他材料設計出現在典型的BiHEMT中。
如圖1所示，BiHEMT外延層結構10生長在襯底14上。在一個實施例中，襯底14基本由砷化鎵(GaAs)組成。緩衝層16在襯底14上方。在一個實施例中，緩衝層16包括GaAs和AlGaAs。典型地，緩衝層16的厚度範圍在約500 Å到約5000 Å之間。可選地，可採用其他層代替緩
衝層16，或者除了緩衝層16，還具有其他層，以及其他層可以與緩衝層16任意組合。其他可選層的實例包括超晶格結構層，包括交替的低/高能隙材料比如GaAs和AlGaAs或GaAs和InGaAs層，該GaAs和AlGaAs或GaAs和InGaAs層厚度在約10 Å到約300 Å之間。溝道層18生長在緩衝層16或該緩衝層16之替換或附加層上方。溝道層18的合適材料的實例包括GaAs和InGaAs，層厚度範圍從約20 Å到200 Å。可選地，分隔層或其他可選層(未圖示)可以在溝道層18上方(或下方)。用於形成分隔層的合適材料包括GaAs、AlGaAs、InGaP和AlInGaP，厚度從20 Å到100 Å。其他可選層的實例可包括，例如，GaAs、AlGaAs、InGaP、AlInGaP、InGaAs，厚度在約5 Å到50 Å之間。肖特基層20在溝道層18的上方。肖特基層20的合適材料的實例包括AlGaAs、InGaP和AlInGaP，厚度範圍從約100 Å到1500 Å。接觸層22在肖特基層20的上方。接觸層22的合適材料的實例包括GaAs、AlGaAs和InGaP，厚度在約100 Å到2000 Å之間。接觸層22包括凹陷部分24。所有層16、18、20和22可用本領域已知的合適方法製造，比如金屬有機化學氣相沉積或分子束外延。凹陷24可用本領域已知的合適技術形成，比如光刻和蝕刻。柵極接點26位於凹陷部分24中。源極接點28和汲極接點30位於接觸層22，或源極接點28和汲極接點30與接觸層22電連接。
BiHEMT外延層結構還可選地包括蝕刻停止、分隔或在
接觸層22的其他可選層32。合適的蝕刻停止層的實例包括AlGaAs、AlAs或InGaP，厚度範圍從約10 Å到500 Å。
BiHEMT外延層結構10還包括異質結雙極電晶體(HBT)組件34。HBT34包括次集電極36。次集電極36的合適材料的實例包括III-V族半導體材料。在一個實施例中，III-V族半導體材料包括鎵和砷。次集電極36的特定材料的實例包括砷化鎵(GaAs)、砷化鋁鎵(AlGaAs)、磷化銦鎵(InGaP)和用於基於InP的HBT的InGaAs和InP。次集電極36摻雜從錫(Sn)、碲(Te)和硒(Se)組成的群組中選擇的至少一種元素。在一個實施例中，次集電極36的摻雜的濃度範圍在約1x1018 cm-3到約1 x1020 cm-3之間。可替換地，摻雜的濃度範圍在約1x1019 cm-3到約6 x1019 cm-3之間。在一個實施例中，次集電極層36的厚度範圍在約2000 Å到約4 μm之間。在另一個實施例中，次集電極36的厚度範圍在約3000 Å到約2 μm之間。
集電極38在次集電極36的上方。在一個實施例中，集電極38包括III-V族半導體材料，該III-V族半導體材料包括鎵和砷。集電極38的材料可以是與次集電極36相同的材料或不同的III-V族半導體材料。次集電極36和集電極38中的一個或兩個可以摻雜矽。在一個實施例中，集電極38僅摻雜矽。在另一個實施例中，除了矽(Si)之外，或在無Si之情況下，集電極38摻雜錫(Sn)、碲(Te)和硒(Se)中的至少一種。在一個實施例中，錫(Sn)、碲(Te)和硒(Se)摻雜劑中的至少一種的濃度共同地範圍
在約1x1015 cm-3到約5 x1017 cm-3之間。集電極中的摻雜可以根據有意的應用和器件的期望的電性能利用多種分佈分級。
基極40在集電極38上方。在一個實施例中，基極40主要由GaAs、GaAsSb、GaInAs、GaInAsN組成的群組中選擇的至少一個成員組成。在一個實施例中，基極40摻雜碳。在一個具體實施例中，基極40摻雜碳，濃度在約1x1019 cm-3到約7 x1019 cm-3之間。
發射極42在基極40上方，並且可選地，發射極42包括覆蓋層。合適的覆蓋層材料可包括GaAs、AlGaAs、InGaP、AlInGaP、InP和AlInP。典型的摻雜劑可包括Si、Sn、Se和Te。發射極層的摻雜劑濃度範圍在5x1016 cm-3到約1x1018 cm-3之間。發射極覆蓋層典型地摻雜在1x1018 cm-3到3x1019 cm-3之間。
BiHEMT 10包括在pHEMT12的電接觸柵極36、源極28和汲極30，以及在HBT 34的接點44、46和48。該等電接點的合適材料的實例是鈦、鉑和金。蝕刻停止32、次集電極36、集電極38、基極40和發射極42層可用與形成pHEMT 12的層相同的方法形成，該等方法包括，例如，本領域技術人員已知的技術，比如金屬有機化學氣相沉積和分子束外延。
在本發明的上下文中，術語BiHEMT用於說明結合雙極電晶體和場效應電晶體的功能的任何外延層結構，不管結構的順序或命名。例如，作為對如圖1所示BiHEMT 10
的替換，根據本發明的另一實施例，pHEMT 34形成在HBT12上方。
圖2A中的引用資料圖示0.5 μm n+GaAs：Si層對總摻雜劑(乙矽烷)流的薄層電阻(Rs)。原生(即在生長在GaAs：Si膜之後立即結束的層中)，最大的活躍摻雜級別在mid-E18 cm-3範圍。圖2B圖示退火次集電極層(作為在BiHEMT結構生長期間類比HBT層隨後過度生長的方法)的影響。從GaAs：Si膜獲得的Rs和電子濃度在退火的和未退火的樣本之間顯著不同。該等資料表明活躍的摻雜(對n型傳導率有貢獻的摻雜劑原子的數量)在退火之後顯著減少並且此舉是限制BiHEMT器件中n+GaAs：Si HBT次集電極層最小可得薄層電阻的首要因素。
圖3A圖示0.5 μm n+GaAs：Sn層對總摻雜劑流的薄層電阻Rs。圖3B所示原生最大活躍摻雜級別是約1E19 cm-3，比圖2所示的GaAs：Si的高。如圖3B所示，退火次集電極層的影響仍然明顯，但是隨著退火增加的Rs基本小於Si摻雜的膜。GaAs：Sn獲得的峰值電子濃度是約7E18 cm-3，或比圖2B所示的GaAs：Si高約40%。
圖4A圖示0.5 μm n+GaAs：Te層對總摻雜劑流的Rs。原生最大活躍摻雜級別是約9E18 cm-3，略小於圖3A所示的GaAs：Sn的情況。但是，如圖4B所示，退火次集電極層的影響顯著減少且基本消失。此舉導致電子濃度比圖2B所示的GaAs：Si和圖3B所示的GaAs：Sn的情況有額外增加，值為約9E18 cm-3。退火的GaAs：Te的薄層電阻為約10
ohms/sq，比經由常規的Si摻雜或Sn摻雜可獲得的低。
此處引用的所有參考的相關部分經由整體引用結合於此。
[1]H.Fushimi,M.Shinohara,and K.Wada,J.Appl.Phys.,81,1745(1997)
10‧‧‧BiHEMT外延層結構
12‧‧‧贗晶高電子遷移率電晶體(pHEMT)
14‧‧‧襯底
16‧‧‧緩衝層
18‧‧‧溝道層
20‧‧‧肖特基層
22‧‧‧接觸層
24‧‧‧凹陷部分
26‧‧‧柵極接點
28‧‧‧源極接點
30‧‧‧汲極接點
32‧‧‧其他可選層/蝕刻停止層
34‧‧‧異質結雙極電晶體(HBT)組件
36‧‧‧次集電極層
38‧‧‧集電極層
40‧‧‧基極層
42‧‧‧發射極層
44‧‧‧接點
46‧‧‧接點
48‧‧‧接點
根據本發明的示例性實施例的以下更具體的說明，上文的描述將會更明白，如附圖中所示，在不同視圖中相同元件符號表示相同元件。圖不需要按比例，重點在於說明本發明的實施例。
圖1是BiHEMT外延層結構的示意圖，圖示了在同一晶片上的pHEMT和BiHEMT層的單片結合以及從該等外延層形成的HBT和pHEMT器件的表面之間的拓撲。
圖2A和2B是現有的GaAs：Si層的薄層電阻(圖2A)和電子濃度(圖2B)的圖，圖示了在退火時薄層電阻增加和電子濃度減小。x軸是總摻雜劑流，量測在外延層生長期間多少矽Si被引入反應器。
圖3A和3B是本發明的GaAs：Sn層的薄層電阻(圖3A)和電子濃度(圖3B)的圖，圖示了退火對薄層電阻和電子濃度相對於GaAs：Si(圖2)的減少影響。x軸是總摻雜劑流，量測在外延層生長期間多少錫Sn被引入反應器。
圖4A和4B是本發明的GaAs：Te層的薄層電阻(圖4A)和電子濃度(圖4B)的圖，圖示了退火對薄層電阻和電子濃度相對於GaAs：Si(圖2)和GaAs：Sn(圖3)的減少影響。x軸是總摻雜劑流，量測在外延層生長期間多少碲Te被引入反應器。
10‧‧‧BiHEMT外延層結構
12‧‧‧贗晶高電子遷移率電晶體(pHEMT)
14‧‧‧襯底
16‧‧‧緩衝層
18‧‧‧溝道層
20‧‧‧肖特基層
22‧‧‧接觸層
24‧‧‧凹陷部分
26‧‧‧柵極接點
28‧‧‧源極接點
30‧‧‧汲極接點
32‧‧‧其他可選層/蝕刻停止層
34‧‧‧異質結雙極電晶體(HBT)組件
36‧‧‧次集電極層
38‧‧‧集電極層
40‧‧‧基極層
42‧‧‧發射極層
44‧‧‧接點
46‧‧‧接點
48‧‧‧接點
Claims (9)
- 一種外延層結構，包括：(a)一場效應電晶體結構，該場效應電晶體結構包括一接觸層；及(b)形成在該場效應電晶體結構上方的一異質結雙極電晶體結構，其中該異質結雙極電晶體結構包含i)形成在該場效應電晶體結構的該接觸層上方的一n摻雜次集電極ii)該次集電極上方的集電極，其中該次集電極和該集電極中的至少一個每個獨立地包括由錫Sn、碲Te和硒Se組成的群組中的至少一個成員；iii)在該集電極上方的基極，及iv)在該基極上方的發射極；其中該異質結雙極電晶體結構的該集電極和該次集電極中至少一個，以及該場效應電晶體結構的該接觸層，每個獨立地包含一III-V族半導體材料。
- 如請求項1所述的外延層結構，其中該III-V族半導體材料包括鎵和砷。
- 如請求項1所述的外延層結構，其中該場效應電晶 體是一高電子遷移率電晶體。
- 如請求項1所述的外延層結構，其中該次集電極的至少一部分是一n型材料，具有大於約1E18 cm-3的一電子濃度。
- 如請求項1所述的外延層結構，其中該次集電極的至少一部分是一n型材料，具有大於約1E19 cm-3的一電子濃度。
- 如請求項1所述的外延層結構，其中該發射極主要由InGaP、AlInGaP和AlGaAs組成的群組中的至少一個成員組成。
- 如請求項1所述的外延層結構，其中該基極摻雜碳，一濃度在約1E19 cm-3到約7E19 cm-3之間。
- 一種用於形成一雙極高電子遷移率電晶體結構的方法，包括以下步驟：a)在一高電子遷移率電晶體結構的一接觸層上方形成一次集電極；及b)在該次集電極上方形成一集電極，其中次集電極和集電極中至少一個每個獨立地包括錫Sn、碲Te和硒Se組成的群組中的至少一個成員。
- 如請求項8所述的方法，其中該次集電極和集電極 層中的至少一個由金屬有機化學氣相沉積形成。
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| CN102842578A (zh) | 2012-12-26 |
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