TW201108906A - Method for producing laminated substrate - Google Patents

Method for producing laminated substrate Download PDF

Info

Publication number
TW201108906A
TW201108906A TW99126633A TW99126633A TW201108906A TW 201108906 A TW201108906 A TW 201108906A TW 99126633 A TW99126633 A TW 99126633A TW 99126633 A TW99126633 A TW 99126633A TW 201108906 A TW201108906 A TW 201108906A
Authority
TW
Taiwan
Prior art keywords
insulating substrate
substrate
laminated substrate
circuit pattern
via hole
Prior art date
Application number
TW99126633A
Other languages
English (en)
Chinese (zh)
Inventor
Atsuhiro Uratsuji
Issei Odaka
Original Assignee
Sony Chem & Inf Device Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Chem & Inf Device Corp filed Critical Sony Chem & Inf Device Corp
Publication of TW201108906A publication Critical patent/TW201108906A/zh

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0023—Etching of the substrate by chemical or physical means by exposure and development of a photosensitive insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4679—Aligning added circuit layers or via connections relative to previous circuit layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/10—Using electric, magnetic and electromagnetic fields; Using laser light
    • H05K2203/107—Using laser light
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0073—Masks not provided for in groups H05K3/02 - H05K3/46, e.g. for photomechanical production of patterned surfaces
    • H05K3/0082—Masks not provided for in groups H05K3/02 - H05K3/46, e.g. for photomechanical production of patterned surfaces characterised by the exposure method of radiation-sensitive masks
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4682—Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
TW99126633A 2009-08-11 2010-08-10 Method for producing laminated substrate TW201108906A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009186268A JP2011039264A (ja) 2009-08-11 2009-08-11 積層基板の製造方法

Publications (1)

Publication Number Publication Date
TW201108906A true TW201108906A (en) 2011-03-01

Family

ID=43586161

Family Applications (1)

Application Number Title Priority Date Filing Date
TW99126633A TW201108906A (en) 2009-08-11 2010-08-10 Method for producing laminated substrate

Country Status (3)

Country Link
JP (1) JP2011039264A (fr)
TW (1) TW201108906A (fr)
WO (1) WO2011018983A1 (fr)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8557637B2 (en) 2011-07-04 2013-10-15 Industrial Technology Research Institute Method for fabricating the flexible electronic device
US20180139854A1 (en) * 2016-11-17 2018-05-17 Winbond Electronics Corp. Manufacturing method of circuit board
TWI662875B (zh) * 2016-11-17 2019-06-11 華邦電子股份有限公司 線路板的製造方法

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6085433B2 (ja) * 2012-08-14 2017-02-22 株式会社アドテックエンジニアリング 描画装置、露光描画装置、プログラム及び描画方法
JP5975785B2 (ja) * 2012-08-14 2016-08-23 株式会社アドテックエンジニアリング 描画装置、露光描画装置、プログラム及び描画方法
JP6470484B2 (ja) * 2013-03-29 2019-02-13 株式会社アドテックエンジニアリング 描画装置、露光描画装置、プログラム及び描画方法
JP6234694B2 (ja) * 2013-04-12 2017-11-22 株式会社アドテックエンジニアリング 描画装置、露光描画装置、プログラム及び描画方法
JP6326170B2 (ja) * 2017-06-14 2018-05-16 株式会社アドテックエンジニアリング 描画装置、露光描画装置、プログラム及び描画方法
JP6637120B2 (ja) * 2018-07-05 2020-01-29 株式会社アドテックエンジニアリング 描画装置、露光描画装置、プログラム及び描画方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3087899B2 (ja) * 1989-06-16 2000-09-11 株式会社日立製作所 厚膜薄膜混成多層配線基板の製造方法
JPH1048835A (ja) * 1996-08-06 1998-02-20 Ibiden Co Ltd プリント配線板の製造装置及び製造方法
JP2002190655A (ja) * 2000-12-21 2002-07-05 Hitachi Ltd プリント配線板の製造方法と露光方法
JP2004047717A (ja) * 2002-07-11 2004-02-12 Murata Mfg Co Ltd チップ部品およびその製造方法
JP4881376B2 (ja) * 2006-04-24 2012-02-22 アルプス電気株式会社 配線基板の製造方法
JP2008078464A (ja) * 2006-09-22 2008-04-03 Nec Toppan Circuit Solutions Inc 印刷配線板の製造方法および穴明け装置

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8557637B2 (en) 2011-07-04 2013-10-15 Industrial Technology Research Institute Method for fabricating the flexible electronic device
US20180139854A1 (en) * 2016-11-17 2018-05-17 Winbond Electronics Corp. Manufacturing method of circuit board
CN108076596A (zh) * 2016-11-17 2018-05-25 华邦电子股份有限公司 线路板的制造方法
TWI662875B (zh) * 2016-11-17 2019-06-11 華邦電子股份有限公司 線路板的製造方法
US10470316B2 (en) 2016-11-17 2019-11-05 Winbond Electronics Corp. Manufacturing method of circuit board
CN108076596B (zh) * 2016-11-17 2020-06-23 华邦电子股份有限公司 线路板的制造方法

Also Published As

Publication number Publication date
JP2011039264A (ja) 2011-02-24
WO2011018983A1 (fr) 2011-02-17

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