TW201023307A - Ceramic substrate having thermal via - Google Patents

Ceramic substrate having thermal via Download PDF

Info

Publication number
TW201023307A
TW201023307A TW097148703A TW97148703A TW201023307A TW 201023307 A TW201023307 A TW 201023307A TW 097148703 A TW097148703 A TW 097148703A TW 97148703 A TW97148703 A TW 97148703A TW 201023307 A TW201023307 A TW 201023307A
Authority
TW
Taiwan
Prior art keywords
thermal via
ceramic substrate
reinforcing structure
quot
height
Prior art date
Application number
TW097148703A
Other languages
English (en)
Chinese (zh)
Inventor
Hidefumi Narita
Akira Inaba
Original Assignee
Du Pont
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Du Pont filed Critical Du Pont
Publication of TW201023307A publication Critical patent/TW201023307A/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367Cooling facilitated by shape of device
    • H01L23/3677Wire-like or pin-like cooling fins or heat sinks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Materials Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structure Of Printed Boards (AREA)
  • Compositions Of Oxide Ceramics (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
TW097148703A 2007-12-11 2008-12-12 Ceramic substrate having thermal via TW201023307A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US12/001,267 US20090146295A1 (en) 2007-12-11 2007-12-11 Ceramic substrate having thermal via

Publications (1)

Publication Number Publication Date
TW201023307A true TW201023307A (en) 2010-06-16

Family

ID=40637680

Family Applications (1)

Application Number Title Priority Date Filing Date
TW097148703A TW201023307A (en) 2007-12-11 2008-12-12 Ceramic substrate having thermal via

Country Status (5)

Country Link
US (1) US20090146295A1 (enExample)
JP (1) JP2011507276A (enExample)
CN (1) CN101874299B (enExample)
TW (1) TW201023307A (enExample)
WO (1) WO2009076494A2 (enExample)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101491138B1 (ko) * 2007-12-12 2015-02-09 엘지이노텍 주식회사 다층 기판 및 이를 구비한 발광 다이오드 모듈
US20100140790A1 (en) * 2008-12-05 2010-06-10 Seagate Technology Llc Chip having thermal vias and spreaders of cvd diamond
US8757874B2 (en) 2010-05-03 2014-06-24 National Instruments Corporation Temperature sensing system and method
WO2012055206A1 (zh) * 2010-10-26 2012-05-03 Yu Jianping 氧化铝/石墨复合陶瓷材料和采用该材料为基板的led光源
KR101289186B1 (ko) * 2011-04-15 2013-07-26 삼성전기주식회사 인쇄회로기판 및 그 제조방법
US9006770B2 (en) * 2011-05-18 2015-04-14 Tsmc Solid State Lighting Ltd. Light emitting diode carrier
US8908383B1 (en) * 2012-05-21 2014-12-09 Triquint Semiconductor, Inc. Thermal via structures with surface features
US9318466B2 (en) * 2014-08-28 2016-04-19 Globalfoundries Inc. Method for electronic circuit assembly on a paper substrate
EP3850319B1 (de) * 2018-11-09 2023-07-12 Siemens Energy Global GmbH & Co. KG Anordnung zum ermitteln der temperatur einer oberfläche
CN117769163B (zh) * 2023-12-26 2024-05-31 江苏富乐华半导体科技股份有限公司 一种铝薄膜电路基板制备方法

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59230741A (ja) * 1983-06-15 1984-12-25 株式会社日立製作所 形状記憶複合材料
US4894115A (en) * 1989-02-14 1990-01-16 General Electric Company Laser beam scanning method for forming via holes in polymer materials
JPH07221218A (ja) * 1994-02-03 1995-08-18 Toshiba Corp 半導体装置
US5802699A (en) * 1994-06-07 1998-09-08 Tessera, Inc. Methods of assembling microelectronic assembly with socket for engaging bump leads
US5558267A (en) * 1995-03-31 1996-09-24 Texas Instruments Incorporated Moat for die pad cavity in bond station heater block
JPH0955459A (ja) * 1995-06-06 1997-02-25 Seiko Epson Corp 半導体装置
US6247228B1 (en) * 1996-08-12 2001-06-19 Tessera, Inc. Electrical connection with inwardly deformable contacts
JP3650689B2 (ja) * 1997-05-28 2005-05-25 三菱電機株式会社 半導体装置
US6395998B1 (en) * 2000-09-13 2002-05-28 International Business Machines Corporation Electronic package having an adhesive retaining cavity
DE10051547A1 (de) * 2000-10-18 2002-04-25 Bosch Gmbh Robert Baugruppenträger für elektrische/elektronische Bauelemente
US6750516B2 (en) * 2001-10-18 2004-06-15 Hewlett-Packard Development Company, L.P. Systems and methods for electrically isolating portions of wafers
US6541712B1 (en) * 2001-12-04 2003-04-01 Teradyhe, Inc. High speed multi-layer printed circuit board via
US7152312B2 (en) * 2002-02-11 2006-12-26 Adc Dsl Systems, Inc. Method for transmitting current through a substrate
JP2003338577A (ja) * 2002-05-21 2003-11-28 Murata Mfg Co Ltd 回路基板装置
US6977346B2 (en) * 2002-06-10 2005-12-20 Visteon Global Technologies, Inc. Vented circuit board for cooling power components
TWI233145B (en) * 2002-09-03 2005-05-21 Toshiba Corp Semiconductor device
JP2004165291A (ja) * 2002-11-11 2004-06-10 Tokuyama Corp ビアホール付きセラミック基板及びその製造方法
US7286359B2 (en) * 2004-05-11 2007-10-23 The U.S. Government As Represented By The National Security Agency Use of thermally conductive vias to extract heat from microelectronic chips and method of manufacturing
US7786567B2 (en) * 2004-11-10 2010-08-31 Chung-Cheng Wang Substrate for electrical device and methods for making the same
KR100849455B1 (ko) * 2005-04-19 2008-07-30 티디케이가부시기가이샤 다층 세라믹 기판 및 그 제조 방법
JP2007031229A (ja) * 2005-07-28 2007-02-08 Tdk Corp 窒化アルミニウム基板の製造方法及び窒化アルミニウム基板
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JP4331769B2 (ja) * 2007-02-28 2009-09-16 Tdk株式会社 配線構造及びその形成方法並びにプリント配線板

Also Published As

Publication number Publication date
CN101874299B (zh) 2012-04-04
US20090146295A1 (en) 2009-06-11
WO2009076494A3 (en) 2009-07-30
CN101874299A (zh) 2010-10-27
JP2011507276A (ja) 2011-03-03
WO2009076494A2 (en) 2009-06-18

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