TW200707738A - Substrate backgate for trigate FET - Google Patents
Substrate backgate for trigate FETInfo
- Publication number
- TW200707738A TW200707738A TW095121934A TW95121934A TW200707738A TW 200707738 A TW200707738 A TW 200707738A TW 095121934 A TW095121934 A TW 095121934A TW 95121934 A TW95121934 A TW 95121934A TW 200707738 A TW200707738 A TW 200707738A
- Authority
- TW
- Taiwan
- Prior art keywords
- back gate
- substrate
- well
- polysilicon layer
- gate
- Prior art date
Links
- 239000000758 substrate Substances 0.000 title abstract 6
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 4
- 229920005591 polysilicon Polymers 0.000 abstract 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 3
- 229910052710 silicon Inorganic materials 0.000 abstract 3
- 239000010703 silicon Substances 0.000 abstract 3
- 239000012212 insulator Substances 0.000 abstract 2
- 230000005669 field effect Effects 0.000 abstract 1
- 238000002955 isolation Methods 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/785—Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66787—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel
- H01L29/66795—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
- H01L21/845—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body including field-effect transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
- H01L27/1211—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI combined with field-effect transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/160,361 US7411252B2 (en) | 2005-06-21 | 2005-06-21 | Substrate backgate for trigate FET |
Publications (1)
Publication Number | Publication Date |
---|---|
TW200707738A true TW200707738A (en) | 2007-02-16 |
Family
ID=37573909
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW095121934A TW200707738A (en) | 2005-06-21 | 2006-06-19 | Substrate backgate for trigate FET |
Country Status (3)
Country | Link |
---|---|
US (2) | US7411252B2 (zh) |
CN (1) | CN100452434C (zh) |
TW (1) | TW200707738A (zh) |
Cited By (2)
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---|---|---|---|---|
CN105514163A (zh) * | 2014-09-26 | 2016-04-20 | 中芯国际集成电路制造(上海)有限公司 | 鳍式场效应晶体管及其形成方法 |
TWI767342B (zh) * | 2019-09-28 | 2022-06-11 | 台灣積體電路製造股份有限公司 | 積體電路裝置及其形成方法 |
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US7642205B2 (en) | 2005-04-08 | 2010-01-05 | Mattson Technology, Inc. | Rapid thermal processing using energy transfer layers |
KR100645065B1 (ko) * | 2005-06-23 | 2006-11-10 | 삼성전자주식회사 | 핀 전계 효과 트랜지스터와 이를 구비하는 비휘발성 메모리장치 및 그 형성 방법 |
US8448102B2 (en) | 2006-03-09 | 2013-05-21 | Tela Innovations, Inc. | Optimizing layout of irregular structures in regular layout context |
US7956421B2 (en) | 2008-03-13 | 2011-06-07 | Tela Innovations, Inc. | Cross-coupled transistor layouts in restricted gate level layout architecture |
US9035359B2 (en) | 2006-03-09 | 2015-05-19 | Tela Innovations, Inc. | Semiconductor chip including region including linear-shaped conductive structures forming gate electrodes and having electrical connection areas arranged relative to inner region between transistors of different types and associated methods |
US8225239B2 (en) | 2006-03-09 | 2012-07-17 | Tela Innovations, Inc. | Methods for defining and utilizing sub-resolution features in linear topology |
US9563733B2 (en) * | 2009-05-06 | 2017-02-07 | Tela Innovations, Inc. | Cell circuit and layout with linear finfet structures |
US8247846B2 (en) | 2006-03-09 | 2012-08-21 | Tela Innovations, Inc. | Oversized contacts and vias in semiconductor chip defined by linearly constrained topology |
US7446352B2 (en) | 2006-03-09 | 2008-11-04 | Tela Innovations, Inc. | Dynamic array architecture |
US8658542B2 (en) | 2006-03-09 | 2014-02-25 | Tela Innovations, Inc. | Coarse grid design methods and structures |
US8245180B2 (en) | 2006-03-09 | 2012-08-14 | Tela Innovations, Inc. | Methods for defining and using co-optimized nanopatterns for integrated circuit design and apparatus implementing same |
US8541879B2 (en) | 2007-12-13 | 2013-09-24 | Tela Innovations, Inc. | Super-self-aligned contacts and method for making the same |
US8653857B2 (en) | 2006-03-09 | 2014-02-18 | Tela Innovations, Inc. | Circuitry and layouts for XOR and XNOR logic |
US7908578B2 (en) | 2007-08-02 | 2011-03-15 | Tela Innovations, Inc. | Methods for designing semiconductor device with dynamic array section |
US8225261B2 (en) | 2006-03-09 | 2012-07-17 | Tela Innovations, Inc. | Methods for defining contact grid in dynamic array architecture |
US7763534B2 (en) | 2007-10-26 | 2010-07-27 | Tela Innovations, Inc. | Methods, structures and designs for self-aligning local interconnects used in integrated circuits |
US8839175B2 (en) | 2006-03-09 | 2014-09-16 | Tela Innovations, Inc. | Scalable meta-data objects |
US9009641B2 (en) | 2006-03-09 | 2015-04-14 | Tela Innovations, Inc. | Circuits with linear finfet structures |
US9230910B2 (en) | 2006-03-09 | 2016-01-05 | Tela Innovations, Inc. | Oversized contacts and vias in layout defined by linearly constrained topology |
US8286107B2 (en) | 2007-02-20 | 2012-10-09 | Tela Innovations, Inc. | Methods and systems for process compensation technique acceleration |
US8667443B2 (en) | 2007-03-05 | 2014-03-04 | Tela Innovations, Inc. | Integrated circuit cell library for multiple patterning |
US8453094B2 (en) | 2008-01-31 | 2013-05-28 | Tela Innovations, Inc. | Enforcement of semiconductor structure regularity for localized transistors and interconnect |
US7939443B2 (en) | 2008-03-27 | 2011-05-10 | Tela Innovations, Inc. | Methods for multi-wire routing and apparatus implementing same |
US8106459B2 (en) | 2008-05-06 | 2012-01-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | FinFETs having dielectric punch-through stoppers |
SG192532A1 (en) | 2008-07-16 | 2013-08-30 | Tela Innovations Inc | Methods for cell phasing and placement in dynamic array architecture and implementation of the same |
US9122832B2 (en) | 2008-08-01 | 2015-09-01 | Tela Innovations, Inc. | Methods for controlling microloading variation in semiconductor wafer layout and fabrication |
US8263462B2 (en) * | 2008-12-31 | 2012-09-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | Dielectric punch-through stoppers for forming FinFETs having dual fin heights |
US8293616B2 (en) | 2009-02-24 | 2012-10-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods of fabrication of semiconductor devices with low capacitance |
US8184472B2 (en) * | 2009-03-13 | 2012-05-22 | International Business Machines Corporation | Split-gate DRAM with lateral control-gate MuGFET |
US7948307B2 (en) * | 2009-09-17 | 2011-05-24 | International Business Machines Corporation | Dual dielectric tri-gate field effect transistor |
US8661392B2 (en) | 2009-10-13 | 2014-02-25 | Tela Innovations, Inc. | Methods for cell boundary encroachment and layouts implementing the Same |
DE102009047311B4 (de) * | 2009-11-30 | 2016-06-02 | Globalfoundries Dresden Module One Limited Liability Company & Co. Kg | Verfahren zur Herstellung von Gatestrukturen mit verbesserten Grenzflächeneigenschaften zwischen einer Kanalhalbleiterlegierung und einem Gatedielektrikum mittels eines Oxidationsprozesses |
US9159627B2 (en) | 2010-11-12 | 2015-10-13 | Tela Innovations, Inc. | Methods for linewidth modification and apparatus implementing the same |
CN102479821B (zh) * | 2010-11-30 | 2014-07-16 | 中国科学院微电子研究所 | 半导体器件及其形成方法 |
US8779514B2 (en) | 2010-12-29 | 2014-07-15 | Institute of Microelectronics, Chinese Academy of Sciences | Transistor and method for manufacturing the same |
CN102569396B (zh) * | 2010-12-29 | 2015-09-23 | 中国科学院微电子研究所 | 晶体管及其制造方法 |
CN102956647B (zh) * | 2011-08-31 | 2015-04-15 | 中国科学院微电子研究所 | 半导体器件及其制造方法 |
CN103022039B (zh) * | 2011-09-21 | 2016-03-30 | 中国科学院微电子研究所 | Sram单元及其制作方法 |
US9196541B2 (en) | 2011-09-21 | 2015-11-24 | Institute of Microelectronics, Chinese Academy of Sciences | SRAM cell and method for manufacturing the same |
US9040399B2 (en) * | 2011-10-27 | 2015-05-26 | International Business Machines Corporation | Threshold voltage adjustment for thin body MOSFETs |
FR3001084B1 (fr) * | 2013-01-16 | 2016-04-15 | Commissariat Energie Atomique | Transistor a grille et a plan de masse couples |
CN104134668B (zh) * | 2013-05-03 | 2017-02-22 | 中国科学院微电子研究所 | 存储器件及其制造方法和存取方法 |
CN103794512B (zh) * | 2014-01-15 | 2017-02-15 | 上海新储集成电路有限公司 | 双Finfet晶体管及其制备方法 |
US9343589B2 (en) * | 2014-01-22 | 2016-05-17 | Globalfoundries Inc. | Field effect transistor (FET) with self-aligned double gates on bulk silicon substrate, methods of forming, and related design structures |
US9236483B2 (en) * | 2014-02-12 | 2016-01-12 | Qualcomm Incorporated | FinFET with backgate, without punchthrough, and with reduced fin height variation |
CN107579066B (zh) * | 2016-07-01 | 2020-03-31 | 中芯国际集成电路制造(上海)有限公司 | 半导体装置及其制造方法 |
US10886393B2 (en) | 2017-10-17 | 2021-01-05 | Mitsubishi Electric Research Laboratories, Inc. | High electron mobility transistor with tunable threshold voltage |
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JP3460863B2 (ja) * | 1993-09-17 | 2003-10-27 | 三菱電機株式会社 | 半導体装置の製造方法 |
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US6764884B1 (en) * | 2003-04-03 | 2004-07-20 | Advanced Micro Devices, Inc. | Method for forming a gate in a FinFET device and thinning a fin in a channel region of the FinFET device |
US6909186B2 (en) * | 2003-05-01 | 2005-06-21 | International Business Machines Corporation | High performance FET devices and methods therefor |
KR100521382B1 (ko) * | 2003-06-30 | 2005-10-12 | 삼성전자주식회사 | 핀 전계효과 트랜지스터 제조 방법 |
US7172943B2 (en) * | 2003-08-13 | 2007-02-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Multiple-gate transistors formed on bulk substrates |
US7205185B2 (en) * | 2003-09-15 | 2007-04-17 | International Busniess Machines Corporation | Self-aligned planar double-gate process by self-aligned oxidation |
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-
2005
- 2005-06-21 US US11/160,361 patent/US7411252B2/en active Active
-
2006
- 2006-06-19 TW TW095121934A patent/TW200707738A/zh unknown
- 2006-06-20 CN CNB2006100946485A patent/CN100452434C/zh not_active Expired - Fee Related
-
2008
- 2008-04-08 US US12/099,211 patent/US7888743B2/en not_active Expired - Fee Related
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105514163A (zh) * | 2014-09-26 | 2016-04-20 | 中芯国际集成电路制造(上海)有限公司 | 鳍式场效应晶体管及其形成方法 |
CN105514163B (zh) * | 2014-09-26 | 2018-09-07 | 中芯国际集成电路制造(上海)有限公司 | 鳍式场效应晶体管及其形成方法 |
TWI767342B (zh) * | 2019-09-28 | 2022-06-11 | 台灣積體電路製造股份有限公司 | 積體電路裝置及其形成方法 |
US11690209B2 (en) | 2019-09-28 | 2023-06-27 | Taiwan Semiconductor Manufacturing Co., Ltd. | Fin-based well straps for improving memory macro performance |
Also Published As
Publication number | Publication date |
---|---|
US20060286724A1 (en) | 2006-12-21 |
US7888743B2 (en) | 2011-02-15 |
US20080185649A1 (en) | 2008-08-07 |
CN1885562A (zh) | 2006-12-27 |
CN100452434C (zh) | 2009-01-14 |
US7411252B2 (en) | 2008-08-12 |
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