TW200619874A - Method for removing the mask layer of resin and method for manufacturing the substrate with solder bump - Google Patents
Method for removing the mask layer of resin and method for manufacturing the substrate with solder bumpInfo
- Publication number
- TW200619874A TW200619874A TW094135777A TW94135777A TW200619874A TW 200619874 A TW200619874 A TW 200619874A TW 094135777 A TW094135777 A TW 094135777A TW 94135777 A TW94135777 A TW 94135777A TW 200619874 A TW200619874 A TW 200619874A
- Authority
- TW
- Taiwan
- Prior art keywords
- mask layer
- substrate
- resin mask
- solder
- resin
- Prior art date
Links
- 239000011347 resin Substances 0.000 title abstract 8
- 229920005989 resin Polymers 0.000 title abstract 8
- 229910000679 solder Inorganic materials 0.000 title abstract 8
- 238000000034 method Methods 0.000 title abstract 4
- 239000000758 substrate Substances 0.000 title abstract 4
- 238000004519 manufacturing process Methods 0.000 title abstract 2
- 238000010438 heat treatment Methods 0.000 abstract 3
- 150000001414 amino alcohols Chemical class 0.000 abstract 1
- LYCAIKOWRPUZTN-UHFFFAOYSA-N ethylene glycol Natural products OCCO LYCAIKOWRPUZTN-UHFFFAOYSA-N 0.000 abstract 1
- -1 glycol ethers Chemical class 0.000 abstract 1
- WGCNASOHLSPBMP-UHFFFAOYSA-N hydroxyacetaldehyde Natural products OCC=O WGCNASOHLSPBMP-UHFFFAOYSA-N 0.000 abstract 1
Classifications
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/26—Processing photosensitive materials; Apparatus therefor
- G03F7/42—Stripping or agents therefor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
- C23F1/00—Etching metallic material by chemical means
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
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- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
- H05K3/3485—Applying solder paste, slurry or powder
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05567—Disposition the external layer being at least partially embedded in the surface
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05573—Single external layer
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/1147—Manufacturing methods using a lift-off mask
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
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- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/043—Reflowing of solder coated conductors, not during connection of components, e.g. reflowing solder paste
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/05—Patterning and lithography; Masks; Details of resist
- H05K2203/0562—Details of resist
- H05K2203/0568—Resist used for applying paste, ink or powder
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0756—Uses of liquids, e.g. rinsing, coating, dissolving
- H05K2203/0769—Dissolving insulating materials, e.g. coatings, not used for developing resist after exposure
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- General Chemical & Material Sciences (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Photosensitive Polymer And Photoresist Processing (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004301270A JP4855667B2 (ja) | 2004-10-15 | 2004-10-15 | 樹脂マスク層の除去方法およびはんだバンプ付き基板の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200619874A true TW200619874A (en) | 2006-06-16 |
TWI398203B TWI398203B (zh) | 2013-06-01 |
Family
ID=36382997
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW094135777A TWI398203B (zh) | 2004-10-15 | 2005-10-13 | 樹脂掩膜層的除去方法和帶焊錫突起的基板的製造方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US7291517B2 (zh) |
JP (1) | JP4855667B2 (zh) |
KR (1) | KR101143071B1 (zh) |
CN (1) | CN100551207C (zh) |
TW (1) | TWI398203B (zh) |
Families Citing this family (24)
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JP4094982B2 (ja) * | 2003-04-15 | 2008-06-04 | ハリマ化成株式会社 | はんだ析出方法およびはんだバンプ形成方法 |
JP2007184539A (ja) * | 2005-12-07 | 2007-07-19 | Denso Corp | 加工品の製造方法 |
US7517788B2 (en) * | 2005-12-29 | 2009-04-14 | Intel Corporation | System, apparatus, and method for advanced solder bumping |
JP4219951B2 (ja) * | 2006-10-25 | 2009-02-04 | 新光電気工業株式会社 | はんだボール搭載方法及びはんだボール搭載基板の製造方法 |
JP2008147458A (ja) * | 2006-12-11 | 2008-06-26 | Nec Electronics Corp | プリント配線板およびその製造方法 |
TWI316381B (en) * | 2007-01-24 | 2009-10-21 | Phoenix Prec Technology Corp | Circuit board and fabrication method thereof |
JP2008218552A (ja) * | 2007-03-01 | 2008-09-18 | Nec Corp | 電子部品の実装基板および実装方法 |
CN101827928B (zh) * | 2007-08-08 | 2012-10-03 | 荒川化学工业株式会社 | 用于除去无铅助焊剂的清洁剂组合物以及用于除去无铅助焊剂的方法 |
JP5076749B2 (ja) * | 2007-09-03 | 2012-11-21 | 株式会社日立プラントテクノロジー | シート印刷システム |
US8938135B2 (en) * | 2007-09-19 | 2015-01-20 | Hitachi Chemical Company, Ltd. | Method for manufacturing optical waveguide and optical waveguide manufactured by the method |
KR100900681B1 (ko) * | 2007-11-28 | 2009-06-01 | 삼성전기주식회사 | 솔더 범프 형성방법 |
KR101364538B1 (ko) * | 2007-12-12 | 2014-02-18 | 삼성전자주식회사 | 적어도 2종의 전자 부품들의 실장 방법 및 실장 장치 |
KR101069980B1 (ko) | 2009-09-15 | 2011-10-04 | 삼성전기주식회사 | 솔더 범프 형성 방법 |
US20110169158A1 (en) * | 2010-01-14 | 2011-07-14 | Qualcomm Incorporated | Solder Pillars in Flip Chip Assembly |
JP5585354B2 (ja) * | 2010-09-29 | 2014-09-10 | 凸版印刷株式会社 | 半導体パッケージの製造方法 |
US9238278B2 (en) | 2011-03-29 | 2016-01-19 | Panasonic Intellectual Property Management Co., Ltd. | Solder transfer substrate, manufacturing method of solder transfer substrate, and solder transfer method |
US8921221B2 (en) | 2011-06-20 | 2014-12-30 | International Business Machines Corporation | IMS (injection molded solder) with two resist layers forming solder bumps on substrates |
JP6044441B2 (ja) * | 2013-04-26 | 2016-12-14 | 株式会社デンソー | 電子装置の製造方法およびこれに用いられる多層基板 |
JP6412377B2 (ja) * | 2013-09-11 | 2018-10-24 | 花王株式会社 | 樹脂マスク層用洗浄剤組成物及び回路基板の製造方法 |
JP6260441B2 (ja) * | 2014-04-30 | 2018-01-17 | 旭硝子株式会社 | 樹脂層の除去方法 |
KR102041929B1 (ko) * | 2015-09-01 | 2019-11-07 | 동우 화인켐 주식회사 | 감광성 수지 조성물 및 이로부터 형성된 광경화 패턴 |
CN106324922A (zh) * | 2016-08-29 | 2017-01-11 | 贵州乾萃科技有限公司 | 一种在基片上快速制备所需形状功能电极层的方法 |
CN106211598B (zh) * | 2016-08-31 | 2019-01-18 | 广东成德电子科技股份有限公司 | 一种印制电路板的有机退膜剂及其制备方法 |
JP6924690B2 (ja) * | 2017-12-21 | 2021-08-25 | 花王株式会社 | 樹脂マスク剥離洗浄方法 |
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JPH1098257A (ja) * | 1996-09-19 | 1998-04-14 | Ibiden Co Ltd | 半田バンプ形成基板の製造方法 |
JPH11191673A (ja) * | 1997-12-25 | 1999-07-13 | Victor Co Of Japan Ltd | はんだプリコート方法 |
JP3423930B2 (ja) * | 1999-12-27 | 2003-07-07 | 富士通株式会社 | バンプ形成方法、電子部品、および半田ペースト |
JP2001230531A (ja) * | 2000-02-21 | 2001-08-24 | Cmk Corp | 電子部品の実装方法 |
JP4081977B2 (ja) * | 2000-12-11 | 2008-04-30 | 富士通株式会社 | プリント配線板の製造方法 |
JP3556922B2 (ja) * | 2001-05-07 | 2004-08-25 | 富士通株式会社 | バンプ形成方法 |
JP2003076016A (ja) * | 2001-09-07 | 2003-03-14 | Nichigo Morton Co Ltd | 感光性樹脂組成物及びそれを用いたドライフィルム |
KR100474098B1 (ko) * | 2001-09-12 | 2005-03-07 | 주식회사 덕성 | 감광성수지 세정용 시너 조성물 |
JP3820545B2 (ja) * | 2001-12-04 | 2006-09-13 | ソニー株式会社 | レジスト剥離用組成物及びそれを用いた半導体装置の製造方法 |
JP3918647B2 (ja) * | 2002-06-13 | 2007-05-23 | 日立化成工業株式会社 | 感光性樹脂組成物、これを用いた感光性エレメント、レジストパターンの形成方法及びプリント配線板の製造方法 |
JP4094982B2 (ja) | 2003-04-15 | 2008-06-04 | ハリマ化成株式会社 | はんだ析出方法およびはんだバンプ形成方法 |
JP4641732B2 (ja) | 2004-03-23 | 2011-03-02 | 旭化成イーマテリアルズ株式会社 | 感光性樹脂組成物 |
-
2004
- 2004-10-15 JP JP2004301270A patent/JP4855667B2/ja active Active
-
2005
- 2005-09-30 KR KR1020050091968A patent/KR101143071B1/ko active IP Right Grant
- 2005-10-13 US US11/248,183 patent/US7291517B2/en active Active
- 2005-10-13 TW TW094135777A patent/TWI398203B/zh not_active IP Right Cessation
- 2005-10-14 CN CNB2005101135083A patent/CN100551207C/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
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TWI398203B (zh) | 2013-06-01 |
KR20060051910A (ko) | 2006-05-19 |
CN100551207C (zh) | 2009-10-14 |
JP2006114735A (ja) | 2006-04-27 |
KR101143071B1 (ko) | 2012-05-08 |
JP4855667B2 (ja) | 2012-01-18 |
US7291517B2 (en) | 2007-11-06 |
US20060110907A1 (en) | 2006-05-25 |
CN1764350A (zh) | 2006-04-26 |
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