TW200619874A - Method for removing the mask layer of resin and method for manufacturing the substrate with solder bump - Google Patents

Method for removing the mask layer of resin and method for manufacturing the substrate with solder bump

Info

Publication number
TW200619874A
TW200619874A TW094135777A TW94135777A TW200619874A TW 200619874 A TW200619874 A TW 200619874A TW 094135777 A TW094135777 A TW 094135777A TW 94135777 A TW94135777 A TW 94135777A TW 200619874 A TW200619874 A TW 200619874A
Authority
TW
Taiwan
Prior art keywords
mask layer
substrate
resin mask
solder
resin
Prior art date
Application number
TW094135777A
Other languages
English (en)
Other versions
TWI398203B (zh
Inventor
Hitoshi Sakurai
Kimihiro Abe
Norio Matsumoto
Original Assignee
Harima Chemicals Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Harima Chemicals Inc filed Critical Harima Chemicals Inc
Publication of TW200619874A publication Critical patent/TW200619874A/zh
Application granted granted Critical
Publication of TWI398203B publication Critical patent/TWI398203B/zh

Links

Classifications

    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26Processing photosensitive materials; Apparatus therefor
    • G03F7/42Stripping or agents therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23FNON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F1/00Etching metallic material by chemical means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31127Etching organic layers
    • H01L21/31133Etching organic layers by chemical means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/11Manufacturing methods
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457Solder materials or compositions; Methods of application thereof
    • H05K3/3485Applying solder paste, slurry or powder
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0556Disposition
    • H01L2224/05567Disposition the external layer being at least partially embedded in the surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05573Single external layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/1147Manufacturing methods using a lift-off mask
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01011Sodium [Na]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01015Phosphorus [P]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01019Potassium [K]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01027Cobalt [Co]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01074Tungsten [W]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04Soldering or other types of metallurgic bonding
    • H05K2203/043Reflowing of solder coated conductors, not during connection of components, e.g. reflowing solder paste
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05Patterning and lithography; Masks; Details of resist
    • H05K2203/0562Details of resist
    • H05K2203/0568Resist used for applying paste, ink or powder
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0756Uses of liquids, e.g. rinsing, coating, dissolving
    • H05K2203/0769Dissolving insulating materials, e.g. coatings, not used for developing resist after exposure

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • General Chemical & Material Sciences (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
TW094135777A 2004-10-15 2005-10-13 樹脂掩膜層的除去方法和帶焊錫突起的基板的製造方法 TWI398203B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004301270A JP4855667B2 (ja) 2004-10-15 2004-10-15 樹脂マスク層の除去方法およびはんだバンプ付き基板の製造方法

Publications (2)

Publication Number Publication Date
TW200619874A true TW200619874A (en) 2006-06-16
TWI398203B TWI398203B (zh) 2013-06-01

Family

ID=36382997

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094135777A TWI398203B (zh) 2004-10-15 2005-10-13 樹脂掩膜層的除去方法和帶焊錫突起的基板的製造方法

Country Status (5)

Country Link
US (1) US7291517B2 (zh)
JP (1) JP4855667B2 (zh)
KR (1) KR101143071B1 (zh)
CN (1) CN100551207C (zh)
TW (1) TWI398203B (zh)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4094982B2 (ja) * 2003-04-15 2008-06-04 ハリマ化成株式会社 はんだ析出方法およびはんだバンプ形成方法
JP2007184539A (ja) * 2005-12-07 2007-07-19 Denso Corp 加工品の製造方法
US7517788B2 (en) * 2005-12-29 2009-04-14 Intel Corporation System, apparatus, and method for advanced solder bumping
JP4219951B2 (ja) * 2006-10-25 2009-02-04 新光電気工業株式会社 はんだボール搭載方法及びはんだボール搭載基板の製造方法
JP2008147458A (ja) * 2006-12-11 2008-06-26 Nec Electronics Corp プリント配線板およびその製造方法
TWI316381B (en) * 2007-01-24 2009-10-21 Phoenix Prec Technology Corp Circuit board and fabrication method thereof
JP2008218552A (ja) * 2007-03-01 2008-09-18 Nec Corp 電子部品の実装基板および実装方法
CN101827928B (zh) * 2007-08-08 2012-10-03 荒川化学工业株式会社 用于除去无铅助焊剂的清洁剂组合物以及用于除去无铅助焊剂的方法
JP5076749B2 (ja) * 2007-09-03 2012-11-21 株式会社日立プラントテクノロジー シート印刷システム
US8938135B2 (en) * 2007-09-19 2015-01-20 Hitachi Chemical Company, Ltd. Method for manufacturing optical waveguide and optical waveguide manufactured by the method
KR100900681B1 (ko) * 2007-11-28 2009-06-01 삼성전기주식회사 솔더 범프 형성방법
KR101364538B1 (ko) * 2007-12-12 2014-02-18 삼성전자주식회사 적어도 2종의 전자 부품들의 실장 방법 및 실장 장치
KR101069980B1 (ko) 2009-09-15 2011-10-04 삼성전기주식회사 솔더 범프 형성 방법
US20110169158A1 (en) * 2010-01-14 2011-07-14 Qualcomm Incorporated Solder Pillars in Flip Chip Assembly
JP5585354B2 (ja) * 2010-09-29 2014-09-10 凸版印刷株式会社 半導体パッケージの製造方法
US9238278B2 (en) 2011-03-29 2016-01-19 Panasonic Intellectual Property Management Co., Ltd. Solder transfer substrate, manufacturing method of solder transfer substrate, and solder transfer method
US8921221B2 (en) 2011-06-20 2014-12-30 International Business Machines Corporation IMS (injection molded solder) with two resist layers forming solder bumps on substrates
JP6044441B2 (ja) * 2013-04-26 2016-12-14 株式会社デンソー 電子装置の製造方法およびこれに用いられる多層基板
JP6412377B2 (ja) * 2013-09-11 2018-10-24 花王株式会社 樹脂マスク層用洗浄剤組成物及び回路基板の製造方法
JP6260441B2 (ja) * 2014-04-30 2018-01-17 旭硝子株式会社 樹脂層の除去方法
KR102041929B1 (ko) * 2015-09-01 2019-11-07 동우 화인켐 주식회사 감광성 수지 조성물 및 이로부터 형성된 광경화 패턴
CN106324922A (zh) * 2016-08-29 2017-01-11 贵州乾萃科技有限公司 一种在基片上快速制备所需形状功能电极层的方法
CN106211598B (zh) * 2016-08-31 2019-01-18 广东成德电子科技股份有限公司 一种印制电路板的有机退膜剂及其制备方法
JP6924690B2 (ja) * 2017-12-21 2021-08-25 花王株式会社 樹脂マスク剥離洗浄方法

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3281436B2 (ja) 1993-02-24 2002-05-13 日立化成工業株式会社 水溶性レジストの剥離方法及び剥離液
JP2944416B2 (ja) 1994-04-19 1999-09-06 三洋電機株式会社 混成集積回路の製造方法
JPH1098257A (ja) * 1996-09-19 1998-04-14 Ibiden Co Ltd 半田バンプ形成基板の製造方法
JPH11191673A (ja) * 1997-12-25 1999-07-13 Victor Co Of Japan Ltd はんだプリコート方法
JP3423930B2 (ja) * 1999-12-27 2003-07-07 富士通株式会社 バンプ形成方法、電子部品、および半田ペースト
JP2001230531A (ja) * 2000-02-21 2001-08-24 Cmk Corp 電子部品の実装方法
JP4081977B2 (ja) * 2000-12-11 2008-04-30 富士通株式会社 プリント配線板の製造方法
JP3556922B2 (ja) * 2001-05-07 2004-08-25 富士通株式会社 バンプ形成方法
JP2003076016A (ja) * 2001-09-07 2003-03-14 Nichigo Morton Co Ltd 感光性樹脂組成物及びそれを用いたドライフィルム
KR100474098B1 (ko) * 2001-09-12 2005-03-07 주식회사 덕성 감광성수지 세정용 시너 조성물
JP3820545B2 (ja) * 2001-12-04 2006-09-13 ソニー株式会社 レジスト剥離用組成物及びそれを用いた半導体装置の製造方法
JP3918647B2 (ja) * 2002-06-13 2007-05-23 日立化成工業株式会社 感光性樹脂組成物、これを用いた感光性エレメント、レジストパターンの形成方法及びプリント配線板の製造方法
JP4094982B2 (ja) 2003-04-15 2008-06-04 ハリマ化成株式会社 はんだ析出方法およびはんだバンプ形成方法
JP4641732B2 (ja) 2004-03-23 2011-03-02 旭化成イーマテリアルズ株式会社 感光性樹脂組成物

Also Published As

Publication number Publication date
TWI398203B (zh) 2013-06-01
KR20060051910A (ko) 2006-05-19
CN100551207C (zh) 2009-10-14
JP2006114735A (ja) 2006-04-27
KR101143071B1 (ko) 2012-05-08
JP4855667B2 (ja) 2012-01-18
US7291517B2 (en) 2007-11-06
US20060110907A1 (en) 2006-05-25
CN1764350A (zh) 2006-04-26

Similar Documents

Publication Publication Date Title
TW200619874A (en) Method for removing the mask layer of resin and method for manufacturing the substrate with solder bump
TWI227550B (en) Semiconductor device manufacturing method
FI20020191A0 (fi) Menetelmõ komponentin upottamiseksi alustaan
TW200629416A (en) Semiconductor device and fabrication method thereof
TW200705632A (en) Method for forming high reliability bump structure
TW200625535A (en) Method for manufacturing semiconductor device, and semiconductor device and electronic device
TWI266357B (en) Pattern forming method and method for manufacturing semiconductor device
WO2006036368A3 (en) Composition and process for ashless removal of post-etch photoresist and/or bottom anti-reflective material on a substrate
ATE531242T1 (de) Verfahren zur herstellung eines elektronsichen moduls und elektronisches modul
TW200633089A (en) Conductive bump structure of circuit board and method for fabricating the same
CN101882596B (zh) 金属层的刻蚀方法
TW200520219A (en) Manufacturing method for semiconductor device and semiconductor device
JP2012160500A5 (zh)
EP1670040A4 (en) PROJECTION DEVICE, CORRESPONDING METHOD, AND DEVICE MANUFACTURING METHOD
MX2007003615A (es) Circuito integrado y metodo de fabricacion.
TW200616212A (en) Method for manufacturing thin film integrated circuit
WO2008073432A3 (en) No flow underfill process, composition, and reflow carrier
EP1388890A4 (en) METHOD FOR MANUFACTURING AN ELECTRONIC COMPONENT
KR20160001827A (ko) 인쇄회로기판 제조방법
TW200633061A (en) Method for etching dielectric material in semiconductor device
EP1349206A3 (en) Power module member manufactured by wet treatment, and wet treatment method and wet treatment equipment thereof
CN113923878A (zh) 一种厚铜线路板阻焊工艺制作方法及线路板
TWI411366B (zh) 高密度通孔的塞孔方法
US8450148B2 (en) Molding compound adhesion for map-molded flip-chip
FR2866753A1 (fr) Dispositif microelectronique d'interconnexion a tiges conductrices localisees

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees