TW200507218A - Layout circuit substrate, manufacturing method of layout circuit substrate, and circuit module - Google Patents
Layout circuit substrate, manufacturing method of layout circuit substrate, and circuit moduleInfo
- Publication number
- TW200507218A TW200507218A TW093107787A TW93107787A TW200507218A TW 200507218 A TW200507218 A TW 200507218A TW 093107787 A TW093107787 A TW 093107787A TW 93107787 A TW93107787 A TW 93107787A TW 200507218 A TW200507218 A TW 200507218A
- Authority
- TW
- Taiwan
- Prior art keywords
- layout
- circuit substrate
- bump
- layout circuit
- substrate
- Prior art date
Links
- 239000000758 substrate Substances 0.000 title abstract 8
- 238000004519 manufacturing process Methods 0.000 title 1
- 230000004888 barrier function Effects 0.000 abstract 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 abstract 2
- 229910000679 solder Inorganic materials 0.000 abstract 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract 1
- 229910052802 copper Inorganic materials 0.000 abstract 1
- 239000010949 copper Substances 0.000 abstract 1
- 229910052759 nickel Inorganic materials 0.000 abstract 1
- 230000000149 penetrating effect Effects 0.000 abstract 1
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
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- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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- H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
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- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
- H05K3/4655—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern by using a laminate characterized by the insulating layer
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49204—Contact or terminal manufacturing
- Y10T29/49208—Contact or terminal manufacturing by assembling plural parts
- Y10T29/4921—Contact or terminal manufacturing by assembling plural parts with bonding
- Y10T29/49211—Contact or terminal manufacturing by assembling plural parts with bonding of fused material
- Y10T29/49213—Metal
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Metallurgy (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
- Wire Bonding (AREA)
- Combinations Of Printed Boards (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003095167 | 2003-03-31 | ||
JP2003118182 | 2003-04-23 | ||
JP2003192192 | 2003-07-04 | ||
JP2003289319A JP2005045191A (ja) | 2003-07-04 | 2003-08-07 | 配線回路基板の製造方法、及び多層配線基板の製造方法 |
JP2003307897A JP2004343030A (ja) | 2003-03-31 | 2003-08-29 | 配線回路基板とその製造方法とその配線回路基板を備えた回路モジュール |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200507218A true TW200507218A (en) | 2005-02-16 |
TWI333687B TWI333687B (zh) | 2010-11-21 |
Family
ID=33136255
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW093107787A TW200507218A (en) | 2003-03-31 | 2004-03-23 | Layout circuit substrate, manufacturing method of layout circuit substrate, and circuit module |
Country Status (5)
Country | Link |
---|---|
US (2) | US20040201096A1 (zh) |
KR (1) | KR20040086783A (zh) |
CN (1) | CN100542375C (zh) |
HK (1) | HK1073965A1 (zh) |
TW (1) | TW200507218A (zh) |
Families Citing this family (51)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW512467B (en) * | 1999-10-12 | 2002-12-01 | North Kk | Wiring circuit substrate and manufacturing method therefor |
TW200507131A (en) | 2003-07-02 | 2005-02-16 | North Corp | Multi-layer circuit board for electronic device |
US8641913B2 (en) * | 2003-10-06 | 2014-02-04 | Tessera, Inc. | Fine pitch microcontacts and method for forming thereof |
US7495179B2 (en) * | 2003-10-06 | 2009-02-24 | Tessera, Inc. | Components with posts and pads |
JP2005181066A (ja) * | 2003-12-18 | 2005-07-07 | Denso Corp | 圧力センサ |
US7709968B2 (en) | 2003-12-30 | 2010-05-04 | Tessera, Inc. | Micro pin grid array with pin motion isolation |
US7902678B2 (en) * | 2004-03-29 | 2011-03-08 | Nec Corporation | Semiconductor device and manufacturing method thereof |
US7129567B2 (en) * | 2004-08-31 | 2006-10-31 | Micron Technology, Inc. | Substrate, semiconductor die, multichip module, and system including a via structure comprising a plurality of conductive elements |
SG135065A1 (en) * | 2006-02-20 | 2007-09-28 | Micron Technology Inc | Conductive vias having two or more elements for providing communication between traces in different substrate planes, semiconductor device assemblies including such vias, and accompanying methods |
WO2006098207A1 (en) * | 2005-03-14 | 2006-09-21 | Ricoh Company, Ltd. | Multilayer wiring structure and method of manufacturing the same |
US7521705B2 (en) * | 2005-08-15 | 2009-04-21 | Micron Technology, Inc. | Reproducible resistance variable insulating memory devices having a shaped bottom electrode |
KR20080037681A (ko) * | 2005-08-23 | 2008-04-30 | 로무 가부시키가이샤 | 반도체 칩 및 그 제조 방법 및 반도체 장치 |
TWI284949B (en) * | 2005-09-09 | 2007-08-01 | Chipmos Technologies Inc | Bumped structure and its forming method |
KR100714580B1 (ko) * | 2005-11-03 | 2007-05-07 | 삼성전기주식회사 | 박막 커패시터 내장된 인쇄회로기판 제조방법 및 그로부터제조된 인쇄회로기판 |
US8067267B2 (en) * | 2005-12-23 | 2011-11-29 | Tessera, Inc. | Microelectronic assemblies having very fine pitch stacking |
US7632708B2 (en) * | 2005-12-27 | 2009-12-15 | Tessera, Inc. | Microelectronic component with photo-imageable substrate |
US20160343593A1 (en) * | 2006-05-10 | 2016-11-24 | Amkor Technology, Inc. | Semiconductor package including premold and method of manufacturing the same |
KR100733814B1 (ko) * | 2006-05-23 | 2007-07-02 | 삼성전기주식회사 | 인쇄회로기판 제조방법 |
US20080116587A1 (en) * | 2006-11-16 | 2008-05-22 | Chun Ho Fan | Conductor polymer composite carrier with isoproperty conductive columns |
US20080160752A1 (en) * | 2007-01-03 | 2008-07-03 | International Business Machines Corporation | Method for chip to package interconnect |
CN105140134A (zh) | 2007-09-28 | 2015-12-09 | 泰塞拉公司 | 利用成对凸柱进行倒装芯片互连 |
US20100044860A1 (en) * | 2008-08-21 | 2010-02-25 | Tessera Interconnect Materials, Inc. | Microelectronic substrate or element having conductive pads and metal posts joined thereto using bond layer |
JP5184335B2 (ja) * | 2008-12-26 | 2013-04-17 | 株式会社フジクラ | プリント配線板およびその製造方法、プリント配線板の接続方法 |
JP2010238996A (ja) * | 2009-03-31 | 2010-10-21 | Sanyo Electric Co Ltd | 半導体モジュールの製造方法 |
CN102222625A (zh) * | 2010-04-16 | 2011-10-19 | 展晶科技(深圳)有限公司 | 发光二极管封装结构及其基座的制造方法 |
US8330272B2 (en) | 2010-07-08 | 2012-12-11 | Tessera, Inc. | Microelectronic packages with dual or multiple-etched flip-chip connectors |
US8580607B2 (en) | 2010-07-27 | 2013-11-12 | Tessera, Inc. | Microelectronic packages with nanoparticle joining |
KR101167429B1 (ko) | 2010-10-11 | 2012-07-19 | 삼성전기주식회사 | 반도체 패키지의 제조방법 |
US8853558B2 (en) | 2010-12-10 | 2014-10-07 | Tessera, Inc. | Interconnect structure |
KR20120124319A (ko) * | 2011-05-03 | 2012-11-13 | 엘지이노텍 주식회사 | 인쇄회로기판 및 그의 제조 방법 |
KR20130050057A (ko) * | 2011-11-07 | 2013-05-15 | 삼성전기주식회사 | 코일 부품의 제조 방법 |
CN103887181B (zh) * | 2012-12-20 | 2017-10-10 | 深南电路有限公司 | 引线框架加工方法 |
CN103887180B (zh) * | 2012-12-20 | 2016-09-28 | 深南电路有限公司 | 引线框架加工方法 |
CN103887179B (zh) * | 2012-12-20 | 2017-10-10 | 深南电路有限公司 | 引线框架加工方法 |
JP5903495B2 (ja) * | 2013-02-12 | 2016-04-13 | 株式会社シンク・ラボラトリー | 連続メッキ用パターニングロールの製造方法 |
US9365947B2 (en) | 2013-10-04 | 2016-06-14 | Invensas Corporation | Method for preparing low cost substrates |
JP6219155B2 (ja) | 2013-12-13 | 2017-10-25 | 東芝メモリ株式会社 | 半導体装置の製造方法 |
JP2015115552A (ja) | 2013-12-13 | 2015-06-22 | 株式会社東芝 | 半導体装置およびその製造方法 |
JP6199724B2 (ja) * | 2013-12-13 | 2017-09-20 | 東芝メモリ株式会社 | 半導体装置の製造方法 |
JP6130312B2 (ja) * | 2014-02-10 | 2017-05-17 | 新光電気工業株式会社 | 半導体装置及びその製造方法 |
CN104576587A (zh) * | 2015-01-22 | 2015-04-29 | 中国电子科技集团公司第四十三研究所 | 一种封装用凸点结构 |
US10886250B2 (en) | 2015-07-10 | 2021-01-05 | Invensas Corporation | Structures and methods for low temperature bonding using nanoparticles |
US9633971B2 (en) | 2015-07-10 | 2017-04-25 | Invensas Corporation | Structures and methods for low temperature bonding using nanoparticles |
JP6541530B2 (ja) * | 2015-09-24 | 2019-07-10 | 三ツ星ベルト株式会社 | ビア充填基板並びにその製造方法及び前駆体 |
US10242927B2 (en) * | 2015-12-31 | 2019-03-26 | Mediatek Inc. | Semiconductor package, semiconductor device using the same and manufacturing method thereof |
CN107809852A (zh) * | 2016-09-08 | 2018-03-16 | 鹏鼎控股(深圳)股份有限公司 | 无导线表面电镀方法及由该方法制得的电路板 |
TWI822659B (zh) | 2016-10-27 | 2023-11-21 | 美商艾德亞半導體科技有限責任公司 | 用於低溫接合的結構和方法 |
TWI691407B (zh) * | 2017-05-25 | 2020-04-21 | 日商新川股份有限公司 | 結構體的製造方法及結構體 |
JP6897318B2 (ja) * | 2017-05-26 | 2021-06-30 | 凸版印刷株式会社 | Icモジュール、icカード、およびそれらの製造方法 |
TWI693872B (zh) | 2018-10-29 | 2020-05-11 | 欣興電子股份有限公司 | 電路板製造方法 |
US20240079307A1 (en) * | 2022-09-07 | 2024-03-07 | Qualcomm Incorporated | Package comprising a substrate with post interconnects having a profile cross section of a trapezoid shape |
Family Cites Families (32)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3606677A (en) * | 1967-12-26 | 1971-09-21 | Rca Corp | Multilayer circuit board techniques |
US4631100A (en) * | 1983-01-10 | 1986-12-23 | Pellegrino Peter P | Method and apparatus for mass producing printed circuit boards |
US5011580A (en) * | 1989-10-24 | 1991-04-30 | Microelectronics And Computer Technology Corporation | Method of reworking an electrical multilayer interconnect |
US5219787A (en) * | 1990-07-23 | 1993-06-15 | Microelectronics And Computer Technology Corporation | Trenching techniques for forming channels, vias and components in substrates |
EP0545328B1 (en) * | 1991-11-29 | 1997-03-19 | Hitachi Chemical Co., Ltd. | Printed circuit board manufacturing process |
US5440805A (en) * | 1992-03-09 | 1995-08-15 | Rogers Corporation | Method of manufacturing a multilayer circuit |
US5199163A (en) * | 1992-06-01 | 1993-04-06 | International Business Machines Corporation | Metal transfer layers for parallel processing |
US5329695A (en) * | 1992-09-01 | 1994-07-19 | Rogers Corporation | Method of manufacturing a multilayer circuit board |
US5914614A (en) * | 1996-03-12 | 1999-06-22 | International Business Machines Corporation | High density cantilevered probe for electronic devices |
US6703565B1 (en) * | 1996-09-06 | 2004-03-09 | Matsushita Electric Industrial Co., Ltd. | Printed wiring board |
US5878487A (en) * | 1996-09-19 | 1999-03-09 | Ford Motor Company | Method of supporting an electrical circuit on an electrically insulative base substrate |
US6262478B1 (en) * | 1997-04-08 | 2001-07-17 | Amitec-Advanced Multilayer Interconnect Technologies Ltd. | Electronic interconnect structure and method for manufacturing it |
US6015520A (en) * | 1997-05-15 | 2000-01-18 | International Business Machines Corporation | Method for filling holes in printed wiring boards |
JP3961092B2 (ja) * | 1997-06-03 | 2007-08-15 | 株式会社東芝 | 複合配線基板、フレキシブル基板、半導体装置、および複合配線基板の製造方法 |
JP4110303B2 (ja) * | 1998-06-02 | 2008-07-02 | 沖電気工業株式会社 | 樹脂封止型半導体装置の製造方法 |
US6050832A (en) * | 1998-08-07 | 2000-04-18 | Fujitsu Limited | Chip and board stress relief interposer |
JP2000101245A (ja) * | 1998-09-24 | 2000-04-07 | Ngk Spark Plug Co Ltd | 積層樹脂配線基板及びその製造方法 |
US6081026A (en) * | 1998-11-13 | 2000-06-27 | Fujitsu Limited | High density signal interposer with power and ground wrap |
IL128200A (en) * | 1999-01-24 | 2003-11-23 | Amitec Advanced Multilayer Int | Chip carrier substrate |
WO2000070670A1 (en) * | 1999-05-12 | 2000-11-23 | Hitachi, Ltd. | Semiconductor device and method for manufacturing the same, and electronic device |
US6204089B1 (en) * | 1999-05-14 | 2001-03-20 | Industrial Technology Research Institute | Method for forming flip chip package utilizing cone shaped bumps |
US6376769B1 (en) * | 1999-05-18 | 2002-04-23 | Amerasia International Technology, Inc. | High-density electronic package, and method for making same |
EP1107307B1 (en) * | 1999-06-15 | 2005-09-07 | Fujikura Ltd. | Semiconductor package, semiconductor device, electronic device, and method of manufacturing semiconductor package |
TW512467B (en) * | 1999-10-12 | 2002-12-01 | North Kk | Wiring circuit substrate and manufacturing method therefor |
JP3451373B2 (ja) * | 1999-11-24 | 2003-09-29 | オムロン株式会社 | 電磁波読み取り可能なデータキャリアの製造方法 |
US6900534B2 (en) * | 2000-03-16 | 2005-05-31 | Texas Instruments Incorporated | Direct attach chip scale package |
JP3597754B2 (ja) * | 2000-04-24 | 2004-12-08 | Necエレクトロニクス株式会社 | 半導体装置及びその製造方法 |
JP3634735B2 (ja) * | 2000-10-05 | 2005-03-30 | 三洋電機株式会社 | 半導体装置および半導体モジュール |
US6624501B2 (en) * | 2001-01-26 | 2003-09-23 | Fujitsu Limited | Capacitor and semiconductor device |
JP2003051569A (ja) * | 2001-08-03 | 2003-02-21 | Seiko Epson Corp | 半導体装置及びその製造方法 |
KR20030029743A (ko) * | 2001-10-10 | 2003-04-16 | 삼성전자주식회사 | 플랙서블한 이중 배선기판을 이용한 적층 패키지 |
US6975035B2 (en) * | 2002-03-04 | 2005-12-13 | Micron Technology, Inc. | Method and apparatus for dielectric filling of flip chip on interposer assembly |
-
2004
- 2004-03-23 TW TW093107787A patent/TW200507218A/zh not_active IP Right Cessation
- 2004-03-30 KR KR1020040021668A patent/KR20040086783A/ko not_active Application Discontinuation
- 2004-03-30 US US10/812,349 patent/US20040201096A1/en not_active Abandoned
- 2004-03-31 CN CNB2004100318947A patent/CN100542375C/zh not_active Expired - Fee Related
-
2005
- 2005-07-25 HK HK05106338.3A patent/HK1073965A1/xx not_active IP Right Cessation
-
2010
- 2010-02-16 US US12/658,926 patent/US20100242270A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
TWI333687B (zh) | 2010-11-21 |
US20100242270A1 (en) | 2010-09-30 |
HK1073965A1 (en) | 2005-10-21 |
CN1571621A (zh) | 2005-01-26 |
US20040201096A1 (en) | 2004-10-14 |
CN100542375C (zh) | 2009-09-16 |
KR20040086783A (ko) | 2004-10-12 |
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MM4A | Annulment or lapse of patent due to non-payment of fees |