TW200418180A - Narrow fin finFET - Google Patents
Narrow fin finFET Download PDFInfo
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- TW200418180A TW200418180A TW093101517A TW93101517A TW200418180A TW 200418180 A TW200418180 A TW 200418180A TW 093101517 A TW093101517 A TW 093101517A TW 93101517 A TW93101517 A TW 93101517A TW 200418180 A TW200418180 A TW 200418180A
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- finfet
- mosfet
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- 239000010410 layer Substances 0.000 claims description 134
- 238000000034 method Methods 0.000 claims description 22
- 239000011241 protective layer Substances 0.000 claims description 19
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 18
- 239000004065 semiconductor Substances 0.000 claims description 12
- 150000004767 nitrides Chemical class 0.000 claims description 9
- 230000005669 field effect Effects 0.000 claims description 4
- 229910044991 metal oxide Inorganic materials 0.000 claims description 3
- 150000004706 metal oxides Chemical class 0.000 claims description 3
- VHUUQVKOLVNVRT-UHFFFAOYSA-N Ammonium hydroxide Chemical compound [NH4+].[OH-] VHUUQVKOLVNVRT-UHFFFAOYSA-N 0.000 abstract 1
- 235000011114 ammonium hydroxide Nutrition 0.000 abstract 1
- 150000002500 ions Chemical class 0.000 abstract 1
- 239000004575 stone Substances 0.000 description 12
- 229910021332 silicide Inorganic materials 0.000 description 10
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 9
- 229910052751 metal Inorganic materials 0.000 description 9
- 239000002184 metal Substances 0.000 description 9
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 8
- 229910052710 silicon Inorganic materials 0.000 description 8
- 239000010703 silicon Substances 0.000 description 8
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 7
- -1 button Chemical compound 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 5
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 4
- 238000000137 annealing Methods 0.000 description 4
- 238000000151 deposition Methods 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 238000005468 ion implantation Methods 0.000 description 4
- 230000000873 masking effect Effects 0.000 description 4
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 4
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 3
- 229910052796 boron Inorganic materials 0.000 description 3
- 229910017052 cobalt Inorganic materials 0.000 description 3
- 239000010941 cobalt Substances 0.000 description 3
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 3
- 229920002120 photoresistant polymer Polymers 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- PEDCQBHIVMGVHV-UHFFFAOYSA-N Glycerine Chemical compound OCC(O)CO PEDCQBHIVMGVHV-UHFFFAOYSA-N 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- 229910052772 Samarium Inorganic materials 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 229910052750 molybdenum Inorganic materials 0.000 description 2
- 239000011733 molybdenum Substances 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 229910052697 platinum Inorganic materials 0.000 description 2
- KZUNJOHGWZRPMI-UHFFFAOYSA-N samarium atom Chemical compound [Sm] KZUNJOHGWZRPMI-UHFFFAOYSA-N 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- ZXEYZECDXFPJRJ-UHFFFAOYSA-N $l^{3}-silane;platinum Chemical compound [SiH3].[Pt] ZXEYZECDXFPJRJ-UHFFFAOYSA-N 0.000 description 1
- ZSLUVFAKFWKJRC-IGMARMGPSA-N 232Th Chemical compound [232Th] ZSLUVFAKFWKJRC-IGMARMGPSA-N 0.000 description 1
- XFXPMWWXUTWYJX-UHFFFAOYSA-N Cyanide Chemical compound N#[C-] XFXPMWWXUTWYJX-UHFFFAOYSA-N 0.000 description 1
- 229910052688 Gadolinium Inorganic materials 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 229910019142 PO4 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 229910052776 Thorium Inorganic materials 0.000 description 1
- 229910052770 Uranium Inorganic materials 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 239000000839 emulsion Substances 0.000 description 1
- UIWYJDYFSGRHKR-UHFFFAOYSA-N gadolinium atom Chemical compound [Gd] UIWYJDYFSGRHKR-UHFFFAOYSA-N 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 230000005722 itchiness Effects 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000008267 milk Substances 0.000 description 1
- 210000004080 milk Anatomy 0.000 description 1
- 235000013336 milk Nutrition 0.000 description 1
- 238000005121 nitriding Methods 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- NBIIXXVUZAFLBC-UHFFFAOYSA-K phosphate Chemical compound [O-]P([O-])([O-])=O NBIIXXVUZAFLBC-UHFFFAOYSA-K 0.000 description 1
- 239000010452 phosphate Substances 0.000 description 1
- 229910021339 platinum silicide Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 229910052761 rare earth metal Inorganic materials 0.000 description 1
- 150000002910 rare earth metals Chemical class 0.000 description 1
- 229910052702 rhenium Inorganic materials 0.000 description 1
- WUAPFZMCVAUBPE-UHFFFAOYSA-N rhenium atom Chemical compound [Re] WUAPFZMCVAUBPE-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- JFALSRSLKYAFGM-UHFFFAOYSA-N uranium(0) Chemical compound [U] JFALSRSLKYAFGM-UHFFFAOYSA-N 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
- 239000002023 wood Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/785—Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66787—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel
- H01L29/66795—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
- H01L29/66818—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET the channel being thinned after patterning, e.g. sacrificial oxidation on fin
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78684—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising semiconductor materials of Group IV not being silicon, or alloys including an element of the group IV, e.g. Ge, SiN alloys, SiC alloys
- H01L29/78687—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising semiconductor materials of Group IV not being silicon, or alloys including an element of the group IV, e.g. Ge, SiN alloys, SiC alloys with a multilayer structure or superlattice structure
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Description
200418180 玖、發明說明 【發明所屬之技術領域】 本發明係大致有關於一種半導體裝置及製造半導體 裝置之方法，尤係有關雙閘極金屬氧化物半導體場效電 晶體（Metal Oxide Semiconductor Field Effect
Transistor ;簡稱 MOSFET)。 【先前技術】
諸如MOSFET等的電晶體是大多數半導體裝置的核 心建構單元。諸如高效能處理器等的某些半導體裝置可 包含數百萬個電晶體。對於這些裝置而言，減小電晶體 的尺寸並因而增加電晶體的密度在傳統上已是半導體製 造領域中之一高優先項目。 傳統的MOSFET在尺寸小於50奈米的製程上有其 困難度。為了開發小於50奈米的MOSFET，已有人提議 雙閘極MOSFET、。在數個方面中，雙閘極MOSFET提供 了比傳統塊狀（bulk)矽MOSFET更佳的性能。因為雙閘 極MOSFET在通道的兩邊都有一閘電極，並非是如同傳 統的MOSFET只在一邊有閘電極，故有了這些改良。 【發明内容】 根據本發明的實施例提供了一種具有一窄通道區之 雙閘極MOSFET及其製造方法。 本發明的一個面向係有關一種MOSFET裝置，該 MOSFET裝置包含在絕緣層上形成的源極及汲極結構。 在該絕緣層上且在該源極與汲極之間形成一鰭片結構。 6 92531 200418180 該鰭片結構包含在該鰭片結構的通道區中形成之削薄 區。至少在該鰭片結構的該削薄區之上形成保護層。該 保護層的寬度大於該削薄區的寬度。在該鰭片結構的至 少一部分周圍形成介電層，且在該介電層及該鰭片結構 周圍形成閑極。 本發明的另一面向係有關一種形成MOSFET裝置的 方法。該方法包含下列步驟：在絕緣層上形成源極、沒 極、及鰭片結構。該鰭片結構的各部分係用來作為該 MOSFET的通道。該方法進一步包含下列步驟：在該籍 片結構之上形成保護層；以及將該鰭片結構削減到大約 3示米至6奈米的寬度，但並不顯著地削減該保護層。 該方法進一步包含下列步驟：在該鰭片結構周圍生長介 電層；以及在該介電層周圍沈積多晶矽層。該多晶石夕層 係用來作為該MOSFET的閘極區。 【實施方式】 下文中對本發明的詳細說明將參照各附圖。可將相 同的代號用於不同的圖式，以便識別相同的或類似的元 件。此外，下文中之詳細說明並非對本發明加以限制。 應係以最後的申請專利範圍及其等效範圍來界定本發明 的範圍。 $ 作為本文所使用名詞的FinFET意指一種在垂直矽 “鰭片”中形成傳導通道之MOSFET。 第1圖S FmFET ( 1 〇〇 ) #起始結構推雜時之斷面 圖。FinFET ( 1〇〇)可包括—絕緣層上覆石夕（仙議〇n 92531 7 200418180 I n s u 1 a t 〇 r ;簡稱 ς f) τ、4士 j·故 冉SOI )…構，該s〇I結構包 鍺基材（110)上报忐从上 你’及〔或） 上形成的埋入氧化物（BOX)層（12〇) :::在順層（12〇)之上的石夕層⑽)。在替代實施 列中’層（130)可包含緒、或石夕.錯。在_實施例中， BOX層（120)之厚度範圍可自大約2〇〇奈米至大約 奈米，且石夕層（130)之厚度範圍可自大約3〇奈米 約100奈米。然後可沈積諸如氧化物層（例如二氧化 及（或）氮化物層（例如氮切）等的保護層，以便用 來作為後續蝕刻期間的保護蓋。 然後可姓刻碎層（13G)及各保護層，以便形成石夕轉 片（140)、以及在鰭片（14〇)之上的保護層（15〇)及 (160M請參閱第2圖）。保護層（15〇)可以是氧化物 層，且保護層〇6〇)可以是氮化物層。層（15〇)之厚 度可例如為大約1 5本来，日恳，*1 /： Λ、 J i：>不木且層（160)之厚度範圍可以 是大約5 0至7 5奈米間。 然後可在鄰近縛片（140)末端處形成源極/汲極區。 在一實施例中，可在矽層（130)上產生圖案並蝕刻矽層 (13〇)’以便在形成韓片（140)的同時也形成源極及沒 極區。在其他的實施例巾，可以習知的方式沈積並姓刻 另一矽層，以便形成源極及汲極區。第3圖是FinFET (1〇〇)的透視圖’該FinFET( 1〇0)具有在鄰近籍片（14〇) 末端處形成的源極及汲極區（310)及（32〇)。 第4圖是具有源極區（310)、汲極區（32〇)、及韓 片（140)的FinFET ( 100)之俯視圖。係沿著第4圖中 92531 8 200418180 之Α·Α’線的第1及2圖中之斷面圖。 然後可在FinFET ( 1〇〇 )之上形成矽酸四乙酯 (TEOS )層（501 )。第5圖是沿著第4圖中之A-A，線 的FinFET ( 1〇〇)之斷面圖，用以顯示TEOS層（501 )。 可對TEOS層（501 )進行退火及平坦化，以便在FinFET (1 0 0 )的頂部產生較平坦的表面。 可在TEOS層（501)中界定鑲嵌（damascene)閘極 遮罩層’並在該遮罩層中產生圖案。尤其可在TE〇S層 (501 )中形成溝槽。然後可經由蝕刻而在TE〇s層（5〇1 ) 中打開閘極區。第6圖是FinFET ( 1〇〇)的俯視圖，其 中係將TEOS層（501)中之區域（6〇2)係表示該被打 開的部分。更具體而言’可利用該遮罩層來姓刻區域 (602 )中之TE0S層並保持其餘的te〇s層㈠)。在 一實施例中，可透過在區域（6G2)中之了卿層上沈積 繼約為5〇至7〇奈米的多晶石夕層，而圖案化該間極 區’藉以得到較小的閘極長度。 安 J圖案化该多晶石夕層， 而留下極薄的多晶矽線。麸德 …、傻可沈積厚度大約為120至 1 5 0奈米的氧化物層，然後將 乳化物層研磨到到該多 晶石夕層的頂部。接著將該多晶 r , 夕钱刻掉。然後蝕刻區域 1602)中之TE〇s，且係 TEOSI虫刻的遮罩層。 射于、的氧化物層作為該 然後可削薄鰭片（140)。在—麻# 丄
f 1 nm 4立,η〆 貝％例中，可使FinFET (1 00 )接觸氰水，直到鰭片 1 5太丰沾I u丄 ）的見度自1 〇奈米至 1 5示未減少到大約3奈米至6太 不水為止，而將鰭片（140) 92531 9 200418180 削薄。可在較慢的速率且受控制的進度下，執行該_ 製程’使該轄片係以大約2埃/分鐘的速率下被削減。被 :此種方式削薄的鰭片係示於第7圖，而第7圖是沿著 第4圖的A-A’線的斷面圖。第8圖是對應第7圖的的俯 視圖。如第7及8圖所示，在削薄鰭片（14〇 )之後的
FinFET( 100)包含形成在氧化層（15〇)及保護層（副） 下的凹處。 如第9圖所示，可在鰭片（14〇)的側表面上生長閑 極介電層（9〇1)。閘極介電層（9〇1)之厚度可薄至 至U奈米。在替代實施例中，可在籍片（14〇)的側表 面上形成具有〇·6至丨.2奈米的等效氧化物厚度 (EqUlvalent 〇xide Thickness ;簡稱 e〇t)之高介電 數（k)值層。 請參閱第10圖，然後可以一種習知的方式在FinFET / 100)上沈積多晶矽層。可利用閘極摻雜遮罩層來摻雜 该多晶石夕層。可利用磷來摻雜NMOS裝置，且可利用硼 來摻雜罐裝置。可將該多晶石夕層平坦化至氮化物層 (160)的高度，而形成兩個獨立的多晶矽區（1⑼1 A ) 及^⑻叫。可圖案化多晶秒區（剛A)及（⑽叫 中’亚餘刻多晶石夕區（1〇〇1A)及（1〇〇ib)，以便形成 FinFET(1〇〇)的閘極。多晶石夕區（刚A)及（1〇〇1B) 可因而形成兩個在電性獨立的閘極。在其他的實施例 中’可不將多晶石夕區（1001A)及（1〇〇1B)研磨到氮化 矽層（160)的高度。替代性地，單一的多晶矽層可覆蓋 92531 200418180 氮化矽層（160 )。在此種情形中，該多晶矽層形成FinFET (1 00 )的單一可定址之閘極。之後可將遮罩層施加至閘 極區（602)。使用該遮罩層保護區域（6〇2)，該TE〇s層（5〇1) 以及保護二氧化矽與氮化矽層（15〇)與（16〇)沉積於該源 極/汲極區域（3 1〇)與（320)上，接著可使用等向性濕蝕刻 方式予以蝕刻俾移除該TE〇S層（5()1)。 在露出源極/汲極區（310)及（32〇)的表面之後， 可對FinFET ( 1〇〇 )執行離子植入，以便摻雜源極（3 1〇 ) 及>及極（320)。更具體而言，在NMOSFinFET中，可在 1〇〗5原子/平方厘米的劑量及5至10kev (千電子伏特） 的能量下植入磷。在PM0SFinFET中，可在1〇15原子/ 平方厘米的劑量及2至5kev的能量下植入硼。 在離子植入之後，可對FinFET ( 1〇〇)執行 salicidation製程（如自我對準矽化物製程）。在該步驟 中’可在多晶矽（閘極）區（1〇〇1A)及（1〇〇1B)以及 源極及汲極區（310)及（32〇)之上沈積諸如鎢、鈷、 鈦、鈕、鉬、鎳、铒、或鉑等金屬。然後可執行熱退火， 以便產生金屬矽化物化合物。第丨丨圖示出在退火之後的 FinFET ( 1 〇〇 )之俯視圖。請參閱第丨丨圖，該斷面陰影 線代表在源極/汲極區（3〗〇 )及（32〇 )以及兩個閘極區 之上的金屬矽化物化合物。該等閘極區可包含在多晶矽 區（1001A)及（1001B)的末端上形成之閘極墊（ιι〇ι) 及（1102)。所形成的FinFET ( 1〇〇)包含在第u圖中 以虛線示出的薄鰭片通道區40)。然而，如第i 〇圖所 92531 ^U418180 不’保護層（150 )及「16〇 )的官& ☆ 及〔16〇)的見度大於鰭片（140)的 二 有利之處在於·所形成的鉑通道MOSFET提供了 車父佳之短通道控制。 請再參閱第5圖，在替代實施例中，並不是 ,=接觸氨水而賴（14〇)削薄，而是可利用活
=:r(Reactive 一〜簡稱咖 为J減·、、、日片（140)。一船而士，曰4 LL RTP θ ^ 叙而5，且如此項技術中所習知的， ^ :裝姓刻的一種變形，這是因為在㈣姓刻期 :將+導體晶圓放置在發出射頻的電極上。在該實 &例中，初步時可利用R τ 、 到大約3夺米：：1Γ 片）的寬度減少 不卡至ό奈未，而將鰭片（14〇)削薄。 ，後刊用㈣製程來去除保護層（15〇)及（16〇)， 路=第12圖中被標示為藉片（124〇)的藉片。 而引二t 13圖所示，為了消除因蝕刻層（150)及㈠60) ==刻損壞，然後可在韓片（124。)的露出表面 2 =犧牲氧化物層（13G1)。可使犧牲氧化物層生長至 或形成至大約〇.6至12太 氧化物層用來作為閘極二:度，且亦可將該犧牲 作為閘極介電層。在替代實施例中，可在 的側表面上形成具有。·…2奈米的等： 氧化物厚度（E 〇 了）夕 名貝卜的氧化物層或高&值層，且 該額外的氧化物層或高^值層被標示為層（咖)。 請參閱第I 5圖，铁赖可·、， _
M,nn, u ^後可以一種習知的方式在FinFET 沈積多晶矽層。可將該多晶矽 化物層（1301)的古痒 丁一化主乳 )勺同度，而形成兩個獨立的多晶 92531 12 200418180 (1201A)及（1201B)。多晶石夕區（1201A)及（1201B) 可形成FinFET ( 1200 )的閘極。多晶矽區（12〇1A)及 (120 1B )可因而形成兩個電性獨立的閘極。在其他的 實施例中’可不將多晶石夕區（1 2 〇 1 a )及（1 2 〇 1B )研磨 至氧化物層（1 3 0 1 )的咼度。替代性地，單一的多晶石夕 層可覆蓋氧化物層（1301 )。在此種情形中，該多晶石夕層 形成FinFET ( 1200 )的單一可定址之閘極。 然後可將遮罩層施加到FinFET( 12〇〇)的閘極區。 使用該遮罩層來保護該閘極區時，然後可自其餘的 FinFET ( 1200 )姓刻掉TE0S層（5〇1)以及在源極/汲 極區（310)及（ 320 )之上沈積的額外保護層。 在露出源極/汲極區（310)及（320 )的表面之後， 可對FinFET ( 1200 )執行離子植入。如此可有效地摻雜 源極（310)及汲極（320 )。更具體而言，在νμ〇：5ι^ρετ 中，可在1015原子/平方厘米的劑量及5至1〇 的 月匕里下植入石粦。在PMOSFinFET中，可在ι〇ΐ5原子/平 方厘米的劑量及2至5 kev的能量下植入硼。 在離子植入之後，可對FinFET ( 12〇〇)執行 sallcldati〇n製程（如自我對準矽化物製程）。在該步驟 中’可在多晶矽（閘極）區（12〇1A)及（12〇1β )以及 源極及汲極區（310)及（320 )之上沈積諸如鎢、鈷、 鈦、.鈕、或鉬等的金屬。然後可執行熱退火，以便產生 金屬矽化物化合物。此時，FinFET ( 1200 )的俯視圖係 類似於第11圖所示之FinFET ( 200 )。 92531 13 200418180 其他實施^ • 某二丨月形中，可能需要形成應變矽（strained silicon )FinFE丁。篦 ι κ 至1 8圖是沿著第4圖中之A - A ’ 線的FinFET ( 1600 )之橫斷 面圖。 月，閱第16圖，可在埋入氧化物層（1601)上形 成夕錯層（1 6 1 〇 )。然後可在石夕錯層（⑹〇 )之上形成氮 化:勿層（1 620 )。可以諸如一種形成類似於第7圖所示 的薄鰭片之方式形成㈣層（161())及氮化物層（162⑸ 的配置。因此’初步時可將料層（i6iG)及氮化物層 (1 620 )钱刻成具有相同的寬度，然後可橫向餘刻石夕錯 層（161〇)，以便形成薄矽鍺層（1610)。矽鍺層（161〇) 的寬度可以是大約5奈米至丨5奈米。 明 > 閱第1 7圖，然後可在該矽鍺層附近以磊晶生 長方式生長出寬度大約& 5奈米i 1〇奈米的石夕層 (1611)。在生長出矽層（1611)之後，可接著形成閘極 介電層（16丨2)。間極介電層（1612)的厚度可薄至〇·6 至1·2奈米。 凊麥閱第1 8圖，然後可以一種習知的方式在 FinFET ( 1600 )上沈積一多晶矽層（18〇1 )。然後圖案 化該多晶矽層，並蝕刻該多晶矽層，以便形成 (1 600 )的閘極。亦可將多晶矽層（18〇1)向下平坦化 到氮化物層0620 )的高度。此時，可以前文所述:方 式完成 FinFET ( 1600)。 92531 14 200418180 某些MOSFET具有被放置在單一埋入氧化物層上的 PMOS及NMOSFinFET。在該實施例中執行salicidati〇n 製程（例如前文所述的salicidaticm製程）時，可對適當 的金屬進行無電鑛（electr〇less plating )，而完成選擇性 的salicidation。此外，可使用兩種或更多種不同的矽化 物。可將一種矽化物（例如鈷、鎳、稀、土金屬的铒、 銪、鎵、釤矽化物）用於NMOSFinFET，且可將另一種 矽化物（例如鉑矽化物）用於PMOSFinFET。在此種情 形中，可先以光阻層覆蓋該PMOSFinFET，接著可沈積 NMOS金屬。然後可去除該PMOSFinFET之上的光阻 層，接著可在該NMOSFinFET之上施加另光阻層。此 日可，可施加PMOS金屬。然後可執行熱退火，以便產 生金屬矽化物化合物。 結論 本文已說明了具有窄鰭片之FinFET及製造該窄縛 片FinFET之方法。該窄鰭片將其中包括短通道控制的 若干優點提供給FinFET。 在前文的說明中，述及了諸如特定材料、結構、化 學品、製程等的許多特定細節，以便使本發明能夠徹底 被了解。然而，可在不依靠本文所述該等特定細節的情 形下實施本發明。在其他的情形中，並未詳細說明一些 習知的處理結構，以免非必要地模糊了本發明的重點。 可以傳統的沈積技術來沈積用來製造根據本發明的 半導體裝置之介電層及導電層。例如，可採用諸如其中 15 92531 200418180 ▲ 包括低壓化學氣相沈積（Low Pressure Chemical Vapoi,
Deposition;簡稱LPCVD)及增強型化學氣相沈積 (Enhanced Chemical Vapor Deposition ；簡稱 ECVD ) 的各種類型的化學氣相沈積（Chemical Vapor
Deposition ;簡稱CVD)製程等的金屬化技術。 可將本發明應用於製造半導體裝置，尤其是應用於 製造設計的線幅在1 00奈米或更小的半導體裝置，而可 Φ 得到更多的電晶體及電路速度、以及較佳的可靠性。可 將本發明應用於各種類型的半導體裝置之形成，因而並 未述及細節，以免模糊了本發明的點。於實施本發明時， 採用了習知的微影及蝕刻技術，因而本文並未詳細述及 此類技術的細節。
本發明的揭示事項中只示出及說明本發明的較佳實 鈿例及其夕用m。所應了解者，係本發明可用於各種其 他的組合及環境’且可在本文所陳述的本發明的 範圍内對本發明加以修改。 “ 【圖式簡單說明】 鈾文之說明係表日3夂sn , 7 “、、各附圖，而在所有的附圖中 有相同代號的元件可代#4§/ 口中，具 τ」代表類似的元件。 弟1及2圖是形成^
根據本發明的各面向的FinFET < 面圖； 第3圖是第2圖所+ 口所不FinFET之透視圖； 第4圖是第3圖所干 M々不FlnFET之俯視圖； 第5圖是沿著第4 m 士 ， 圖中之A-A，線之斷面圖； 92531 16 200418180 第6圖是第3圖所示FinFET之俯視圖； 第7圖是沿著第4圖中之A-A’線之橫斷面圖； 第8圖是第7圖所示FinFET之俯視圖； 第9及10圖是FinFET之斷面圖； 第11圖是完成的FinFET之俯視圖； 弟1 2至1 5圖是根據本發明的第二實施例的ρ丨η ρ e T 之斷面圖；以及 第1 6至1 8圖是在石夕鍺層周圍建構的雙閘極FinFET 之斷面圖。 [元件符號說明] 鰭式場效電晶體 120，1601 埋入氧化物層 10〇,2〇〇，120051 600 U〇 基材 130，1611 矽層 150，160保護層 3 10 汲極區 6 02 區域
1001A，1001B，1201A，1201B 1101,1102 1301 犧牲氧化物層 1620 氮化物層 140，1240 鰭片 3 10 源極區 501 石夕酸四乙酯層 901，1612 閘極介電層 多晶石夕區 閘極塾* 1610 矽鍺層 1810 多晶石夕層 92531 17
Claims (1)
- 200418180 拾、申請專利範圍： 1. 一種金屬氧化物半導體場效電晶體（MOSFET)裝置， 該MOSFET裝置包含在絕緣層（120)上形成的源極 (310)及汲極（32〇)，並包含在該絕緣層上且在該 源極（3 10 )與汲極（32〇 )之間形成的鰭片結構（14〇 )， 該MOSFET裝置之特徵在於：在该鰭片結構的通道區中形成之削薄區； 至少在該鰭片結構的削薄區上形成的保護層 (150,160 )，該保護層的寬度大於該削薄區的寬度； 在該鰭片結構的至少一個通道部分周圍形成之 介電層（901 );以及 在該介電層及該鰭片結構周圍的絕緣層上形成 之閘極（1 1 0 1，1 1 02 )。 2. 如申請專利範圍第1項之裝置，其中該削薄區之寬度 大約為3至6奈米間。 3. 如申請專利範圍第1項之裝置，其中該保護層包含： 氧化物層（1 5 0 );以及 在該氧化物層之上形成的氮化物層（1 6〇 )。 4·如申請專利範圍第3項之裝置，其中該氧化物層（15〇) ^ U積至大約1 5奈米間的深度，且該氮化物層（1 6 〇 ) 尤積至大約50奈米至75奈米間的深度。 5·如申胃請專利範圍第1項之裝置，其中該介電層（901) 之厚度約為〇·6奈米至1·2奈米間。 6·如申請專利範圍第i項之裝置，其中該閘極包含多晶 92531 18 200418180 >5^ 〇 如申请專利範圍第1項之裝置，其中該M〇SFET裝 置是一 FinFET。 8β 一種形成MOSFET装置的方法，係包含下列步驟： 在絶緣層（1 20 )上形成源極（3丨〇 )、汲極（3 2〇 )、 及鰭片結構（1 4 0 )，該轉片么士姐 曰月結構的複數個部分係用來 作為該MOSFET的通道； t 在該鰭片結構之上形成徂$ R 々成保護層（150,160 ); 在不顯著地削減該4罕士崔爲& 保&層的情況下將該鰭片結 構削減到大約3奈米至6奈米間的寬度； 在該鰭片結構周圍生長介電層；以及 在該介電層周圍沈積多晶夕 丨貝7日日吵層，該多晶石夕層係用 來作為該MOSFET的閘極區。 9·如申請專利範圍第8項之方、丰甘 一 μ Κ之方法，其中形成該保護層之 该步驟包含下列步驟： :氧化物層沈積至大約i 5奈米的深度；以及 將氮化物層沈積至大約5〇奈米至75奈米間的深 度0 92531 19
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| JP2006516820A (ja) | 2006-07-06 |
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