SU773921A1 - Pulse duration normalizer - Google Patents

Description

The invention relates to a pulse technique, in particular, is intended for use in converters. The frequency of the pulses-voltage used, for example, for signal processing, received from ionizing radiation detectors. A pulse width normalizer is known in which to store the input pulse that came during its previous pulse, its pulse, a trigger and logic circuit are used by which the incoming pulse is counted after the previous one has completed the shaping. A disadvantage of the known normalizer is the low stability of the output duration pulses and a large recovery time of sensitivity, which leads to miscalculations of pulses and the loss of some information. The closest technical solution to the present invention is a normalized pulse generator comprising a reference frequency pulse generator connected to a counting trigger input, the output of which is connected to the first input of the AND circuit, the second input of which is connected to the output of the SCW with ONE steady state and the input reset the number of pulses, the input of which is connected to the output of the circuit I, and the outputs of the counter of the number of impulses are connected to the inputs of the decoder, from the output of which the impulse is taken for a constant duration However, the input signal is fed to the input of the circuit with one stable state 2. A disadvantage of the known generator is the insufficient overload capacity at the input frequency, i.e. a large dead time to the input signal (dead time), which leads to miscalculations in the processing of pulses that are statistically distributed in time, for example, pulses arriving from ionizing radiation deectors. The purpose of the invention is to increase the sensitivity to the input frequency. The goal is achieved by the fact that the pulse width normalizer containing the reference frequency pulse generator, connected to the counting trigger input, one output of which is connected to the first input of the And element, the output of which is connected to the input of the impulse number counter, introduces the second count number of pulses, D trigger and block comparing codes whose inputs are connected to the outputs of counters of the number of pulses, the output is connected to the 0-input of the D-trigger, the C-input of which is connected to the second output of the first trigger, the output of the D-trigger is connected to the second input of element I.

Fig. 1 shows a block diagram of a normalizer for an impu duration: 1 Ås / in Fig. 2, time diagrams of voltages at various points of the normalizer.

The pulse width normalizer contains a generator of 1 pulse of the reference frequency, trigger 2 with a counting input, element 3 I, counters 4 and 5 of the pulses, block 6 of code comparison, D-trigger 7, the input of the counter 5 of pulses is input 8 of the normalizer, a. the output of the 0 flip-flop 7 is the output 9 of the normalizer.

The normalizer works as follows.

In the initial state, the codes of the numbers recorded in the counters 4 and 5 are equal and at the output of the comparison code block b (Fig. 22) there is a logical unit, and the D flip-flop 7 is in the single state, then the voltage at the output of the pulse duration normalizer corresponds to a logical zero. (Fig. 2 e) and the element 3 And closed. The arrival of the pulse (Fig. 2a) at the input of the counter 5 violates the equality of the codes recorded in the counters 4 and 5, and the output of the code comparison block 6 (Fig. 2d) sets the voltage corresponding to a logical zero. The first impulse, which came after that to the C input of the D flip-flop 7 (Fig.2o), translates it into the zero state and a voltage corresponding to a logical unit (Fig.2e) is set at its output, which will open the element 3 AND .29), which will allow the pulse from trigger 2 (Fig. 2 (5) through open element 3) to arrive at counter 4, which aligns the codes recorded in counters 4 and 5, and a logical unit is set at the output of the code compare block b ( Fig. 2 d). The second pulse (Fig. 2e), which led to the C input of the trigger 7, will return it to the one state and close lement 3 I. Thus, in one pulse, coming to the input of the counter 5, the output of the normalizer duration will pass one pulse duration, pasHofi period pulse frequency at the output of flip-flop 2.

If the wxon of the counter 5 receives n pulses in a time shorter than the pulse frequency period and the output of trigger 2, then the codes recorded in counters 4 and 5 will differ by N and a pulse of duration equal to N periods of frequency will pass to the output of the duration normalizer. at the output of flip-flop 2, since in order to align the codes, it will be necessary to input N pulses into counter 4.

Thus, the minimum allowable interval between input pulses in the pulse duration normalizer is determined by the speed of the first triggers of counter 5, and not by the frequency of the pulses of the reference frequency generator. At the same time, the allowable number of pulses, which came with an increased frequency, is determined by the volume of counters 4 and 5. The volume of counters 4 and 5 can be chosen sufficient, based on the known law of the distribution of the probability of incoming pulses, in order to practically eliminate their miscalculations. Therefore, in the proposed normalized, an increase in the overload capacity at the input frequency is reduced, which reduces pulse miscalculations, which increases the accuracy of devices in which the pulse width normalizer is applied. .

Claims (2)

1. Authors certificate of the USSR 513483, cl. And 03 K 9 / 06,18.12.74. 2. USSR author's certificate number 480185, cl. H 03 K 9 / 06,11.04.72. lpppppppppppppppp ppppppppppppppp pppp d