SU1290536A1 - Device for converting number from residual class system to position code - Google Patents

Abstract

This invention relates to the field of computing. The aim of the invention is to increase speed. This goal is achieved by the fact that in the device containing a binary accumulating counter, n subtracting modular counters, three AND elements, two OR elements, a trigger, by organizing the corresponding connections, a faster transformation algorithm is performed. 1 il. (Ls

Description

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The invention relates to computing and can be used to interface with computing devices operating in the system of residual classes (JUICE), as well as in data transmission equipment using JUICE codes,

The purpose of the invention is to increase the speed.

The drawing shows a device diagram for converting a number from a residual class system to a position code.

The device contains a binary accumulating counter 1, subtracting modular counters 2 ,, 2, ..., 2, first 3 and second 4 elements OR, first 5, second 6 and third 7 elements AND, trigger 8, input 9 clock pulses and input 10 Start the device.

Binary accumulative counter 1 allows to increase the number by one or by one

modular counting constants q

h-f

ETC

  t

shat contained in it

unit or given for

tantas 1. Р „

and 1

and modular counters 2

-hh

- to reduce by one or the constant defined for this counter 1. JP. I modP. (where i 1, 2,

r -1t

..., p-2).

Each of the subtractive modular

counters 2,

production-, 2

gives the modulo of the corresponding base in the code JUICE; when each of these counters is zeroed, the O signal is output from its direct output.

A device for converting a number from a system of residual classes to a positional code works as follows.

At the initial moment of time, the accumulating counter I and trigger 8 are set to the zero state. In modular meters 2, the number to be converted is written in the code of the SOC. According to the Start signal applied at input 10, the trigger 8 is set to the single state. The logical unit from the output of the trigger 8 is fed to the second inputs of the elements And 5-7, the first inputs of which do this

five

five

0 I

five

0

five

0

five

0 5

362

Tovy impulses. If the content of modular counters 2, 2, ..., 2 is not zero, then the unit from the direct output of the element OR 3 is fed to the inputs of the elements AND 6 and 7, and the zero signal from the inverse output of the element OR 3 is fed to the third input of the element AND 5, prohibiting the passage of clock pulses through it. If the modular counter 2 does not equal zero, a single signal from its direct output permits the passage of clock pulses through AND 7 to the inputs of the binary accumulating counter 1 and modular counters 2, and zero inversion output of the modular counter 2 prohibits the passage of clock pulses through the element and 6.

Under the action of the clock pulses, the accumulating counter 1 and the modular counters 2 begin to change their state by one with the arrival of each clock pulse. When the modular counter 2 is zeroed out, the zero signal from its direct output prohibits clock pulse hitting through AND 7, and a single signal from the inverse output of counter 2 allows clock pulses to pass through AND 6 to the second inputs of binary accumulating counter 1 and modular counters 2. 2, .- .., 2,, 2. The arrival of one clock pulse to the second input of the binary accumulating counter 1 causes an increase in the contents of this counter by the constant q, and the arrival of the clock pulse to the second inputs may Meters withstand 2, 2,. . . , 2, 2 - decrease by the value of I -.

At the moment of zeroing of the modular counters 2 ,, 2,.,,, 2, zero signals from 1x outputs go to the inputs of the element OR 3 and produce at its direct output a zero signal that prohibits the passage of clock pulses through elements 6 and 7. From the inverse output element OR 3 to the third input element And 5 receives a single signal that permits the passage of clock pulses to the third inputs of the binary accumulator from video 1 and the modular counter 2c. Under the action of each clock pulse, the content of the binary accumulating counter is increased by the value of q, and the content

„T

counter Z is reduced by the value of TD. When resetting the modular counter 2 cov 2

one

-h

and zero counting, 2, - on the inverse 5

the output of the element OR 4 produces a signal that sets the trigger 8 to the zero state. .

At that, the conversion of the number from the SOC code to the binary code is completed, the result of the conversion is in the counter.

Claims (1)

Invention Formula A device for converting a number from the system of residual classes to a position code containing a binary accumulating counter, n subtracting module counters (n is the number of bases P P -i ...: P systems of residual classes), three elements AND, trigger, two elements OR, moreover, the output of the binary cumulative counter is the output of the device, the input of clock pulses of which is connected to the first inputs of the first, second and third elements fO the first counting inputs of the binary accumulating counter and the subtracting modular meters, the output of the second element I is connected to the second counting inputs of the binary, accumulating counter and the ri-ro output module modular counter, the output of the first element is connected to the third counting inputs of the binary accumulating counter and the nth subtractive the modular meter, the outputs of the subtracting modular meters from the first to (n-2) th are connected to the corresponding inputs of the first element 5 OR, the direct output of which is connected to the third input of the third element And the first input of the second element OR, the second input and the inverse output of which are connected respectively by the output of the n-th subtractive modular counter and zero trigger input, characterized in that in order to improve performance, it has a direct output (nl) -ro deducted module counter is connected to the corresponding input of the first OR element and to the fourth input of the third element AND, the third input of which is connected to the third 20 25 com and, the second inputs of which are connected by the input of the second element I, quadrilaterals with the trigger output, the unit with entrance the input of which is connected to the start of the device, the inverse code of the first element OR is connected to the third input of the first element AND, the output of the third element AND is connected to five O the first counting inputs of the binary accumulating counter and subtracting modular meters, the output of the second element I is connected to the second counting inputs of the binary, accumulating counter and ri-ro of the downstream modular counter, the output of the first element is connected to the third counting inputs of the binary accumulating counter and the nth subtractive modular counter , the outputs of the subtracting modular meters from the first to (p-2) -th are connected to the corresponding inputs of the first element 5 OR, the direct output of which is connected to the third input is the third The first element and the first input of the second element OR, the second input and the inverse output of which are connected respectively to the output of the nth subtractive modular counter and zero trigger input, characterized in that, in order to improve performance, it has a direct output (nl) - ro of the subtractive modular meter is connected (to the corresponding input of the first OR element and to the fourth input of the third element AND, the third input of which is connected to the third 0 five the input of the second element And, four whose input is connected to the inverse output (n-l) of the r-ro subtractive modular counter, the output of the second element I is connected to. second counting inputs of subtractive modular counters from the first to (p-2) -th.