SU1283976A1 - Number-to-pulse repetition period converter - Google Patents

Abstract

The invention relates to computing, namely, data conversion and transmission devices, and can be used to convert parallel binary code in a pulse repetition period. The device has a high accuracy of information conversion, t, k. provides an indication of both the N codes of the code and the zero code, which eliminates the uncertainty of the OUTPUT pulse sequence when switching from converting a code of ONE number to converting a code of another number through a code of zero number. The code converter during the pulse repetition period contains a subtracting counter, an element .OR — NO, a trigger, two elements AND, and three inverters. 1 il.

Description

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The invention relates to computing and can be used in data transmission devices for converting a parallel binary code into a pulse repetition period.

The purpose of the invention is to increase the reliability of the conversion by indicating a zero code.

. The drawing shows a block diagram of the proposed device.

The code converter in the pulse repetition period contains a pulse counter 1, an element OR a NOT 2, a trigger 3, the first and second elements AND 4 and 5, the first, second, third inverters 6-8, clock input 9, output 10, input 11 reset, information inputs 12,

The device works as follows.

According to the initial setup signal Reset from input 11, the subtractive counter 1 is set via inverter 7 to the zero state, and trigger 3 to the single state. A single level from the direct output of trigger 3 opens element 5 and from input 9 of clock pulses at output 10 passes the first pulse. This impulse counter does not reach the counting input of deducting counter 1, since at the first input of element 4 there is a zero level coming from the inverse output of trigger 3, From the output of element 5, the first impulse through inverter 6 passes to the input of recording deducting counter 1. At the zero level, the input of the record of the subtracting counter 1 records the code of a certain number (, 1,2,3 ...) from the input 12. If -N 0, then the state of the subtractive counter 1 changes at the output of the OR- HE 2 is set to zero (in the state of subtractive counter 1 e varies). The setting of the code of the number in subtractive counter 1 and the operation of the element OR NOT 2 should occur before the occurrence of the falling edge of the first pulse, do the falling edge of the first pulse coming through the inverter 8 to the trigger input of trigger 3, the latter is set to zero state, as at its information input, there is a zero level from the output of element 2 (with trigger 3 it remains in one state and

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: i.; j (. M (, - (rr AND 5 pstaey-with OTKPI, IT.IM) "J lc-moment AND 5 is closed. A single level from the inverse output of trigger 3 opens the element I 4 and pulses with

inputs 9 clock pulses are fed to the counting input of the subtractive Counter 1. On the leading edge of each pulse, one is subtracted from the contents of subtractive counter 1. When subtractive counter 1 reaches zero, a single level is set at the output of the RSHI-HE 2 element. On the falling edge of the pulse that sets subtractive counter 1 to the zero state, trigger 3 is set to one state, since its information input contains a single level from the output of the OR-NOT 2 element. At this, the AND 4 element closes and the 5 AND element opens . The output 10 passes the second pulse from the input of 9 clock pulses. The resulting time interval between the first and second pulses at the output 10 corresponds to the code of the number N. The second pulse, having passed the inverter 6 and, arriving at the input of the record of the subtractive counter 1, records the new code. Further process

code conversion in the pulse repetition period is repeated.

Thus, at the end of both the transformation of the code of the number N, and the beginning of the conversion of the number zero to

Element 5 output appears impulse. This impulse records a new code (code of the number zero). At the same time, zero levels remain at the output of the subtracting counter 1, at the output of the OR-NOT 2 element, and at the direct output of the trigger 3, single ones, the And 5 element is closed. The next pulse from the input of the 9 clock pulses passes again to the output of the And 5 element. The conversion of the code of the number zero ends. If the code of the number zero at the input 12 does not change, then the output of the element And 5 continues to receive pulses from the input of 9 clock pulses. After changing the code of the code, these pulses do not pass to the output of the element And 5. The conversion of the code of the number begins on the last pulse that passed to the output of the element And 5.1 The next pulse at the output of the element And 5 appears after the subtracting counter 1, on the leading edge of the pulses from the input of 9 sync pulses, measuring 3I /

n with T state from code of the code N, D nulch.

Claims (1)

Invention Formula A code converter in a pulse repetition period containing a pulse counter, the outputs of which are connected to the inputs of the OR-NOT element, the output of which is connected to the trigger information input, the inverse output of which is connected to the first input of the first element AND, and the second element AND whose first input is synchronizing the input of the device, the output of the second element I is the output of the converter, characterized in that, in order to increase the reliability of the conversion by indicating a zero code, / l4 Г: HPfo П1Ч Д И1 1 first, ptoron, trs-Tnii 1ГН1аерторы, g. (The outputs of which are connected respectively to the write input of the pulse counter, to the zero input of the pulse counter, with the trigger synchronization input, the direct output of which is connected to the second input of the second element And the output of which is connected to the input of the first inverter, the output of the first element I is connected to the counting input of the pulse counter, the R input of the trigger is combined with the input of the second inverter and connected to the Reset input of the converter, the second input of the third And element and the third input the inverter is connected to the clock input of the converter, the information inputs of the pulse counter are the information inputs of the converter.