SU383218A1 - DEVICE FOR DETERMINING THE DURATION OF THE ELEMENTARY DELIVERY OF TELEGRAPHIC MESSAGES WITH DIFFERENT TELEGRAPHIC SPEEDS - Google Patents

Description

one

The invention relates to devices for measuring parameters of received telegraph signals and can be used in systems that receive both start-stop and synchronous transmissions.

The known device for measuring telegraphic distortions, which contains an RF generator, a frequency divider, a current amplifier, an input circuit for telegraph packages, the beginning and end of which affect two triggers, a binary counter, a block of logic elements, a decoder matrix, and a lamp display panel, respectively, has insufficient reliability result, a limited range of measurable wiring speeds; In addition, there is no auto-tuning of the device for the received wiring speed.

The purpose of the invention is to determine the speed of wiring and increase the accuracy of its measurement.

This is achieved by introducing into the device a block for forming and changing the initial number, a block for encoding the duration of the elementary and multiple parcels, an analyzer of the number of exceeding the duration of the reference element for the burnt parcel, a block comparing the codes for the parcels with the initial number.

The drawing shows a functional diagram of the device.

The device consists of a variable frequency generator / clock pulse containing a crystal oscillator 2 and a switch 3, a quantization circuit 4, an inverter 5 containing an inverter t, a gate /, a driver 6 and a switch 9. From the output of the quantized circuit 4, quantized in duration, arrive to the inputs of the unit 10 coding the durations of elementary and multiple noslok her, including seo counters P, 12 and 13, and to the input of the counter 12 these parcels are received through the divider 14 frequencies into two, and to the input of the counter 13 - through the divide Or 15 frequencies for three. na

bus "Soros counters 11, 12 and 13 through the scheme" OR 16 connected to the output of the circuit 4 quantization.

The number codes recorded in counters 11, 12, and 13 of coding unit 10, which are parcels of duration t, 2t, 3t, are received at block 17 of code comparison, containing circuits 18, 19, and 20 of comparison, and coincidence circuit 21, where the pulse is compared rear front (ZF) with the scheme

5 quantization with the code of the initial number, which is the duration of the reference parcel To, coming from the output of the block 22 for forming and changing the initial number containing the reversible counter 23 and the node

Q 24 controls.

Scheme 18 of the comparison has exits: "More," Less, "Equal. The output " is more connected to the input of the analyzer 25 of the number of exceeding the duration and one of the inputs of the circuit 22 for forming and changing the initial number; the outputs "Less and" are Equal to the reset bus of the counter 26 through the scheme "OR 27; the output is "Less connected to another input of the unit 22 for forming and changing the initial number. One of the outputs of the control unit 24 is connected to the bus "Addition of a reversible counter 23, and the other to the bus" Subtract this counter. The outputs "Equal to the comparison circuits 18, 19 and 20 are connected via a coincidence circuit 21 to one input of the display device 28, to the other input of which the output of the circuit 22 is connected. The device's input is connected via switch 9, or through an inverter 6 is connected to a valve 7, to another input the output of the coincidence circuit 21 is connected. The output of the valve 7 is connected to the inlet of the shaper 8.

The device works as follows.

Before the start of operation, a signal is sent to the bus bus, which sets all the counters and triggers with separate inputs of all nodes of the device to the zero state. In this case, the switch 3 of the quantum frequency of their pulses, containing a counter, decoder, a set of controlled gates and frequency dividers, is set to the first position, which corresponds to the clock frequency directly applied to the quantization circuit.

A telegraph signal, considered as a set of randomly following, is sent to the input of the device, their parcels of various duration, in which there are parcels of duration t, 2m, 3m. This signal is fed to the input converter 5 in the positive or in the negative, depending on the position of the switch 9. The input converter 5 extracts from the telegraph signal the pulses of the forward (PF) and rear (ZF) edges of the parcels and divides them into two outputs. The 4 quantization scheme for parcels transmits parcels into bursts of pulses that arrive at the input of coding unit 10, contains its counters 11, 12 and 13, and at the input of counter 12 they go through frequency divider 14 by two, and at the input of counter 13 - through frequency divider 15 by three. These counters are reset using the scheme "OR 16 pulses of ZF delayed in the 4-quantization scheme at time

l 7 -UI / MHH -

P

Max

minimum time interval between parcels of the same polarity;

maximum wiring speed.

Codes of numbers, represented by ush, and the length of their incoming telegraph parcels, after the arrival of the impulse Sf, are sent to circuits 18, 19 and 20 of the comparison block 17 of the comparison, to the other inputs of which the initial number code is output from the output of circuit 22, which is the duration reference elementary parcel TO. The output of the circuit 18 for comparing the duration of the elementary parcel of the comparator block 17 is possible. The signals are "Equal to," More and "Less, representing our result, and the result of the comparison.

If, when comparing, the parcel turned out to be longer than the reference one, i.e. the number in the counter 11 is greater than the number in the reversible counter 23 of the circuit 22, then the output of the circuit 18 will be the signal "More, which is fed to the counter 26 through the circuit" OR 27 and 24 control the change in the initial number

which performs the function of estimating the degree of excess. If the duration of the package recorded in the counter 11 exceeds the duration of the reference package by more than 1.2 times, then one of the inputs of the node 24 is older

The bits of the counter 11, the prohibit signal is given and the change of the initial number recorded in the reversible counter 23 of the circuit 22 does not occur. In this case, when such a parcel arrives, the counter 26 emits a transfer pulse to switch 3 and the frequency of the quantizing pulses is divided into two, pa, and so on, each time it switches, and the pipe setting for the wiring speed is reached.

If, however, at least one is received from the K. parcels with a duration of no more than 1.2 TO, then the signal "More from the output of circuit 18 is fed to the bus" Addition of the reversible counter 23 of circuit 22 and allows adding the number of pulses to it until the numbers the more accurate the wiring speed setting is. In this case, the output of the circuit 18 receives the signal "Equals, which stops changing the initial number,

resets counter 26, gives permission to match circuit 21.

If for some time at different moments in the signal there are parcels of 2t and 3t duration, then the comparison circuits 19 and 20 will give the signal "Equals circuit 21 matches will record their presence (only after the arrival of the signal Equal from circuit 18) and the output signal gives permission to the display unit 28, on which the number representing the duration of the elementary parcel is written and prohibits the passage of the signal to the input of the converter 5.

If, however, at least one with a duration of 0, is received from the packages, then C; -nal "Less from the output of circuit 18 is loaded) to the bus" subtraction of the reversible counter 23 of circuit 22 through node 24 and allows you to send a number to the input of the reversible counter pulses before the appearance of the signal "Equal to the output

circuit 18 and also resets counter 26