SU530441A1 - Analog-to-digital device for delaying rectangular pulses - Google Patents

Description

(54) ANALOG-DIGITAL DEVICE OF RECTANGULAR PULSE DELAY the second pulse counter, a code coincidence circuit is introduced, the first group of inputs of which is connected to the outputs of the first pulse counter, the second group of inputs to the outputs of the second counter, and the output to the input of the reset circuit of the second counter, unit input of the first trigger and to the signal input of the third valve, the output of which is connected to the input of the reset circuit of the first counter and to the unit input of the second trigger, to the zero input of which the output of the pulse front delay unit is connected, corresponding to the maximum delay time. The drawing shows a block diagram of the proposed device. Analog-to-digital device for directing pulse impulses contains a generator of 1 counting pulses, gates 2, 3 and 4, input 5, pulse counters b, 7, circuit 8 for detecting the coincidence of codes, differentiating circuit 9, block BEFORE delay of the front of the pulse, collective circuit 11, two triggers 12 and 13 and switch 14, the output of the generator 1 of the counting pulses is connected to the signal inputs 15, 16 of the valves 2, 3, respectively, the control input 17 of the valve 2 is connected to the source of delayed pulses, which through the circuit 9 is connected to the input unit 10 delays ki front of the pulse. The control input 18 of the valve 3 is connected to the zero output of the forming trigger 12. The output of the valve 2 is connected to the input 19 of the counter 6, and the output of the valve 3 to the input 20 of the counter 7, The outputs of the pulse-front unit 10 are connected to the control, the inputs 21 of the switch 14 and through the collector circuit 11 to the zero input of the trigger 12, the latter vypoa 2.2 is also connected to the zero input of the trigger 13. The outputs of counters 6 and 7 are connected through the circuit B of the CPU to the signal input 23 of the valve 4, to the input 24 of the reset circuit of the counter 7 and to the single input trigger Era 12. Zero trigger output 12 is connected to control stroke 25, valve 4, the output of which is connected to input 26 of the counter G reset circuit and to unit 1H} trigger input 13. Single trigger output 12 of the device's triggering, is connected to the singleplug input 27 of the switch 14. The outputs 28 of the switch 14 serve as the outputs of the device under the conditions of the multichannel output of the delayed signals. The device operates as follows. A rectangular impulse that needs to be delayed is fed to the input 17 of the valve 2, to the input 15 of which the counting pulses of the generator 1 are supplied. Thus, the delayed signal is converted into pulses whose number is proportional to its duration. These pulses are fed to the input 19 of the counter 6. The recorded number can be stored in the counter for a long time. A parallel delayed pulse is applied to the differentiating circuit, 9, where it is converted into two short pulses. The impulse corresponding to the front of the original signal is delayed in block 10 for the time T, after which the collecting circuit 11 enters the zero input of the trigger 12.v Before the operation starts, the triggers 12 and 13 go to zero. In this case, the INPUT 18 of the valve 3 and the inlet 25 of the valve 4 are subject to prohibitive voltages. The output pulse, taken from the first output 29 of the block 10, transfers the trigger 12 to the state 1. From this moment on, the input 18 of the valve 3 causes the enabling voltage. While trigger 12 is in state 1, the counting pulses of generator 1 pass through valve 3 to input 20 of counter 7. After the number of impulses applied to input 20 of counter 7 is equal to the number entered earlier in counter 6, the output Circuit 8 for detecting the coincidence of codes, an impulse appears that sets trigger 12 to its initial state and is fed to input 24 of the reset circuit of counter 7, clearing it. As a result of a double flip of the trigger 12, a rectangular impulse is formed at its output, delayed by time T with respect to the original signal. This pulse, having the same duration as the initial pulse, is output to the output terminal of the instrument AOR. After the interval T, a pulse occurs at the second output of the block 10, It enters through the collecting circuit 11 to the zero input of the trigger 12 and transfers it to the state i. From this moment on, the input 18 of the valve 3 appears to allow voltage. While trigger 12 is in state 1, the counting pulses of generator 1 pass through valve 3 to input 20 of counter 7. Psiule how the number of pulses applied to input 20 of counter 7 will turn out to be the number of immiscions recorded in the transponder 6 , at the exit

the circuit 8 for detecting the coincidence of codes, an impulse appears that sets the TjSiitrrep 12 to its initial state and, not entering the reset circuit 24, embraces the counter 7. As a result of a double flip of the trigger 12, an i-square pulse is generated at its output, delayed at time t, relative to the original signal.

Further, the device works in a similar way. When the block 10 corresponding to the delayed front of the source signal is detected at the K-output, a rectangular pulse delayed by time T is formed. The impulse taken from the last output 22 of block 10, i.e. From the output corresponding to the maximum delay T, it goes both to the zero input of the trigger 12 and to the zero input of the trigger 13, transferring them to the state I. At the same time, the allowable voltage acts at the input 25 of the valve 4. Now the pulse that appears at the output of the circuit 8 for detecting the coincidence of codes, at the moment of the end of the last delayed pulse, flows through the gate 4 to the input 26 of the reset circuit of the counter 6 and clears it, and also goes to the single input of the trigger 13 and sets it to initial state. From this point on, the device is ready for the delay of a new impulse that can arrive at the input of devices

Delayed rectangular pulses are fed from the output of flip-flop 12 to the signal input 27 of switch 14, which is controlled by the inputs 21 pulses removed from the outputs of block 10. When a pulse appears, and at the t -th output of this circuit At the 1st output of the switch 14, the outputs 28 serve as the outputs of the device under the conditions of the multichannel output of the delayed signals.

The use of new elements of two counters and a circuit for detecting the coincidence of codes favorably distinguishes the proposed device for delaying rectangular pulses from the indicated prototype, since it provides sufficiently accurate recovery of the delayed pulse duration and in the case when the delay time of the pulse is less than its duration. As a result, the range of the change in the time of the delay of the pulses to the minimum

values, which will increase the scope of the device.

Claims (1)

1. Avt.sv, No. 300882, cl. G 06 ff 7 / О8, 11.28.69 (prototype). iiii 28 thirty