SU1735997A2 - Pulse shaper - Google Patents

Abstract

The invention relates to a pulse technique and can be used in automation and computing devices. The purpose of the invention is the expansion of the field of application by controlling the number of output pulses with the duration of the input signal - achieved by introducing an AND-HE4 element, an AND 5 element, and a control bus 7. The device also contains triggers 1.2, delay element 3, output tires 6.9. 3 il.

Description

The invention relates to a pulse technique and can be used in automation and computing devices.

The purpose of the invention is to expand the scope by controlling the number of output pulses with the duration of the input signal.

Figure 1 shows an electrical functional diagram of the device; 2 and 3 are timing diagrams explaining its operation.

The pulse generator contains the first and second RS-flip-flops 1 and 2, delay element 3, element 4 AND-NOT, element 5I, the first input of which is connected to the direct output of the first RS-trigger 1, the output - to the S-input of the second RS-trigger 2, the direct output of which is connected to the first output bus 6 and through the delay element 3 to the R input of the first RS flip-flop 1, whose S input is connected to the input bus 8. The first input of the AND-4 element is connected to the control bus 7 , output - with the second input of the element And 5, the second input - with the inverse output of the first RS-flip-flop 1, with R-input of the RS-flip-flop 2 and a second output line 9.

Shaper pulses works as follows.

In the initial state, bus 8 does not have an input signal (a single level is present). Bus 6, forward trigger output 2, inverse trigger output 1, bus 9, and output of delay element 3 have unit levels. At the output of the element And 5 direct output of trigger 1 - zero levels. At the input of the bus 7, the zero level is set, which keeps the unit level at the output of the NAND 4 element. The presence of a zero level on bus 7 indicates that the shaper will operate in the single pulse formation mode. The initial state of the pulse former is maintained until the input signal arrives. When installed on the tire

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8, the input signal of the zero level at the inverse output of the trigger 1 also sets the state of the zero level. At the same time, there is no bounce accompanying the decay front of the input signal at the output of trigger 1. The occurrence of a zero level at the inverse of the R input of trigger 2 causes it to switch to the opposite state.

At the same time, a zero-level signal is generated on bus 6, which, with a delay for switching triggers 1 and 2, repeats the input pulse (in the diagrams of Figures 2 and 3, the waveforms are shown without taking into account the delays of the elements 1,2,4 and 5). The absence of chatter at the inverse output of the trigger 1 causes its absence at the considered output of the divertor. In such a state, the driver is in a time interval determined by the delay of the delay element 3. After the indicated time, the zero-level signal is fed to the inverse R input of the trigger 1, set at its inverse output to the state of a single level, which is also stored at its direct output. Thus, on the bus 9, a bounce-free signal is generated, the duration of which is determined by the parameters of the delay element 3.

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When the input zero level on bus 8 arrives, trigger 1 sets a single level at the forward output and a zero level at the inverse output that passes to bus 9 and sets zero output on the direct output of trigger 2 and 6. In this case, at the outputs of the elements AND-NOT 4 and 5, unit levels are set. The zero level of the direct output of flip-flop 2 through the time determined by delay element 3, appears at the R input of flip-flop 1, is set at its inverse output to a unit level, which completes the output signal on bus 9. A single level of flip-flop output 1 triggers through the element AND-NOT H and 5 zero level and sets at the direct output of the trigger 2 unit level. At the same time, an output impulse equal to the output one on the bus 9 is formed on bus 6. When a single level triggers 1 from the output of delay 3, the trigger 1 at its inverse output sets the zero level, which sets the forward trigger output 2 and bus 6, the zero level, which, pass element 3 delay, sets on the inverse output of the trigger 1 unit level, which pass elements AND-NOT 4 and AND 5,

The detector continues to stay until the zero level sets the right end of the zero signal on bus 8. When the input zero signal ends, a single level signal is set at the direct output of trigger 2, and the bounce accompanying the rising edge of the input signal remains trigger output 1 and element And 5. The presence of trigger 2 ensures the elimination

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This bounce accompanying the signal at its S-input. Therefore, on the bus 6, a chattering signal is formed that coincides in duration with the input signal.

If there is a unit 50 level bus 7, the shaper switches to the burst formation mode. In the initial state, the state of the elements of the former is set in the same way as described, except for the element AND-HE 4, the output of which is set to zero.

MOM trigger output 2 unit level. At the same time on tires 9 and 6 formed the next output pulses. On buses 9 and 6, output pulses are generated as long as bus 8 has an input zero signal. At the end of the input signal, the shaper returns to the initial state; on buses 9 and 6, bursts of pulses are formed, the number of which depends on the duration of the signal on bus 4.

Claims (1)

Invention Formula Pulse shaper auth. St. No. 1422375, different from the fact that, in order to expand the scope of application by controlling the number of output pulses with the duration of the input signal, the control bus, the element AND NOT, and the circuit between the direct output of the first RS flip-flop and S- the entrance of the second-level level is set to MOM trigger output 2 unit level. At the same time on tires 9 and 6 formed the next output pulses. On buses 9 and 6, output pulses are generated as long as bus 8 has an input zero signal. At the end of the input signal, the shaper returns to the initial state; on buses 9 and 6, bursts of pulses are formed, the number of which depends on the duration of the signal on bus 4. Invention Formula Pulse shaper auth. St. No. 1422375, different from the fact that, in order to expand the scope of application by controlling the number of output pulses with the duration of the input signal, the control bus, the element AND NOT, and the circuit between the direct output of the first RS flip-flop and S- the entrance is second 51735997 The first RS flip-flop introduced an element AND, the second input of which is connected to the output of the NAND element. whose first entry connected to the control bus, the second input - with the inverse output of the first trigger. Fig 7 2.