SU1555837A1 - Device for protection from rattling - Google Patents

Abstract

The invention can be used to eliminate signal bounce at the moments of switching mechanical contacts in processing systems and generating pulse signals. The purpose of the invention is to increase reliability - achieved by introducing a delay element 8 and an EXCLUSIVE OR element 5, 6 into the device, which eliminates the chatter in a wide range of possible values of the duration of the chatter pulse sequence and also eliminates false alarms with pulse noise on the output bus. devices. The device also contains a major element 1, a delay element 4, an inverter 7, an input 2 and an output 3 bus. 3 il.

Description

Schig.1

The invention relates to a pulse technique and can be used in systems for processing and generating pulse signals.

The purpose of the invention is to increase the reliability of the device by eliminating bounce in a wide range of possible values of the duration of the bounce pulse sequence and switching on and off mechanical contacts, as well as eliminating false alarms under the conditions of impulse noise on the output bus of the device.

FIG. 1 shows an electrical functional diagram of the chatter protection device; in fig. Figures 2 and 3 show timing diagrams for switching the mechanical contact with bounce on and off.

The chatter protection device contains the majority element 1, the first input of which is connected to the input bus 2, the second input - with its own output and output bus 3 - the third input through the first delay element C is connected to the output of the first element EXCLUSIVE OR 5, the first input of which is connected to input bus 2 and the first input of the second element EXCLUSIVE OR 6, the second input of which is connected to the output bus 3 and the output through the inverter 7 and the second delay element 8 is connected to the second input of the element EXCLUSIVE OR 5.

The device works as follows.

Suppose at time

tQ at the first input of the majority element 1, the input bus 2, the output bus 3 high potential. At the same time, the output of the first delay element k, the output of the first 5 and second 6 elements EXCLUSIVE OR low potential, and the output of the inverter 7 and the second delay element high potential.

When the potential at the input bus 2 (Fig. 2, a) is first changed from a high level to a low, at the output of the majority element 1 (Fig. 2, d), a low potential is established. At the third input of the majority element 1 there remains a low potential (Fig. 2, c), which holds the low potential of the output of the majority element 1 for the time determined by the delay element k. At the same time bounce pulses,

50

0

which occur on the input bus 2, i.e. at the first input of the majority element 1 do not cause a change in its output state. At the same time, these pulses affect the EXCLUSIVE OR 6 element, which emits bounce pulses and if their duration does not exceed the delay time of the delay element 8, a high level is maintained at the second input of the EXCLUSIVE OR 5 element and the signal from the input bus 2 enters the input of the first delay element Q with inversion (Fig. 2, b). The impact of the bounce pulses on the first delay element k affects the tightening of the formation time at its high potential output, and the high impact time of the high level bounce pulse from the input bus 2 can be significant and is limited only by the delay value of the second delay element 8.

After the appearance of the first high-potential delay element at the output, the device is ready to process the next switching. Operation of the device when the potential on the output bus 2 changes from low to high is similar to that described and is shown in FIG. 3. At the same time, a high level at the output of the device is held due to a delay during bounce at the output of the first element 1 of the high-level delay CHI-nal. The operation of the device under power interference, failure of adjacent devices of impulse noise on the output bus, during which for a large period of time, the value of which is given by the second delay element 8, the state of the input 2 and output 3 of the device tires does not match, in a way.

When exposed to impulse noise in the tc-c interval (Fig. 2, pos. A, d), elements 6-8 form an EXCLUSIVE OR 5 sig5 at the second input of the element

0

five

cash Log. Oh, and the signal from the input bus 2 goes to the delay element k without inverting its logic level.

The delay element k forms at its output a potential corresponding to the potential of the input bus, which leads to the appearance of the same potential at the output of the device. Their match on the second element is EXCLUSIVE

V

but

Jjuu

shl

Fig.Z

Claims (1)

SUMMARY OF THE INVENTION A bounce protection device comprising a majority element, an inverter, a first delay element, wherein the first input of the majority element is connected to. the input bus of the device, the output bus of which is connected to the second input of the majority element and its output, and the output of the first delay element is connected to the third input of the majority element, characterized in that, in order to increase the reliability of the device, a second delay element is introduced into it, the first and the second EXCLUSIVE OR elements, the first inputs of which are connected to the input bus, the output of the first EXCLUSIVE OR element is connected to the input of the first delay element, and the second input is connected to the output of the second delay element, the input to otorogo connected to the output of the inverter connected by its input to the output of the second element EXCLUSIVE OR, the second input of which is connected to the output bus of the device. Figure 2 1555837,