SG52184G - Two-wire bus-system comprising a clock wire and a data wire for interconnecting a number of stations - Google Patents
Two-wire bus-system comprising a clock wire and a data wire for interconnecting a number of stationsInfo
- Publication number
- SG52184G SG52184G SG52184A SG52184A SG52184G SG 52184 G SG52184 G SG 52184G SG 52184 A SG52184 A SG 52184A SG 52184 A SG52184 A SG 52184A SG 52184 G SG52184 G SG 52184G
- Authority
- SG
- Singapore
- Prior art keywords
- wire
- clock
- stations
- bus wire
- data
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
- G06F13/4291—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a clocked protocol
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0008—Synchronisation information channels, e.g. clock distribution lines
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0016—Inter-integrated circuit (I2C)
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Small-Scale Networks (AREA)
- Bus Control (AREA)
- Communication Control (AREA)
- Dc Digital Transmission (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Information Transfer Systems (AREA)
- Communication Cables (AREA)
- Arrangements For Transmission Of Measured Signals (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NL8005976A NL8005976A (nl) | 1980-10-31 | 1980-10-31 | Tweedraads-bussysteem met een kloklijndraad en een datalijndraad voor het onderling verbinden van een aantal stations. |
Publications (1)
Publication Number | Publication Date |
---|---|
SG52184G true SG52184G (en) | 1985-03-29 |
Family
ID=19836092
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG52184A SG52184G (en) | 1980-10-31 | 1984-07-20 | Two-wire bus-system comprising a clock wire and a data wire for interconnecting a number of stations |
Country Status (10)
Country | Link |
---|---|
EP (1) | EP0051332B1 (ko) |
JP (3) | JPS57106262A (ko) |
KR (1) | KR880001017B1 (ko) |
AT (1) | ATE7086T1 (ko) |
AU (1) | AU546567B2 (ko) |
CA (1) | CA1194574A (ko) |
DE (1) | DE3163103D1 (ko) |
HK (1) | HK40385A (ko) |
NL (1) | NL8005976A (ko) |
SG (1) | SG52184G (ko) |
Families Citing this family (51)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3504983C2 (de) * | 1984-02-22 | 1997-12-11 | Philips Electronics Nv | Datenübertragungsanordnung |
US4654655A (en) * | 1984-03-02 | 1987-03-31 | Motorola, Inc. | Multi-user serial data bus |
FR2565751B1 (fr) * | 1984-06-08 | 1986-09-05 | Radiotechnique Compelec | Circuit d'interface du type esclave |
JPS6125230A (ja) * | 1984-07-13 | 1986-02-04 | Sony Corp | Ic装置 |
JPH0727509B2 (ja) * | 1985-04-06 | 1995-03-29 | ソニー株式会社 | 機器内バスを利用した動作制御方法 |
JPH0616282B2 (ja) | 1985-05-27 | 1994-03-02 | ソニー株式会社 | 生産方法 |
JPH0752876B2 (ja) | 1985-07-20 | 1995-06-05 | ソニー株式会社 | 内部バス式デイジタル装置 |
NL8502476A (nl) * | 1985-09-11 | 1987-04-01 | Philips Nv | Werkwijze voor het testen van dragers met meerdere digitaal-werkende geintegreerde schakelingen, drager voorzien van zulke schakelingen, geintegreerde schakeling geschikt voor het aanbrengen op zo'n drager, en testinrichting voor het testen van zulke dragers. |
JPH07104831B2 (ja) * | 1985-09-20 | 1995-11-13 | キヤノン株式会社 | データ転送方法 |
JPH071496B2 (ja) | 1985-11-05 | 1995-01-11 | ソニー株式会社 | 制御方法及び制御装置 |
JP2578773B2 (ja) * | 1986-09-01 | 1997-02-05 | 日本電気株式会社 | シリアルデ−タ転送装置 |
US4847867A (en) * | 1986-09-01 | 1989-07-11 | Nec Corporation | Serial bus interface system for data communication using two-wire line as clock bus and data bus |
JPH0771079B2 (ja) * | 1986-09-01 | 1995-07-31 | 日本電気株式会社 | シリアルデ−タ転送装置 |
DE3789743T2 (de) * | 1986-09-01 | 1994-08-18 | Nippon Electric Co | Serielles Datenübertragungssystem. |
FR2620259B1 (fr) * | 1987-03-31 | 1989-11-24 | Smh Alcatel | Dispositif de couplage de memoires non volatiles dans une machine electronique et machine a affranchir en faisant application |
DE3812216A1 (de) * | 1988-04-13 | 1989-11-02 | Eurosil Electronic Gmbh | Bus-system |
FR2653289B1 (fr) * | 1989-10-18 | 1995-07-07 | Sagem | Radiotelephone. |
JPH04267458A (ja) * | 1991-02-22 | 1992-09-24 | Sharp Corp | 光結合装置およびこれを利用した情報機器 |
AT400205B (de) * | 1990-11-27 | 1995-11-27 | Mecanotronic Produktion Von El | Mehrdrahtbusleitungssystem |
DE4225203A1 (de) * | 1992-07-30 | 1992-12-03 | Siemens Ag | Digitales kommunikationsnetz |
EP0589499B1 (en) * | 1992-08-12 | 1999-04-07 | Koninklijke Philips Electronics N.V. | A multistation communication bus system, and a master station and a slave station for use in such system |
DE4226876C2 (de) * | 1992-08-13 | 1997-08-28 | Rohde & Schwarz | Serielles BUS-System |
TW230808B (en) * | 1993-06-04 | 1994-09-21 | Philips Electronics Nv | A two-line mixed analog/digital bus system and a station for use in such a system |
DE4412549A1 (de) * | 1994-04-12 | 1994-09-15 | Wolfgang Kunz | Serielles Datenübertragungssystem für Systemkomponenten mit niedriger Schaltfrequenz |
GB2341468B (en) * | 1994-11-09 | 2000-04-26 | Adaptec Inc | Serial port for a host adapter integrated circuit using a single terminal |
US5826068A (en) | 1994-11-09 | 1998-10-20 | Adaptec, Inc. | Integrated circuit with a serial port having only one pin |
DE19501800A1 (de) * | 1995-01-21 | 1996-07-25 | Zahnradfabrik Friedrichshafen | Fehlererkennung und Fehlerbeseitigung bei einem seriellen Datenbussystem |
DE59605246D1 (de) * | 1996-02-16 | 2000-06-21 | Heidenhain Gmbh Dr Johannes | Vorrichtung und Verfahren zur Umschaltung zwischen verschiedenen Betriebsmodi eines Messwertaufnehmers |
DE19614237C1 (de) * | 1996-04-10 | 1997-12-11 | Siemens Ag | Kommunikationssystem mit einer Meisterstation und mindestens einer Sklavenstation |
DE19614238C1 (de) | 1996-04-10 | 1997-12-11 | Siemens Ag | Kommunikationssystem mit einer Meisterstation und mindestens einer Sklavenstation |
JP3511339B2 (ja) * | 1996-04-17 | 2004-03-29 | 三菱電機株式会社 | 通信装置 |
US5878234A (en) * | 1996-09-10 | 1999-03-02 | Sierra Wireless, Inc. | Low power serial protocol translator for use in multi-circuit board electronic systems |
JPH10198633A (ja) * | 1997-01-08 | 1998-07-31 | Mitsubishi Electric Corp | シリアルデータ転送装置 |
TW362178B (en) * | 1997-01-30 | 1999-06-21 | Nxp Bv | Electronic apparatus |
FR2775091B1 (fr) | 1998-02-16 | 2000-04-28 | Matra Communication | Procede de transfert de donnees en serie, et interface de bus serie synchrone mettant en oeuvre un tel procede |
DE19819745A1 (de) * | 1998-05-02 | 1999-11-04 | Send Signal Elektronik Und Net | Verfahren zur Datenübertragung |
DE19903412C1 (de) * | 1999-01-29 | 2000-08-24 | Elsa Ag | Verfahren zum Betrieb einer Shutterbrille |
AU7614200A (en) * | 1999-09-23 | 2001-04-24 | Digital Harmony Technologies, Inc. | Method and apparatus for distributed synchronization signal |
DE10052627A1 (de) * | 2000-10-24 | 2002-05-08 | Abb Patent Gmbh | Anordnung zur Identifikation der logischen Zusammensetzung eines modular aufgebauten Systems |
DE10144316B4 (de) * | 2001-09-10 | 2006-03-02 | Lisa Dräxlmaier GmbH | Bussystem nach dem Master-Slave-Prinzip |
JP2003316338A (ja) | 2002-02-21 | 2003-11-07 | Samsung Electronics Co Ltd | デジタルデータ送受信回路を備える平板ディスプレイ装置(flatpaneldisplayhavingtransmittingandreceivingcircuitfordigitalinterface) |
GB2388501A (en) | 2002-05-09 | 2003-11-12 | Sony Uk Ltd | Data packet and clock signal transmission via different paths |
JP4763996B2 (ja) * | 2004-11-04 | 2011-08-31 | キヤノン株式会社 | シリアル通信システム |
JP4856090B2 (ja) * | 2004-11-16 | 2012-01-18 | エヌエックスピー ビー ヴィ | バス通信システム |
EP1932288B1 (en) | 2005-09-21 | 2010-03-03 | Nxp B.V. | Bus circuit |
JP4996880B2 (ja) | 2006-06-08 | 2012-08-08 | 日本オプネクスト株式会社 | 双方向通信システムおよび校正器 |
JP4790854B2 (ja) * | 2010-06-23 | 2011-10-12 | 株式会社ソフイア | 遊技機 |
JP4782235B2 (ja) * | 2010-06-23 | 2011-09-28 | 株式会社ソフイア | 遊技機 |
JP4782234B2 (ja) * | 2010-06-23 | 2011-09-28 | 株式会社ソフイア | 遊技機 |
JP4790855B2 (ja) * | 2010-06-23 | 2011-10-12 | 株式会社ソフイア | 遊技機 |
JP4782233B2 (ja) * | 2010-06-23 | 2011-09-28 | 株式会社ソフイア | 遊技機 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL7313756A (ko) * | 1972-10-11 | 1974-04-16 | ||
JPS5148845A (ja) * | 1974-10-25 | 1976-04-27 | Hitachi Ltd | Mizogatateishuhajudoro |
JPS51113524A (en) * | 1975-03-31 | 1976-10-06 | Advantest Corp | Data transfer controlling system |
DE2837214A1 (de) * | 1978-08-25 | 1980-03-06 | Siemens Ag | Anordnung zum uebertragen von digitalen datensignalen |
-
1980
- 1980-10-31 NL NL8005976A patent/NL8005976A/nl not_active Application Discontinuation
-
1981
- 1981-10-22 EP EP81201168A patent/EP0051332B1/en not_active Expired
- 1981-10-22 DE DE8181201168T patent/DE3163103D1/de not_active Expired
- 1981-10-22 AT AT81201168T patent/ATE7086T1/de active
- 1981-10-28 CA CA000388944A patent/CA1194574A/en not_active Expired
- 1981-10-30 AU AU76995/81A patent/AU546567B2/en not_active Expired
- 1981-10-30 JP JP56173169A patent/JPS57106262A/ja active Granted
- 1981-10-31 KR KR1019810004239A patent/KR880001017B1/ko active
-
1984
- 1984-07-20 SG SG52184A patent/SG52184G/en unknown
-
1985
- 1985-05-23 HK HK403/85A patent/HK40385A/xx not_active IP Right Cessation
-
1988
- 1988-04-13 JP JP63089158A patent/JPS63288538A/ja active Granted
- 1988-04-13 JP JP63089157A patent/JPS63288537A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
HK40385A (en) | 1985-05-31 |
JPS6365178B2 (ko) | 1988-12-14 |
KR830008578A (ko) | 1983-12-10 |
DE3163103D1 (en) | 1984-05-17 |
JPS57106262A (en) | 1982-07-02 |
EP0051332B1 (en) | 1984-04-11 |
AU7699581A (en) | 1982-05-06 |
NL8005976A (nl) | 1982-05-17 |
JPS63288537A (ja) | 1988-11-25 |
JPS63288538A (ja) | 1988-11-25 |
JPH0319741B2 (ko) | 1991-03-15 |
ATE7086T1 (de) | 1984-04-15 |
CA1194574A (en) | 1985-10-01 |
KR880001017B1 (ko) | 1988-06-13 |
EP0051332A1 (en) | 1982-05-12 |
AU546567B2 (en) | 1985-09-05 |
JPH0319740B2 (ko) | 1991-03-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE3163103D1 (en) | Two-wire bus-system comprising a clock wire and a data wire for interconnecting a number of stations | |
GB8403406D0 (en) | Recording signal generation system | |
DE3568925D1 (en) | Timing recovery circuit for manchester coded data | |
JPS5639694A (en) | Method and device for synchrnonizing timing in transmission of digital information signal | |
EP0241905A3 (en) | Circuit board for on-line insertion in computer system | |
EP0179988A3 (en) | Circuit arrangement in telecommunication installations for synchronizing a locally generated clock signal with a clock signal received by way of digital information transmission telecommunication systems | |
ZA776433B (en) | Safety output unit for a data processing installation supplying binary signals | |
EP0150540A3 (en) | Method for data communication as well as a station for carrying out the method | |
GB2148558B (en) | Time signal clock | |
DE3269852D1 (en) | Circuit for reducing the rise-time of the flanks of a video signal, in particular for a video recorder | |
ZA847272B (en) | Data and signaling time slot transfer and processing system for a set of multiplex lines | |
DE3573203D1 (en) | Arrangement for the localisation of the transitions of a data signal in respect of a clock signal, and synchronisation mechanism using such an arrangement | |
FR2556907B1 (fr) | Circuit d'extraction de signaux d'horloge destine a un repeteur numerique | |
JPS56122539A (en) | System switching method | |
SE8400170L (sv) | Metod for synkronisering av pulstag i ett digitalt telefonisystem | |
JPS57168333A (en) | Transmission system for process signal | |
JPS57111137A (en) | Carrier signal transmission system by distribution line | |
JPS57174959A (en) | Continuous suppression system for same sign | |
PL263152A1 (en) | The system of a signalling device of a logic state change of an n-bite data bus | |
JPS641063A (en) | Restoring method for logic circuit diagram | |
GB8331017D0 (en) | Coinoperated timing system | |
JPS56158555A (en) | Failure retrieval system | |
JPS6490865A (en) | Train operation managing system | |
TW208077B (en) | The method of state information transmission | |
PL275630A1 (en) | A system for reproduction of the clock signal from a series, synchronic digital signal, especially in data transmission |