SG183820A1 - Method for producing a wafer provided with chips - Google Patents
Method for producing a wafer provided with chips Download PDFInfo
- Publication number
- SG183820A1 SG183820A1 SG2012063681A SG2012063681A SG183820A1 SG 183820 A1 SG183820 A1 SG 183820A1 SG 2012063681 A SG2012063681 A SG 2012063681A SG 2012063681 A SG2012063681 A SG 2012063681A SG 183820 A1 SG183820 A1 SG 183820A1
- Authority
- SG
- Singapore
- Prior art keywords
- wafer
- intermediate layer
- adhesion layer
- adhesion
- layer
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/50—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for positioning, orientation or alignment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P10/00—Bonding of wafers, substrates or parts of devices
- H10P10/12—Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
- H10P72/7412—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support the auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
- H10P72/7416—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
- H10P72/7418—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used during dicing or grinding of passive members, e.g. a chip mounting substrate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
- H10P72/7436—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used to support a device or a wafer when forming electrical connections thereto
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
- H10P72/744—Details of chemical or physical process used for separating the auxiliary support from a device or a wafer
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
- H10P72/744—Details of chemical or physical process used for separating the auxiliary support from a device or a wafer
- H10P72/7442—Separation by peeling
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
- H10P72/744—Details of chemical or physical process used for separating the auxiliary support from a device or a wafer
- H10P72/7442—Separation by peeling
- H10P72/7444—Separation by peeling using a peeling wedge, a knife or a bar
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/01—Manufacture or treatment
- H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
- H10W70/095—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers of vias therein
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
- H10W70/63—Vias, e.g. via plugs
- H10W70/635—Through-vias
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/0198—Manufacture or treatment batch processes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
- H10W72/07202—Connecting or disconnecting of bump connectors using auxiliary members
- H10W72/07204—Connecting or disconnecting of bump connectors using auxiliary members using temporary auxiliary members, e.g. sacrificial coatings
- H10W72/07207—Temporary substrates, e.g. removable substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/241—Dispositions, e.g. layouts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/01—Manufacture or treatment
- H10W74/014—Manufacture or treatment using batch processing
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/20—Configurations of stacked chips
- H10W90/22—Configurations of stacked chips the stacked chips being on both top and bottom sides of a package substrate, interposer or RDL
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/20—Configurations of stacked chips
- H10W90/297—Configurations of stacked chips characterised by the through-semiconductor vias [TSVs] in the stacked chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Pressure Welding/Diffusion-Bonding (AREA)
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/EP2010/002055 WO2011120537A1 (de) | 2010-03-31 | 2010-03-31 | Verfahren zur herstellung eines doppelseitig mit chips bestückten wafers |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| SG183820A1 true SG183820A1 (en) | 2012-10-30 |
Family
ID=42286741
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| SG2012063681A SG183820A1 (en) | 2010-03-31 | 2010-03-31 | Method for producing a wafer provided with chips |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US9224630B2 (https=) |
| EP (1) | EP2553719B1 (https=) |
| JP (1) | JP5763169B2 (https=) |
| KR (3) | KR20130040779A (https=) |
| CN (1) | CN102812546B (https=) |
| SG (1) | SG183820A1 (https=) |
| TW (1) | TWI518758B (https=) |
| WO (1) | WO2011120537A1 (https=) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9827757B2 (en) | 2011-07-07 | 2017-11-28 | Brewer Science Inc. | Methods of transferring device wafers or layers between carrier substrates and other surfaces |
| BR112016023471B1 (pt) * | 2014-04-09 | 2022-05-03 | Lionel O. Barthold | Sistema de transformação de potência de cc em cc de múltiplos módulos e sistema para regulação de transferência de potência |
| WO2020178080A1 (en) * | 2019-03-05 | 2020-09-10 | Evatec Ag | Method for processing fragile substrates employing temporary bonding of the substrates to carriers |
| WO2021164855A1 (de) | 2020-02-18 | 2021-08-26 | Ev Group E. Thallner Gmbh | Verfahren und vorrichtung zur übertragung von bauteilen |
| CN118891713A (zh) | 2022-03-25 | 2024-11-01 | Ev 集团 E·索尔纳有限责任公司 | 用于分离载体基板的方法和基板系统 |
| KR102788502B1 (ko) * | 2023-07-27 | 2025-04-01 | 한국기계연구원 | 효과적인 디본딩이 가능한 웨이퍼 모듈, 및 이의 본딩 및 디본딩 방법 |
| WO2025228530A1 (de) | 2024-05-02 | 2025-11-06 | Ev Group E. Thallner Gmbh | Verfahren zum temporären verbinden eines produktsubstrats und eines trägersubstrats, trägersubstrat, produktsubstrat und schichtsystem sowie deren anordnung und eine vorrichtung zum durchführen eines solchen verfahrens |
Family Cites Families (39)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6198784A (ja) * | 1984-10-20 | 1986-05-17 | Kimurashin Kk | ロール状又は積層状の両面接着テープ |
| JPH04283283A (ja) | 1991-03-08 | 1992-10-08 | Nippon Synthetic Chem Ind Co Ltd:The | 開封自在テープ |
| JP3686454B2 (ja) | 1995-05-10 | 2005-08-24 | 日東電工株式会社 | 接着型使捨てカイロ用粘着シート及びそのカイロ |
| WO1997039481A1 (en) | 1996-04-12 | 1997-10-23 | Northeastern University | An integrated complex-transition metal oxide device and a method of fabricating such a device |
| JPH11105924A (ja) | 1997-10-06 | 1999-04-20 | Nitto Denko Corp | 電子部品搬送用テ−プ |
| JPH11238375A (ja) * | 1998-02-20 | 1999-08-31 | Sony Corp | 電子機器の放熱装置とディスクドライブ装置 |
| JP2000326995A (ja) | 1999-05-17 | 2000-11-28 | Ogawa Sangyo Kk | 滅菌袋 |
| JP2002097041A (ja) | 2000-07-17 | 2002-04-02 | Sekisui Chem Co Ltd | 合わせガラス用中間膜及び合わせガラス |
| FR2823596B1 (fr) * | 2001-04-13 | 2004-08-20 | Commissariat Energie Atomique | Substrat ou structure demontable et procede de realisation |
| JP3861669B2 (ja) | 2001-11-22 | 2006-12-20 | ソニー株式会社 | マルチチップ回路モジュールの製造方法 |
| JP2003218063A (ja) * | 2002-01-24 | 2003-07-31 | Canon Inc | ウエハ貼着用粘着シート及び該シートを利用する加工方法 |
| US6794273B2 (en) | 2002-05-24 | 2004-09-21 | Fujitsu Limited | Semiconductor device and manufacturing method thereof |
| JP4565804B2 (ja) | 2002-06-03 | 2010-10-20 | スリーエム イノベイティブ プロパティズ カンパニー | 被研削基材を含む積層体、その製造方法並びに積層体を用いた極薄基材の製造方法及びそのための装置 |
| JP4364535B2 (ja) * | 2003-03-27 | 2009-11-18 | シャープ株式会社 | 半導体装置の製造方法 |
| JP4405246B2 (ja) | 2003-11-27 | 2010-01-27 | スリーエム イノベイティブ プロパティズ カンパニー | 半導体チップの製造方法 |
| US7232740B1 (en) | 2005-05-16 | 2007-06-19 | The United States Of America As Represented By The National Security Agency | Method for bumping a thin wafer |
| US8592286B2 (en) | 2005-10-05 | 2013-11-26 | Stats Chippac Ltd. | Ultra-thin wafer system and method of manufacture thereof |
| DE102006000687B4 (de) | 2006-01-03 | 2010-09-09 | Thallner, Erich, Dipl.-Ing. | Kombination aus einem Träger und einem Wafer, Vorrichtung zum Trennen der Kombination und Verfahren zur Handhabung eines Trägers und eines Wafers |
| US20080003780A1 (en) * | 2006-06-30 | 2008-01-03 | Haixiao Sun | Detachable stiffener for ultra-thin die |
| US20080044984A1 (en) * | 2006-08-16 | 2008-02-21 | Taiwan Semiconductor Manufacturing Co., Ltd. | Methods of avoiding wafer breakage during manufacture of backside illuminated image sensors |
| US7838391B2 (en) * | 2007-05-07 | 2010-11-23 | Stats Chippac, Ltd. | Ultra thin bumped wafer with under-film |
| JP2009043962A (ja) * | 2007-08-09 | 2009-02-26 | Sony Corp | 半導体装置の製造方法 |
| US9111981B2 (en) | 2008-01-24 | 2015-08-18 | Brewer Science Inc. | Method for reversibly mounting a device wafer to a carrier substrate |
| EP2104138A1 (de) | 2008-03-18 | 2009-09-23 | EV Group E. Thallner GmbH | Verfahren zum Bonden von Chips auf Wafer |
| JP4572243B2 (ja) * | 2008-03-27 | 2010-11-04 | 信越化学工業株式会社 | 熱伝導性積層体およびその製造方法 |
| JP2010010644A (ja) * | 2008-05-27 | 2010-01-14 | Toshiba Corp | 半導体装置の製造方法 |
| JP2010092931A (ja) * | 2008-10-03 | 2010-04-22 | Toshiba Corp | 半導体装置の製造方法及び半導体装置の製造装置 |
| US8267143B2 (en) | 2009-04-16 | 2012-09-18 | Suss Microtec Lithography, Gmbh | Apparatus for mechanically debonding temporary bonded semiconductor wafers |
| US8689437B2 (en) * | 2009-06-24 | 2014-04-08 | International Business Machines Corporation | Method for forming integrated circuit assembly |
| EP2299486B1 (de) * | 2009-09-18 | 2015-02-18 | EV Group E. Thallner GmbH | Verfahren zum Bonden von Chips auf Wafer |
| US8008121B2 (en) * | 2009-11-04 | 2011-08-30 | Stats Chippac, Ltd. | Semiconductor package and method of mounting semiconductor die to opposite sides of TSV substrate |
| US9136144B2 (en) * | 2009-11-13 | 2015-09-15 | Stats Chippac, Ltd. | Method of forming protective material between semiconductor die stacked on semiconductor wafer to reduce defects during singulation |
| US8017439B2 (en) * | 2010-01-26 | 2011-09-13 | Texas Instruments Incorporated | Dual carrier for joining IC die or wafers to TSV wafers |
| TWI419302B (zh) * | 2010-02-11 | 2013-12-11 | 日月光半導體製造股份有限公司 | 封裝製程 |
| US8252682B2 (en) * | 2010-02-12 | 2012-08-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for thinning a wafer |
| JP4976522B2 (ja) * | 2010-04-16 | 2012-07-18 | 日東電工株式会社 | 熱硬化型ダイボンドフィルム、ダイシング・ダイボンドフィルム、及び、半導体装置の製造方法 |
| US8852391B2 (en) * | 2010-06-21 | 2014-10-07 | Brewer Science Inc. | Method and apparatus for removing a reversibly mounted device wafer from a carrier substrate |
| US8492197B2 (en) * | 2010-08-17 | 2013-07-23 | Stats Chippac, Ltd. | Semiconductor device and method of forming vertically offset conductive pillars over first substrate aligned to vertically offset BOT interconnect sites formed over second substrate |
| JP2012069919A (ja) * | 2010-08-25 | 2012-04-05 | Toshiba Corp | 半導体装置の製造方法 |
-
2010
- 2010-03-31 SG SG2012063681A patent/SG183820A1/en unknown
- 2010-03-31 KR KR1020127023406A patent/KR20130040779A/ko not_active Ceased
- 2010-03-31 US US13/635,457 patent/US9224630B2/en active Active
- 2010-03-31 KR KR1020167016168A patent/KR20160075845A/ko not_active Ceased
- 2010-03-31 EP EP10715497.3A patent/EP2553719B1/de active Active
- 2010-03-31 CN CN201080065914.6A patent/CN102812546B/zh active Active
- 2010-03-31 JP JP2013501635A patent/JP5763169B2/ja active Active
- 2010-03-31 WO PCT/EP2010/002055 patent/WO2011120537A1/de not_active Ceased
- 2010-03-31 KR KR1020177009655A patent/KR101856429B1/ko active Active
-
2011
- 2011-02-25 TW TW100106549A patent/TWI518758B/zh active
Also Published As
| Publication number | Publication date |
|---|---|
| EP2553719A1 (de) | 2013-02-06 |
| US20130011997A1 (en) | 2013-01-10 |
| EP2553719B1 (de) | 2019-12-04 |
| CN102812546B (zh) | 2015-08-26 |
| WO2011120537A1 (de) | 2011-10-06 |
| JP2013524493A (ja) | 2013-06-17 |
| KR20130040779A (ko) | 2013-04-24 |
| US9224630B2 (en) | 2015-12-29 |
| TW201145370A (en) | 2011-12-16 |
| TWI518758B (zh) | 2016-01-21 |
| JP5763169B2 (ja) | 2015-08-12 |
| CN102812546A (zh) | 2012-12-05 |
| KR20170042817A (ko) | 2017-04-19 |
| KR101856429B1 (ko) | 2018-05-09 |
| KR20160075845A (ko) | 2016-06-29 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US9224630B2 (en) | Method for producing a wafer provided with chips | |
| EP2162907B1 (fr) | Dispositif comportant des composants encastrés dans des cavités d'une plaquette d'accueil et procédé correspondant | |
| US20050221598A1 (en) | Wafer support and release in wafer processing | |
| US8383460B1 (en) | Method for fabricating through substrate vias in semiconductor substrate | |
| US8293063B2 (en) | Combination of a substrate and a wafer | |
| US8846499B2 (en) | Composite carrier structure | |
| US9355881B2 (en) | Semiconductor device including a dielectric material | |
| CN104871309B (zh) | 背靠背堆叠集成电路组合件以及制作方法 | |
| TW447025B (en) | Process for precision alignment of chips for mounting on a substrate | |
| US20070048902A1 (en) | Microfeature workpieces, carriers, and associated methods | |
| KR102061369B1 (ko) | 제품 기판을 캐리어 기판에 임시로 결합하기 위한 방법 | |
| CN107567651B (zh) | 具有贯通电极的布线基板及其制造方法 | |
| JPH0256987A (ja) | 混成集積回路の実装方法 | |
| US20160163590A1 (en) | Methods of manufacturing semiconductor devices | |
| US20260026387A1 (en) | Method and apparatus for debonding temporarily bonded wafers in wafer-level packaging applications | |
| JP2015508234A (ja) | 電子デバイスの三次元実装のための方法 | |
| CN107851632B (zh) | 用于制造半导体器件的方法及相应的器件 | |
| US7846776B2 (en) | Methods for releasably attaching sacrificial support members to microfeature workpieces and microfeature devices formed using such methods | |
| JP2013236016A (ja) | 半導体装置の製造方法 | |
| CN110444504B (zh) | 半导体装置组合件及其制造方法 | |
| WO2014108442A1 (en) | Method of application of a carrier to a device wafer | |
| WO2013162834A1 (en) | Method of forming a permanently supported lamina | |
| JP7451028B2 (ja) | 保護シートの配設方法 | |
| JP5187075B2 (ja) | 半導体装置の実装方法 | |
| CN121039788A (zh) | 半导体装置的制造方法 |