SG154390A1 - Wafer processing method for processing wafer having bumps formed thereon - Google Patents

Wafer processing method for processing wafer having bumps formed thereon

Info

Publication number
SG154390A1
SG154390A1 SG200809509-3A SG2008095093A SG154390A1 SG 154390 A1 SG154390 A1 SG 154390A1 SG 2008095093 A SG2008095093 A SG 2008095093A SG 154390 A1 SG154390 A1 SG 154390A1
Authority
SG
Singapore
Prior art keywords
wafer
bump region
resin layer
processing
bumps
Prior art date
Application number
SG200809509-3A
Other languages
English (en)
Inventor
Masaki Kanazawa
Hajime Akahori
Original Assignee
Tokyo Seimitsu Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Seimitsu Co Ltd filed Critical Tokyo Seimitsu Co Ltd
Publication of SG154390A1 publication Critical patent/SG154390A1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
    • B24B37/042—Lapping machines or devices; Accessories designed for working plane surfaces operating processes therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00013—Fully indexed content
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01068—Erbium [Er]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]

Landscapes

  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Constituent Portions Of Griding Lathes, Driving, Sensing And Control (AREA)
  • Grinding Of Cylindrical And Plane Surfaces (AREA)
SG200809509-3A 2008-01-30 2008-12-22 Wafer processing method for processing wafer having bumps formed thereon SG154390A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008018927A JP5197037B2 (ja) 2008-01-30 2008-01-30 バンプが形成されたウェーハを処理するウェーハ処理方法

Publications (1)

Publication Number Publication Date
SG154390A1 true SG154390A1 (en) 2009-08-28

Family

ID=40874225

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200809509-3A SG154390A1 (en) 2008-01-30 2008-12-22 Wafer processing method for processing wafer having bumps formed thereon

Country Status (6)

Country Link
US (1) US8052505B2 (ko)
JP (1) JP5197037B2 (ko)
KR (1) KR101058922B1 (ko)
DE (1) DE102009006237B4 (ko)
SG (1) SG154390A1 (ko)
TW (1) TWI390622B (ko)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5335593B2 (ja) * 2009-07-23 2013-11-06 株式会社ディスコ 研削装置のチャックテーブル
JP5836757B2 (ja) * 2011-11-02 2015-12-24 株式会社ディスコ 板状物の研削方法
JP6009217B2 (ja) * 2012-05-18 2016-10-19 株式会社ディスコ 保護部材の貼着方法
JP7157301B2 (ja) 2017-11-06 2022-10-20 株式会社東京精密 ウェーハの加工方法
KR102233125B1 (ko) 2020-07-10 2021-03-29 이지복 인공치아 가공장치 및 상기 장치로 가공된 인공치아
CN114770366B (zh) * 2022-05-17 2023-11-17 西安奕斯伟材料科技股份有限公司 一种硅片双面研磨装置的静压板及硅片双面研磨装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040157359A1 (en) * 2003-02-07 2004-08-12 Lockheed Martin Corporation Method for planarizing bumped die
JP2005311402A (ja) * 2005-07-22 2005-11-04 Seiko Epson Corp 半導体装置の製造方法
US7105424B2 (en) * 2003-12-26 2006-09-12 Advanced Semiconductor Engineering, Inc. Method for preparing arylphosphonite antioxidant

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7059942B2 (en) * 2000-09-27 2006-06-13 Strasbaugh Method of backgrinding wafers while leaving backgrinding tape on a chuck
JP2003051473A (ja) * 2001-08-03 2003-02-21 Disco Abrasive Syst Ltd 半導体ウェーハの裏面研削方法
JP2003168664A (ja) * 2001-11-30 2003-06-13 Seiko Epson Corp 半導体装置の製造方法及び半導体ウェハ、ウェハ保護テープ
JP2004079951A (ja) * 2002-08-22 2004-03-11 Seiko Epson Corp 半導体装置及びその製造方法、回路基板並びに電子機器
JP2004288725A (ja) * 2003-03-19 2004-10-14 Citizen Watch Co Ltd 半導体装置の製造方法，この製造方法に用いるシール部材及びこのシール部材の供給装置
US7025891B2 (en) * 2003-08-29 2006-04-11 International Business Machines Corporation Method of polishing C4 molybdenum masks to remove molybdenum peaks
JP4447280B2 (ja) * 2003-10-16 2010-04-07 リンテック株式会社 表面保護用シートおよび半導体ウエハの研削方法
US7135124B2 (en) * 2003-11-13 2006-11-14 International Business Machines Corporation Method for thinning wafers that have contact bumps
JP2005109433A (ja) 2004-03-31 2005-04-21 Disco Abrasive Syst Ltd 半導体ウエーハの切削方法および研削用のバンプ保護部材
JP2005303214A (ja) 2004-04-16 2005-10-27 Matsushita Electric Ind Co Ltd 半導体ウェーハの研削方法
JP2007043101A (ja) * 2005-06-30 2007-02-15 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040157359A1 (en) * 2003-02-07 2004-08-12 Lockheed Martin Corporation Method for planarizing bumped die
US7105424B2 (en) * 2003-12-26 2006-09-12 Advanced Semiconductor Engineering, Inc. Method for preparing arylphosphonite antioxidant
JP2005311402A (ja) * 2005-07-22 2005-11-04 Seiko Epson Corp 半導体装置の製造方法

Also Published As

Publication number Publication date
JP5197037B2 (ja) 2013-05-15
TW200949920A (en) 2009-12-01
KR101058922B1 (ko) 2011-08-24
TWI390622B (zh) 2013-03-21
KR20090083845A (ko) 2009-08-04
US20090191796A1 (en) 2009-07-30
US8052505B2 (en) 2011-11-08
DE102009006237B4 (de) 2011-12-08
DE102009006237A1 (de) 2009-08-20
JP2009182099A (ja) 2009-08-13

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