SG11202112361PA - Method for evaluating pickability, film for combined dicing and die bonding, method for evaluating and method for classifying film for combined dicing and die bonding, and method for manufacturing semiconductor device - Google Patents

Method for evaluating pickability, film for combined dicing and die bonding, method for evaluating and method for classifying film for combined dicing and die bonding, and method for manufacturing semiconductor device

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Publication number
SG11202112361PA
SG11202112361PA SG11202112361PA SG11202112361PA SG11202112361PA SG 11202112361P A SG11202112361P A SG 11202112361PA SG 11202112361P A SG11202112361P A SG 11202112361PA SG 11202112361P A SG11202112361P A SG 11202112361PA SG 11202112361P A SG11202112361P A SG 11202112361PA
Authority
SG
Singapore
Prior art keywords
dicing
evaluating
film
combined
die bonding
Prior art date
Application number
SG11202112361PA
Other languages
English (en)
Inventor
Tsuyoshi Tazawa
Naohiro Kimura
Keisuke Ohkubo
Yoshinobu Ozaki
Original Assignee
Showa Denko Materials Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Showa Denko Materials Co Ltd filed Critical Showa Denko Materials Co Ltd
Publication of SG11202112361PA publication Critical patent/SG11202112361PA/en

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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
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    • G01MEASURING; TESTING
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    • G01N19/00Investigating materials by mechanical methods
    • G01N19/04Measuring adhesive force between materials, e.g. of sealing tape, of coating
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    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • H01L24/92Specific sequence of method steps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Biochemistry (AREA)
  • General Health & Medical Sciences (AREA)
  • Immunology (AREA)
  • Pathology (AREA)
  • Dicing (AREA)
  • Die Bonding (AREA)
SG11202112361PA 2019-05-10 2019-05-10 Method for evaluating pickability, film for combined dicing and die bonding, method for evaluating and method for classifying film for combined dicing and die bonding, and method for manufacturing semiconductor device SG11202112361PA (en)

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JP2009130332A (ja) * 2007-11-28 2009-06-11 Oki Semiconductor Co Ltd 半導体装置の製造方法
JP2010263041A (ja) * 2009-05-01 2010-11-18 Nitto Denko Corp ダイアタッチフィルム付きダイシングテープおよび半導体装置の製造方法
JP5534986B2 (ja) * 2010-07-09 2014-07-02 古河電気工業株式会社 ウエハ加工用テープ
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JP2012153819A (ja) * 2011-01-27 2012-08-16 Lintec Corp 接着剤組成物および接着シート
JP2012222002A (ja) * 2011-04-04 2012-11-12 Nitto Denko Corp ダイシング・ダイボンドフィルム、及び、半導体装置の製造方法
JP5294358B2 (ja) * 2012-01-06 2013-09-18 古河電気工業株式会社 ウエハ加工用テープ及びこれを使用した半導体装置の製造方法
JP6028461B2 (ja) * 2012-08-24 2016-11-16 日立化成株式会社 半導体装置の製造方法及び半導体装置
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CN113348533A (zh) 2021-09-03
TW202104870A (zh) 2021-02-01
JPWO2020230211A1 (ja) 2021-06-03
WO2020230211A1 (ja) 2020-11-19

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