SG11202011164PA - Method for manufacturing semiconductor device - Google Patents

Method for manufacturing semiconductor device

Info

Publication number
SG11202011164PA
SG11202011164PA SG11202011164PA SG11202011164PA SG11202011164PA SG 11202011164P A SG11202011164P A SG 11202011164PA SG 11202011164P A SG11202011164P A SG 11202011164PA SG 11202011164P A SG11202011164P A SG 11202011164PA SG 11202011164P A SG11202011164P A SG 11202011164PA
Authority
SG
Singapore
Prior art keywords
semiconductor device
manufacturing semiconductor
manufacturing
semiconductor
Prior art date
Application number
SG11202011164PA
Other languages
English (en)
Inventor
Naoko Tsuji
Original Assignee
Daicel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Daicel Corp filed Critical Daicel Corp
Publication of SG11202011164PA publication Critical patent/SG11202011164PA/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J183/00—Adhesives based on macromolecular compounds obtained by reactions forming in the main chain of the macromolecule a linkage containing silicon, with or without sulfur, nitrogen, oxygen, or carbon only; Adhesives based on derivatives of such polymers
    • C09J183/04—Polysiloxanes
    • C09J183/06—Polysiloxanes containing silicon bound to oxygen-containing groups
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02057—Cleaning during device manufacture
    • H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
    • H01L21/02063—Cleaning during device manufacture during, before or after processing of insulating layers the processing being the formation of vias or contact holes
    • H—ELECTRICITY
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    • H01L21/02057—Cleaning during device manufacture
    • H01L21/02068—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
    • H01L21/02071—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers the processing being a delineation, e.g. RIE, of conductive layers
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    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
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    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
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    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
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    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
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    • C08G—MACROMOLECULAR COMPOUNDS OBTAINED OTHERWISE THAN BY REACTIONS ONLY INVOLVING UNSATURATED CARBON-TO-CARBON BONDS
    • C08G77/00—Macromolecular compounds obtained by reactions forming a linkage containing silicon with or without sulfur, nitrogen, oxygen or carbon in the main chain of the macromolecule
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Organic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
SG11202011164PA 2018-05-28 2019-05-27 Method for manufacturing semiconductor device SG11202011164PA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2018101929 2018-05-28
PCT/JP2019/020955 WO2019230668A1 (ja) 2018-05-28 2019-05-27 半導体装置製造方法

Publications (1)

Publication Number Publication Date
SG11202011164PA true SG11202011164PA (en) 2020-12-30

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CN117747504B (zh) * 2023-12-20 2024-07-19 西安赛富乐斯半导体科技有限公司 粘合胶层厚度调整方法

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3200475B2 (ja) * 1992-10-05 2001-08-20 三菱電機株式会社 半導体装置の製造方法
JPH10135328A (ja) * 1996-10-30 1998-05-22 Kawasaki Steel Corp 半導体装置の配線形成方法
JPH1074891A (ja) * 1997-08-07 1998-03-17 Nec Corp 半導体装置
US6399512B1 (en) * 2000-06-15 2002-06-04 Cypress Semiconductor Corporation Method of making metallization and contact structures in an integrated circuit comprising an etch stop layer
US6355563B1 (en) * 2001-03-05 2002-03-12 Chartered Semiconductor Manufacturing Ltd. Versatile copper-wiring layout design with low-k dielectric integration
JP3967239B2 (ja) * 2001-09-20 2007-08-29 株式会社フジクラ 充填金属部付き部材の製造方法及び充填金属部付き部材
US6713402B2 (en) * 2002-05-31 2004-03-30 Texas Instruments Incorporated Methods for polymer removal following etch-stop layer etch
WO2004064147A2 (en) * 2003-01-07 2004-07-29 Applied Materials, Inc. Integration of ald/cvd barriers with porous low k materials
US7207339B2 (en) * 2003-12-17 2007-04-24 Taiwan Semiconductor Manufacturing Co., Ltd. Method for cleaning a plasma enhanced CVD chamber
US7453150B1 (en) * 2004-04-01 2008-11-18 Rensselaer Polytechnic Institute Three-dimensional face-to-face integration assembly
JP2009194017A (ja) * 2008-02-12 2009-08-27 Elpida Memory Inc 半導体装置の製造方法
TWI405321B (zh) * 2009-09-08 2013-08-11 Ind Tech Res Inst 三維多層堆疊半導體結構及其製造方法
JP5578616B2 (ja) * 2009-12-21 2014-08-27 信越化学工業株式会社 シリコーン樹脂組成物及びその硬化物
JP2012009473A (ja) * 2010-06-22 2012-01-12 Panasonic Corp 半導体装置及びその製造方法
WO2013184880A1 (en) * 2012-06-07 2013-12-12 Rensselaer Polytechnic Institute Use of conformal coating elastic cushion to reduce through silicon vias (tsv) stress in 3-dimensional integration
US9269562B2 (en) 2013-01-17 2016-02-23 Applied Materials, Inc. In situ chamber clean with inert hydrogen helium mixture during wafer process
JP5914833B2 (ja) * 2013-03-11 2016-05-11 パナソニックＩｐマネジメント株式会社 プラズマクリーニング装置のメンテナンス方法
JP5975918B2 (ja) * 2013-03-27 2016-08-23 富士フイルム株式会社 半導体装置製造用仮接合用積層体、および、半導体装置の製造方法
US9299640B2 (en) 2013-07-16 2016-03-29 Taiwan Semiconductor Manufacturing Co., Ltd. Front-to-back bonding with through-substrate via (TSV)
JP6440291B2 (ja) * 2014-02-28 2018-12-19 国立大学法人東京工業大学 半導体装置及びその製造方法
JP6391999B2 (ja) 2014-06-13 2018-09-19 株式会社ディスコ 積層デバイスの製造方法
JP6429388B2 (ja) 2015-03-19 2018-11-28 株式会社ディスコ 積層デバイスの製造方法
EP3113216B1 (en) * 2015-07-01 2021-05-19 IMEC vzw A method for bonding and interconnecting integrated circuit devices

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