SG11202009335RA - Method for transferring a piezoelectric layer onto a support substrate - Google Patents

Method for transferring a piezoelectric layer onto a support substrate

Info

Publication number
SG11202009335RA
SG11202009335RA SG11202009335RA SG11202009335RA SG11202009335RA SG 11202009335R A SG11202009335R A SG 11202009335RA SG 11202009335R A SG11202009335R A SG 11202009335RA SG 11202009335R A SG11202009335R A SG 11202009335RA SG 11202009335R A SG11202009335R A SG 11202009335RA
Authority
SG
Singapore
Prior art keywords
transferring
support substrate
piezoelectric layer
layer onto
onto
Prior art date
Application number
SG11202009335RA
Other languages
English (en)
Inventor
Djamel Belhachemi
Thierry Barge
Original Assignee
Soitec Silicon On Insulator
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec Silicon On Insulator filed Critical Soitec Silicon On Insulator
Publication of SG11202009335RA publication Critical patent/SG11202009335RA/en

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00—Piezoelectric or electrostrictive devices
    • H10N30/01—Manufacture or treatment
    • H10N30/05—Manufacture of multilayered piezoelectric or electrostrictive devices, or parts thereof, e.g. by stacking piezoelectric bodies and electrodes
    • H10N30/057—Manufacture of multilayered piezoelectric or electrostrictive devices, or parts thereof, e.g. by stacking piezoelectric bodies and electrodes by stacking bulk piezoelectric or electrostrictive bodies and electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00—Piezoelectric or electrostrictive devices
    • H10N30/01—Manufacture or treatment
    • H10N30/07—Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base
    • H10N30/072—Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base by laminating or bonding of piezoelectric or electrostrictive bodies
    • H10N30/073—Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base by laminating or bonding of piezoelectric or electrostrictive bodies by fusion of metals or by adhesives
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
    • H03H3/02—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
    • H03H3/02—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
    • H03H2003/025—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks the resonators or networks comprising an acoustic mirror

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
  • Piezo-Electric Transducers For Audible Bands (AREA)
SG11202009335RA 2018-03-26 2019-03-21 Method for transferring a piezoelectric layer onto a support substrate SG11202009335RA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1852573A FR3079346B1 (fr) 2018-03-26 2018-03-26 Procede de fabrication d'un substrat donneur pour le transfert d'une couche piezoelectrique, et procede de transfert d'une telle couche piezoelectrique
PCT/FR2019/050645 WO2019186032A1 (fr) 2018-03-26 2019-03-21 Procede de transfert d'une couche piezoelectrique sur un substrat support

Publications (1)

Publication Number Publication Date
SG11202009335RA true SG11202009335RA (en) 2020-10-29

Family

ID=62816717

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11202009335RA SG11202009335RA (en) 2018-03-26 2019-03-21 Method for transferring a piezoelectric layer onto a support substrate

Country Status (8)

Country Link
US (1) US20210020826A1 (de)
EP (1) EP3776641B1 (de)
JP (1) JP7256204B2 (de)
KR (1) KR102671192B1 (de)
CN (1) CN111919290B (de)
FR (1) FR3079346B1 (de)
SG (1) SG11202009335RA (de)
WO (1) WO2019186032A1 (de)

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FR3108788A1 (fr) * 2020-03-24 2021-10-01 Soitec Procédé de fabrication d’une structure piézoélectrique pour dispositif radiofréquence et pouvant servir pour le transfert d’une couche piézoélectrique, et procédé de transfert d’une telle couche piézoélectrique
FR3108789B1 (fr) * 2020-03-24 2023-12-08 Soitec Silicon On Insulator Procédé de fabrication d’une structure piézoélectrique pour dispositif radiofréquence et pouvant servir pour le transfert d’une couche piézoélectrique, et procédé de transfert d’une telle couche piézoélectrique
FR3120985B1 (fr) 2021-03-19 2023-03-31 Soitec Silicon On Insulator Procédé de fabrication d’une hétérostructure
CN113394338A (zh) * 2021-04-28 2021-09-14 上海新硅聚合半导体有限公司 一种异质单晶薄膜的制备方法及异质单晶薄膜
FR3131436A1 (fr) * 2021-12-23 2023-06-30 Soitec Procede de fabrication d’un substrat donneur
FR3131979A1 (fr) 2022-01-17 2023-07-21 Soitec Procédé de fabrication d’un substrat donneur pour le transfert d’une couche piézoélectrique et procédé de transfert d’une couche piézoélectrique sur un substrat support
FR3131980B1 (fr) 2022-01-17 2024-01-12 Soitec Silicon On Insulator Procédé de fabrication d’un substrat donneur pour le transfert d’une couche piézoélectrique et procédé de transfert d’une couche piézoélectrique sur un substrat support
WO2024018149A1 (fr) 2022-07-19 2024-01-25 Soitec Procédé de fabrication d'un substrat support pour application radiofréquences
FR3138239A1 (fr) 2022-07-19 2024-01-26 Soitec Procédé de fabrication d’un substrat support pour application radiofréquences
WO2024051945A1 (en) * 2022-09-08 2024-03-14 Huawei Technologies Co., Ltd. Surface acoustic wave device, and radio frequency filter and multiplexer comprising the same
FR3140474A1 (fr) 2022-09-30 2024-04-05 Soitec Substrat donneur et Procédé de fabrication d’un substrat donneur pour être utilisé dans un procédé de transfert de couche mince piézoélectrique.

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FR2788176B1 (fr) * 1998-12-30 2001-05-25 Thomson Csf Dispositif a ondes acoustiques guidees dans une fine couche de materiau piezo-electrique collee par une colle moleculaire sur un substrat porteur et procede de fabrication
US8507361B2 (en) * 2000-11-27 2013-08-13 Soitec Fabrication of substrates with a useful layer of monocrystalline semiconductor material
JP2002217666A (ja) * 2001-01-24 2002-08-02 Hitachi Ltd 弾性表面波素子およびその製造方法
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FR2983342B1 (fr) * 2011-11-30 2016-05-20 Soitec Silicon On Insulator Procede de fabrication d'une heterostructure limitant la formation de defauts et heterostructure ainsi obtenue
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KR20140140188A (ko) * 2013-05-28 2014-12-09 삼성디스플레이 주식회사 도너기판 및 이의 제조방법 및 이를 이용한 전사패턴 형성방법
FR3032555B1 (fr) * 2015-02-10 2018-01-19 Soitec Procede de report d'une couche utile
WO2017052646A1 (en) * 2015-09-25 2017-03-30 Intel Corporation Island transfer for optical, piezo and rf applications
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FR3045933B1 (fr) * 2015-12-22 2018-02-09 Soitec Substrat pour un dispositif a ondes acoustiques de surface ou a ondes acoustiques de volume compense en temperature
FR3045678B1 (fr) * 2015-12-22 2017-12-22 Soitec Silicon On Insulator Procede de fabrication d'une couche piezoelectrique monocristalline et dispositif microelectronique, photonique ou optique comprenant une telle couche
KR20180107212A (ko) * 2016-03-25 2018-10-01 엔지케이 인슐레이터 엘티디 접합 방법

Also Published As

Publication number Publication date
EP3776641B1 (de) 2024-05-15
CN111919290B (zh) 2024-03-01
CN111919290A (zh) 2020-11-10
EP3776641A1 (de) 2021-02-17
WO2019186032A1 (fr) 2019-10-03
KR20200135411A (ko) 2020-12-02
FR3079346B1 (fr) 2020-05-29
KR102671192B1 (ko) 2024-05-31
JP7256204B2 (ja) 2023-04-11
JP2021519536A (ja) 2021-08-10
US20210020826A1 (en) 2021-01-21
FR3079346A1 (fr) 2019-09-27

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