SG11202009447XA - Process for transferring a layer - Google Patents

Process for transferring a layer

Info

Publication number
SG11202009447XA
SG11202009447XA SG11202009447XA SG11202009447XA SG11202009447XA SG 11202009447X A SG11202009447X A SG 11202009447XA SG 11202009447X A SG11202009447X A SG 11202009447XA SG 11202009447X A SG11202009447X A SG 11202009447XA SG 11202009447X A SG11202009447X A SG 11202009447XA
Authority
SG
Singapore
Prior art keywords
transferring
layer
Prior art date
Application number
SG11202009447XA
Inventor
Djamel Belhachemi
Original Assignee
Soitec Silicon On Insulator
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec Silicon On Insulator filed Critical Soitec Silicon On Insulator
Publication of SG11202009447XA publication Critical patent/SG11202009447XA/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76256—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques using silicon etch back techniques, e.g. BESOI, ELTRAN

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Formation Of Insulating Films (AREA)
  • Recrystallisation Techniques (AREA)
  • Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
  • Element Separation (AREA)
SG11202009447XA 2018-03-29 2019-03-27 Process for transferring a layer SG11202009447XA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1800257A FR3079660B1 (en) 2018-03-29 2018-03-29 METHOD FOR TRANSFERRING A LAYER
PCT/IB2019/000206 WO2019186267A1 (en) 2018-03-29 2019-03-27 Layer transfer method

Publications (1)

Publication Number Publication Date
SG11202009447XA true SG11202009447XA (en) 2020-10-29

Family

ID=63407246

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11202009447XA SG11202009447XA (en) 2018-03-29 2019-03-27 Process for transferring a layer

Country Status (8)

Country Link
US (1) US11501997B2 (en)
EP (1) EP3776643A1 (en)
JP (1) JP7279284B2 (en)
KR (1) KR20200138320A (en)
CN (1) CN111902927A (en)
FR (1) FR3079660B1 (en)
SG (1) SG11202009447XA (en)
WO (1) WO2019186267A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3108788A1 (en) * 2020-03-24 2021-10-01 Soitec A method of manufacturing a piezoelectric structure for a radiofrequency device which can be used for the transfer of a piezoelectric layer, and a method of transferring such a piezoelectric layer
FR3108789B1 (en) * 2020-03-24 2023-12-08 Soitec Silicon On Insulator Method for manufacturing a piezoelectric structure for a radio frequency device and which can be used for the transfer of a piezoelectric layer, and method for transferring such a piezoelectric layer

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2816445B1 (en) 2000-11-06 2003-07-25 Commissariat Energie Atomique METHOD FOR MANUFACTURING A STACKED STRUCTURE COMPRISING A THIN LAYER ADHERING TO A TARGET SUBSTRATE
JP2006258958A (en) * 2005-03-15 2006-09-28 Shibaura Mechatronics Corp Method and device for bonding substrate
JP5137461B2 (en) * 2007-05-15 2013-02-06 株式会社半導体エネルギー研究所 Semiconductor device
FR2926672B1 (en) * 2008-01-21 2010-03-26 Soitec Silicon On Insulator PROCESS FOR MANUFACTURING LAYERS OF EPITAXY MATERIAL
FR2940852A1 (en) * 2009-04-22 2010-07-09 Commissariat Energie Atomique Micro-technological layer i.e. thin film, transferring method for use during formation of electronic, optical and mechanical component, involves causing detachment on porous layer so as to obtain transfer layer
US9184228B2 (en) * 2011-03-07 2015-11-10 Sumitomo Electric Industries, Ltd. Composite base including sintered base and base surface flattening layer, and composite substrate including that composite base and semiconductor crystalline layer
JP2013080897A (en) * 2011-09-22 2013-05-02 Sumitomo Chemical Co Ltd Composite substrate manufacturing method
US9257339B2 (en) * 2012-05-04 2016-02-09 Silicon Genesis Corporation Techniques for forming optoelectronic devices
US10582618B2 (en) * 2014-05-16 2020-03-03 The Regents Of The University Of California Fabrication of flexible electronic devices
JP6454606B2 (en) * 2015-06-02 2019-01-16 信越化学工業株式会社 Method for manufacturing composite wafer having oxide single crystal thin film
FR3037443B1 (en) * 2015-06-12 2018-07-13 Soitec HETEROSTRUCTURE AND METHOD OF MANUFACTURE
EP3544065A1 (en) * 2015-06-19 2019-09-25 Qmat, Inc. Bond and release layer transfer process
TW201806779A (en) * 2016-05-16 2018-03-01 道康寧公司 Adhesive delamination layer including at least one of a silsesquioxane polymer and a silane for display device substrate processing
TWI729120B (en) * 2016-05-16 2021-06-01 美商道康寧公司 Release layer including at least one fluorosilicon compound

Also Published As

Publication number Publication date
EP3776643A1 (en) 2021-02-17
JP7279284B2 (en) 2023-05-23
KR20200138320A (en) 2020-12-09
CN111902927A (en) 2020-11-06
FR3079660B1 (en) 2020-04-17
US11501997B2 (en) 2022-11-15
FR3079660A1 (en) 2019-10-04
US20210166968A1 (en) 2021-06-03
JP2021518663A (en) 2021-08-02
WO2019186267A1 (en) 2019-10-03

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