SG11201404039UA - Thermally oxidized heterogeneous composite substrate and method for manufacturing same - Google Patents
Thermally oxidized heterogeneous composite substrate and method for manufacturing sameInfo
- Publication number
- SG11201404039UA SG11201404039UA SG11201404039UA SG11201404039UA SG11201404039UA SG 11201404039U A SG11201404039U A SG 11201404039UA SG 11201404039U A SG11201404039U A SG 11201404039UA SG 11201404039U A SG11201404039U A SG 11201404039UA SG 11201404039U A SG11201404039U A SG 11201404039UA
- Authority
- SG
- Singapore
- Prior art keywords
- composite substrate
- manufacturing same
- thermally oxidized
- heterogeneous composite
- oxidized heterogeneous
- Prior art date
Links
- 239000002131 composite material Substances 0.000 title 1
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 239000000758 substrate Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
- H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
- H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
- H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0642—Isolation within the component, i.e. internal isolation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78603—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the insulating substrate or support
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Formation Of Insulating Films (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
- Thin Film Transistor (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012003856 | 2012-01-12 | ||
PCT/JP2013/050387 WO2013105634A1 (ja) | 2012-01-12 | 2013-01-11 | 熱酸化異種複合基板及びその製造方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
SG11201404039UA true SG11201404039UA (en) | 2014-10-30 |
Family
ID=48781576
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG11201404039UA SG11201404039UA (en) | 2012-01-12 | 2013-01-11 | Thermally oxidized heterogeneous composite substrate and method for manufacturing same |
Country Status (8)
Country | Link |
---|---|
US (1) | US10103021B2 (zh) |
EP (1) | EP2804202B1 (zh) |
JP (2) | JPWO2013105634A1 (zh) |
KR (1) | KR102055933B1 (zh) |
CN (1) | CN104040686B (zh) |
SG (1) | SG11201404039UA (zh) |
TW (1) | TWI576474B (zh) |
WO (1) | WO2013105634A1 (zh) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105190835B (zh) * | 2013-05-01 | 2018-11-09 | 信越化学工业株式会社 | 混合基板的制造方法和混合基板 |
JP6121356B2 (ja) * | 2014-03-31 | 2017-04-26 | 信越化学工業株式会社 | 酸化膜付き異種soi基板の製造方法 |
JP6121357B2 (ja) * | 2014-03-31 | 2017-04-26 | 信越化学工業株式会社 | 酸化膜付き異種soi基板の欠陥検出方法 |
JP7262421B2 (ja) * | 2020-05-08 | 2023-04-21 | 信越化学工業株式会社 | 圧電体複合基板およびその製造方法 |
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US4178191A (en) * | 1978-08-10 | 1979-12-11 | Rca Corp. | Process of making a planar MOS silicon-on-insulating substrate device |
US4509990A (en) * | 1982-11-15 | 1985-04-09 | Hughes Aircraft Company | Solid phase epitaxy and regrowth process with controlled defect density profiling for heteroepitaxial semiconductor on insulator composite substrates |
JPS59159563A (ja) * | 1983-03-02 | 1984-09-10 | Toshiba Corp | 半導体装置の製造方法 |
US5395788A (en) * | 1991-03-15 | 1995-03-07 | Shin Etsu Handotai Co., Ltd. | Method of producing semiconductor substrate |
US6312968B1 (en) * | 1993-06-30 | 2001-11-06 | The United States Of America As Represented By The Secretary Of The Navy | Method for fabricating an electrically addressable silicon-on-sapphire light valve |
JPH1140682A (ja) | 1997-07-18 | 1999-02-12 | Sony Corp | 不揮発性半導体記憶装置及びその製造方法 |
JPH11145438A (ja) * | 1997-11-13 | 1999-05-28 | Shin Etsu Handotai Co Ltd | Soiウエーハの製造方法ならびにこの方法で製造されるsoiウエーハ |
FR2777115B1 (fr) * | 1998-04-07 | 2001-07-13 | Commissariat Energie Atomique | Procede de traitement de substrats semi-conducteurs et structures obtenues par ce procede |
JPH11330438A (ja) | 1998-05-08 | 1999-11-30 | Shin Etsu Handotai Co Ltd | Soiウエーハの製造方法ならびにこの方法で製造されるsoiウエーハ |
US6417078B1 (en) | 2000-05-03 | 2002-07-09 | Ibis Technology Corporation | Implantation process using sub-stoichiometric, oxygen doses at different energies |
US6797604B2 (en) | 2000-05-08 | 2004-09-28 | International Business Machines Corporation | Method for manufacturing device substrate with metal back-gate and structure formed thereby |
JP4304879B2 (ja) | 2001-04-06 | 2009-07-29 | 信越半導体株式会社 | 水素イオンまたは希ガスイオンの注入量の決定方法 |
US6649535B1 (en) | 2002-02-12 | 2003-11-18 | Taiwan Semiconductor Manufacturing Company | Method for ultra-thin gate oxide growth |
US7176528B2 (en) * | 2003-02-18 | 2007-02-13 | Corning Incorporated | Glass-based SOI structures |
FR2855909B1 (fr) * | 2003-06-06 | 2005-08-26 | Soitec Silicon On Insulator | Procede d'obtention concomitante d'au moins une paire de structures comprenant au moins une couche utile reportee sur un substrat |
KR100588647B1 (ko) | 2003-12-30 | 2006-06-12 | 동부일렉트로닉스 주식회사 | 반도체 소자의 제조 방법 |
JP2005217288A (ja) * | 2004-01-30 | 2005-08-11 | Seiko Epson Corp | 電気光学装置の製造方法 |
JP4407384B2 (ja) * | 2004-05-28 | 2010-02-03 | 株式会社Sumco | Soi基板の製造方法 |
KR100898649B1 (ko) * | 2004-05-28 | 2009-05-22 | 가부시키가이샤 섬코 | Soi기판 및 그 제조방법 |
JP2006032725A (ja) | 2004-07-16 | 2006-02-02 | Sumco Corp | 半導体ウェーハの酸化膜形成方法 |
JP2006310661A (ja) | 2005-04-28 | 2006-11-09 | Toshiba Corp | 半導体基板および製造方法 |
KR100638825B1 (ko) | 2005-05-23 | 2006-10-27 | 삼성전기주식회사 | 수직구조 반도체 발광 소자 및 그 제조 방법 |
KR100972213B1 (ko) * | 2005-12-27 | 2010-07-26 | 신에쓰 가가꾸 고교 가부시끼가이샤 | Soi 웨이퍼의 제조 방법 및 soi 웨이퍼 |
WO2008121262A2 (en) | 2007-03-30 | 2008-10-09 | Corning Incorporated | Glass-ceramic-based semiconductor-on-insulator structures and method for making the same |
JP2008263087A (ja) | 2007-04-12 | 2008-10-30 | Shin Etsu Chem Co Ltd | Soi基板の製造方法 |
JP5289805B2 (ja) | 2007-05-10 | 2013-09-11 | 株式会社半導体エネルギー研究所 | 半導体装置製造用基板の作製方法 |
CN101383379A (zh) * | 2007-09-05 | 2009-03-11 | 中国科学院微电子研究所 | 多介质复合隧穿层的纳米晶浮栅存储器及其制作方法 |
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-
2013
- 2013-01-11 KR KR1020147019998A patent/KR102055933B1/ko active IP Right Grant
- 2013-01-11 SG SG11201404039UA patent/SG11201404039UA/en unknown
- 2013-01-11 CN CN201380005209.0A patent/CN104040686B/zh active Active
- 2013-01-11 US US14/366,125 patent/US10103021B2/en active Active
- 2013-01-11 EP EP13736379.2A patent/EP2804202B1/en active Active
- 2013-01-11 WO PCT/JP2013/050387 patent/WO2013105634A1/ja active Application Filing
- 2013-01-11 JP JP2013553323A patent/JPWO2013105634A1/ja active Pending
- 2013-01-11 TW TW102101103A patent/TWI576474B/zh active
-
2017
- 2017-01-27 JP JP2017012743A patent/JP6288323B2/ja active Active
Also Published As
Publication number | Publication date |
---|---|
EP2804202B1 (en) | 2021-02-24 |
JP2017098577A (ja) | 2017-06-01 |
US10103021B2 (en) | 2018-10-16 |
WO2013105634A1 (ja) | 2013-07-18 |
TW201341604A (zh) | 2013-10-16 |
KR102055933B1 (ko) | 2019-12-13 |
EP2804202A4 (en) | 2015-09-16 |
JP6288323B2 (ja) | 2018-03-07 |
US20140322546A1 (en) | 2014-10-30 |
JPWO2013105634A1 (ja) | 2015-05-11 |
CN104040686B (zh) | 2017-05-24 |
TWI576474B (zh) | 2017-04-01 |
KR20140112036A (ko) | 2014-09-22 |
CN104040686A (zh) | 2014-09-10 |
EP2804202A1 (en) | 2014-11-19 |
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