SG10201807525XA - Storage device and data training method thereof - Google Patents

Storage device and data training method thereof

Info

Publication number
SG10201807525XA
SG10201807525XA SG10201807525XA SG10201807525XA SG10201807525XA SG 10201807525X A SG10201807525X A SG 10201807525XA SG 10201807525X A SG10201807525X A SG 10201807525XA SG 10201807525X A SG10201807525X A SG 10201807525XA SG 10201807525X A SG10201807525X A SG 10201807525XA
Authority
SG
Singapore
Prior art keywords
data
signal
window
data signal
storage device
Prior art date
Application number
SG10201807525XA
Other languages
English (en)
Inventor
Lee Chulseung
Lee Choongeui
Suk Hwang Soon
Han Kyuwook
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of SG10201807525XA publication Critical patent/SG10201807525XA/en

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061Improving I/O performance
    • G06F3/0611Improving I/O performance in relation to response time
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668Details of memory controller
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0658Controller construction arrangements
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • G06F3/0679Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/26Sensing or reading circuits; Data output circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/022Detection or location of defective auxiliary circuits, e.g. defective refresh counters in I/O circuitry
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/023Detection or location of defective auxiliary circuits, e.g. defective refresh counters in clock generator or timing circuitry
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/028Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/18Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2207/00Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/22Control and timing of internal memory operations
    • G11C2207/2254Calibration

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
  • Memory System (AREA)
SG10201807525XA 2017-09-08 2018-09-03 Storage device and data training method thereof SG10201807525XA (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020170115338A KR102273191B1 (ko) 2017-09-08 2017-09-08 스토리지 장치 및 그것의 데이터 트레이닝 방법

Publications (1)

Publication Number Publication Date
SG10201807525XA true SG10201807525XA (en) 2019-04-29

Family

ID=65441472

Family Applications (1)

Application Number Title Priority Date Filing Date
SG10201807525XA SG10201807525XA (en) 2017-09-08 2018-09-03 Storage device and data training method thereof

Country Status (5)

Country Link
US (1) US10325633B2 (zh)
KR (1) KR102273191B1 (zh)
CN (1) CN109471591B (zh)
DE (1) DE102018116545A1 (zh)
SG (1) SG10201807525XA (zh)

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KR102693546B1 (ko) 2018-11-07 2024-08-08 삼성전자주식회사 스토리지 장치
CN109903803B (zh) * 2019-03-26 2021-04-27 晶晨半导体(上海)股份有限公司 存储模块的测试方法及系统
KR20210026353A (ko) 2019-08-30 2021-03-10 삼성전자주식회사 메모리 장치 트레이닝 방법 및 이를 포함한 전자 기기 및 전자 시스템
JP7332406B2 (ja) 2019-09-13 2023-08-23 キオクシア株式会社 メモリシステム
KR20210033719A (ko) * 2019-09-19 2021-03-29 에스케이하이닉스 주식회사 메모리 장치 및 그 동작 방법
DE102020124101A1 (de) 2020-02-04 2021-08-05 Samsung Electronics Co., Ltd. Elektronische vorrichtung mit einer speichervorrichtung und trainingsverfahren
KR20210099675A (ko) * 2020-02-04 2021-08-13 삼성전자주식회사 메모리 장치를 포함하는 전자 장치 및 그것의 트레이닝 방법
CN111506527B (zh) * 2020-04-13 2022-03-18 飞腾信息技术有限公司 数字高速并行总线自适应区间校正方法、装置及存储介质
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KR20220085237A (ko) * 2020-12-15 2022-06-22 삼성전자주식회사 스토리지 컨트롤러, 스토리지 장치 및 스토리지 장치의 동작 방법
CN115344215A (zh) * 2022-08-29 2022-11-15 深圳市紫光同创电子有限公司 存储器训练方法及系统
CN116580743B (zh) * 2023-04-26 2024-01-23 珠海妙存科技有限公司 一种内存读采样电路及其延时调节方法及读采样装置
CN118245407B (zh) * 2024-05-28 2024-08-02 广东匠芯创科技有限公司 Psram控制器及其硬件采样训练方法、设备、介质

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Also Published As

Publication number Publication date
DE102018116545A1 (de) 2019-03-14
US20190080730A1 (en) 2019-03-14
KR102273191B1 (ko) 2021-07-06
KR20190028605A (ko) 2019-03-19
CN109471591A (zh) 2019-03-15
US10325633B2 (en) 2019-06-18
CN109471591B (zh) 2023-04-07

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