SG10201600407SA - Semiconductor device and manufacturing method of the same - Google Patents
Semiconductor device and manufacturing method of the sameInfo
- Publication number
- SG10201600407SA SG10201600407SA SG10201600407SA SG10201600407SA SG10201600407SA SG 10201600407S A SG10201600407S A SG 10201600407SA SG 10201600407S A SG10201600407S A SG 10201600407SA SG 10201600407S A SG10201600407S A SG 10201600407SA SG 10201600407S A SG10201600407S A SG 10201600407SA
- Authority
- SG
- Singapore
- Prior art keywords
- manufacturing
- same
- semiconductor device
- semiconductor
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/66—Vertical DMOS [VDMOS] FETs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
- H10D12/01—Manufacture or treatment
- H10D12/031—Manufacture or treatment of IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
- H10D12/411—Insulated-gate bipolar transistors [IGBT]
- H10D12/441—Vertical IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/65—Lateral DMOS [LDMOS] FETs
- H10D30/657—Lateral DMOS [LDMOS] FETs having substrates comprising insulating layers, e.g. SOI-LDMOS transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/149—Source or drain regions of field-effect devices
- H10D62/151—Source or drain regions of field-effect devices of IGFETs
- H10D62/156—Drain regions of DMOS transistors
- H10D62/158—Dispositions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/82—Heterojunctions
- H10D62/822—Heterojunctions comprising only Group IV materials heterojunctions, e.g. Si/Ge heterojunctions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
- H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
- H10D62/8325—Silicon carbide
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/66—Vertical DMOS [VDMOS] FETs
- H10D30/663—Vertical DMOS [VDMOS] FETs having both source contacts and drain contacts on the same surface, i.e. up-drain VDMOS
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
- H10D62/126—Top-view geometrical layouts of the regions or the junctions
- H10D62/127—Top-view geometrical layouts of the regions or the junctions of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Thin Film Transistor (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
- Bipolar Transistors (AREA)
- Junction Field-Effect Transistors (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009037717 | 2009-02-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| SG10201600407SA true SG10201600407SA (en) | 2016-02-26 |
Family
ID=42621710
Family Applications (3)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| SG10201600407SA SG10201600407SA (en) | 2009-02-20 | 2010-02-04 | Semiconductor device and manufacturing method of the same |
| SG2012061206A SG183740A1 (en) | 2009-02-20 | 2010-02-04 | Semiconductor device and manufacturing method of the same |
| SG201000795-3A SG164324A1 (en) | 2009-02-20 | 2010-02-04 | Semiconductor device and manufacturing method of the same |
Family Applications After (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| SG2012061206A SG183740A1 (en) | 2009-02-20 | 2010-02-04 | Semiconductor device and manufacturing method of the same |
| SG201000795-3A SG164324A1 (en) | 2009-02-20 | 2010-02-04 | Semiconductor device and manufacturing method of the same |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US8368083B2 (enExample) |
| JP (1) | JP2010219515A (enExample) |
| CN (1) | CN101814526B (enExample) |
| SG (3) | SG10201600407SA (enExample) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI512997B (zh) | 2009-09-24 | 2015-12-11 | Semiconductor Energy Lab | 半導體裝置,電源電路,和半導體裝置的製造方法 |
| JP2013030618A (ja) | 2011-07-28 | 2013-02-07 | Rohm Co Ltd | 半導体装置 |
| JP5884585B2 (ja) * | 2012-03-21 | 2016-03-15 | 住友電気工業株式会社 | 炭化珪素半導体装置の製造方法 |
| US8653600B2 (en) * | 2012-06-01 | 2014-02-18 | Power Integrations, Inc. | High-voltage monolithic schottky device structure |
| JP6136573B2 (ja) * | 2013-05-27 | 2017-05-31 | 富士通株式会社 | 半導体装置及び半導体装置の製造方法 |
| US9543396B2 (en) | 2013-12-13 | 2017-01-10 | Power Integrations, Inc. | Vertical transistor device structure with cylindrically-shaped regions |
| US10325988B2 (en) | 2013-12-13 | 2019-06-18 | Power Integrations, Inc. | Vertical transistor device structure with cylindrically-shaped field plates |
| US10403509B2 (en) * | 2014-04-04 | 2019-09-03 | The Government Of The United States Of America, As Represented By The Secretary Of The Navy | Basal plane dislocation elimination in 4H—SiC by pulsed rapid thermal annealing |
| JP2020092282A (ja) * | 2020-02-25 | 2020-06-11 | ローム株式会社 | ショットキーバリアダイオード |
| CN114256072B (zh) * | 2020-09-25 | 2025-08-26 | 中芯国际集成电路制造(天津)有限公司 | 半导体结构及其形成方法 |
| CN116741639B (zh) * | 2023-06-20 | 2025-04-18 | 中国科学院上海微系统与信息技术研究所 | 半导体器件的制备方法及半导体器件 |
| CN116646401B (zh) * | 2023-07-19 | 2024-01-23 | 成都蓉矽半导体有限公司 | 一种碳化硅异质结的共源共栅mosfet器件 |
| CN117727838B (zh) * | 2024-02-07 | 2024-05-10 | 晶科能源(海宁)有限公司 | 太阳能电池及其制备方法、光伏组件 |
Family Cites Families (31)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6233422A (ja) * | 1985-08-06 | 1987-02-13 | Fujitsu Ltd | シリコンカ−バイドのエピタキシヤル成長方法 |
| JPS62204519A (ja) * | 1986-03-04 | 1987-09-09 | Agency Of Ind Science & Technol | 炭化シリコンデバイスの基板構造 |
| JP3061406B2 (ja) * | 1990-09-28 | 2000-07-10 | 株式会社東芝 | 半導体装置 |
| JP2979964B2 (ja) * | 1994-07-25 | 1999-11-22 | 株式会社日立製作所 | 半導体装置及びそれを用いたインバータ装置 |
| JPH08213607A (ja) * | 1995-02-08 | 1996-08-20 | Ngk Insulators Ltd | 半導体装置およびその製造方法 |
| US5510281A (en) * | 1995-03-20 | 1996-04-23 | General Electric Company | Method of fabricating a self-aligned DMOS transistor device using SiC and spacers |
| JPH08274108A (ja) * | 1995-03-31 | 1996-10-18 | Toshiba Corp | 半導体装置及びその製造方法 |
| US5877515A (en) * | 1995-10-10 | 1999-03-02 | International Rectifier Corporation | SiC semiconductor device |
| JP3206727B2 (ja) * | 1997-02-20 | 2001-09-10 | 富士電機株式会社 | 炭化けい素縦型mosfetおよびその製造方法 |
| EP1710842B1 (en) * | 1999-03-15 | 2008-11-12 | Matsushita Electric Industrial Co., Ltd. | Method for fabricating a bipolar transistor and a MISFET semiconductor device |
| JP2000349282A (ja) * | 1999-06-02 | 2000-12-15 | Fuji Electric Co Ltd | p−チャンネル絶縁ゲートバイポーラートランジスタ |
| JP4175750B2 (ja) * | 1999-10-27 | 2008-11-05 | 株式会社東芝 | 絶縁ゲート型半導体装置 |
| CN1173411C (zh) * | 2000-11-21 | 2004-10-27 | 松下电器产业株式会社 | 半导体器件及其制造方法 |
| JP5011611B2 (ja) * | 2001-06-12 | 2012-08-29 | 富士電機株式会社 | 半導体装置 |
| JP2003224428A (ja) | 2002-01-29 | 2003-08-08 | Kenwood Corp | 増幅装置 |
| US20040227197A1 (en) * | 2003-02-28 | 2004-11-18 | Shinji Maekawa | Composition of carbon nitride, thin film transistor with the composition of carbon nitride, display device with the thin film transistor, and manufacturing method thereof |
| JP4439358B2 (ja) * | 2003-09-05 | 2010-03-24 | 株式会社東芝 | 電界効果トランジスタ及びその製造方法 |
| JP4713089B2 (ja) | 2004-03-18 | 2011-06-29 | エア・ウォーター株式会社 | 単結晶SiC基板の製造方法 |
| JP2006032655A (ja) | 2004-07-16 | 2006-02-02 | Kyoto Univ | 炭化珪素基板の製造方法 |
| JP2006036613A (ja) | 2004-07-30 | 2006-02-09 | Nagaoka Univ Of Technology | ケイ素基板上に立方晶炭化ケイ素結晶膜を形成する方法 |
| JP4561247B2 (ja) * | 2004-08-31 | 2010-10-13 | 株式会社デンソー | 半導体装置およびその製造方法 |
| JP4511378B2 (ja) | 2005-02-15 | 2010-07-28 | エア・ウォーター株式会社 | SOI基板を用いた単結晶SiC層を形成する方法 |
| JP4802542B2 (ja) * | 2005-04-19 | 2011-10-26 | 株式会社デンソー | 炭化珪素半導体装置 |
| JP4903439B2 (ja) * | 2005-05-31 | 2012-03-28 | 株式会社東芝 | 電界効果トランジスタ |
| JP4563918B2 (ja) | 2005-10-31 | 2010-10-20 | エア・ウォーター株式会社 | 単結晶SiC基板の製造方法 |
| US7714352B2 (en) * | 2006-02-09 | 2010-05-11 | Nissan Motor Co., Ltd. | Hetero junction semiconductor device |
| JP4961805B2 (ja) * | 2006-04-03 | 2012-06-27 | 株式会社デンソー | 炭化珪素半導体装置の製造方法 |
| JP4412335B2 (ja) * | 2007-02-23 | 2010-02-10 | 株式会社デンソー | 炭化珪素半導体装置の製造方法 |
| JP5141227B2 (ja) * | 2007-12-12 | 2013-02-13 | 住友電気工業株式会社 | 半導体装置の製造方法 |
| CA2735975A1 (en) * | 2009-05-11 | 2010-11-18 | Sumitomo Electric Industries, Ltd. | Method for manufacturing semiconductor substrate |
| JP5742712B2 (ja) * | 2011-12-29 | 2015-07-01 | 住友電気工業株式会社 | 炭化珪素半導体装置の製造方法 |
-
2010
- 2010-02-04 SG SG10201600407SA patent/SG10201600407SA/en unknown
- 2010-02-04 SG SG2012061206A patent/SG183740A1/en unknown
- 2010-02-04 SG SG201000795-3A patent/SG164324A1/en unknown
- 2010-02-05 CN CN201010124800.6A patent/CN101814526B/zh not_active Expired - Fee Related
- 2010-02-05 US US12/700,756 patent/US8368083B2/en not_active Expired - Fee Related
- 2010-02-19 JP JP2010034356A patent/JP2010219515A/ja not_active Withdrawn
-
2013
- 2013-01-24 US US13/748,916 patent/US8592267B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| SG183740A1 (en) | 2012-09-27 |
| US8368083B2 (en) | 2013-02-05 |
| CN101814526A (zh) | 2010-08-25 |
| US20100213470A1 (en) | 2010-08-26 |
| SG164324A1 (en) | 2010-09-29 |
| US8592267B2 (en) | 2013-11-26 |
| CN101814526B (zh) | 2016-02-03 |
| JP2010219515A (ja) | 2010-09-30 |
| US20130130447A1 (en) | 2013-05-23 |
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