RU2004108042A - Электронный контур, содержащий проводящие перемычки, и способ изготовления таких перемычек - Google Patents

Электронный контур, содержащий проводящие перемычки, и способ изготовления таких перемычек

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Publication number
RU2004108042A
RU2004108042A RU2004108042/09A RU2004108042A RU2004108042A RU 2004108042 A RU2004108042 A RU 2004108042A RU 2004108042/09 A RU2004108042/09 A RU 2004108042/09A RU 2004108042 A RU2004108042 A RU 2004108042A RU 2004108042 A RU2004108042 A RU 2004108042A
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RU
Russia
Prior art keywords
substrate
conductive layer
conductive
electronic circuit
segment
Prior art date
Application number
RU2004108042/09A
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English (en)
Other versions
RU2296440C2 (ru
Inventor
Франсуа ДРОЗ (CH)
Франсуа ДРОЗ
Original Assignee
Награид Са (Ch)
Награид Са
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Application filed by Награид Са (Ch), Награид Са filed Critical Награид Са (Ch)
Publication of RU2004108042A publication Critical patent/RU2004108042A/ru
Application granted granted Critical
Publication of RU2296440C2 publication Critical patent/RU2296440C2/ru

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G06K19/0775Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna
    • G06K19/07752Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna using an interposer
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/486Via connections through the substrate with or without pins
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/4985Flexible insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49855Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5389Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4084Through-connections; Vertical interconnect access [VIA] connections by deforming at least one of the conductive layers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4685Manufacturing of cross-over conductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0388Other aspects of conductors
    • H05K2201/0397Tab
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09009Substrate related
    • H05K2201/09081Tongue or tail integrated in planar structure, e.g. obtained by cutting from the planar structure
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4092Integral conductive tabs, i.e. conductive parts partly detached from the substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Structure Of Printed Boards (AREA)
  • Credit Cards Or The Like (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Connections Effected By Soldering, Adhesion, Or Permanent Deformation (AREA)
  • Combinations Of Printed Boards (AREA)
  • Electronic Switches (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Claims (7)

1. Электронная схема, содержащая, по меньшей мере, один электронный элемент (6), выполненную из гибкого изолирующего материала подложку (5), по меньшей мере, один адгезионный слой и проводящий слой с множеством дорожек (4), причем электронный элемент (6) содержит, по меньшей мере, две соединительные зоны (7), по меньшей мере, одна из которых электрически соединена с проводящим слоем посредством проводящей перемычки, отличающаяся тем, что подложка содержит, по меньшей мере, одну полоску (2, 3) преимущественно прямоугольной формы, созданную путем прорезания подложки (5) по трем сторонам полоски, причем оставшаяся сторона полоски связана с подложкой (5), а перемычка образована проводящим сегментом (1), выделенным из проводящего слоя, свободным от любого клеящего вещества, проведенным сквозь подложку через один из вырезов, которые образованы за счет формирования полосок (2, 3), и соединенным с соединительной зоной (7).
2. Электронная схема по п.1, отличающаяся тем, что подложка (5) имеет первую поверхность с первым адгезионным слоем и первым проводящим слоем, а также вторую поверхность со вторым адгезионным слоем и вторым проводящим слоем, причем перемычка образована проводящим сегментом (1), выделенным только из второго проводящего слоя, свободным от клеящего вещества, проходящим сквозь подложку (5) через один из вырезов, которые образованы за счет формирования полосок (2, 3), и соединенным с соединительной зоной (7) и/или первым проводящим слоем.
3. Электронная схема, по п.1 или 2, отличающаяся тем, что несколько перемычек, образованных сегментами (1) дорожек, проведено сквозь подложку (5) через один и тот же вырез.
4. Электронная схема, по п.1 или 2, отличающаяся тем, что, по меньшей мере, одна перемычка, образованная сегментами (1) дорожек, проведена через подложку (5) столько раз, сколько необходимо для пересечения дорожек (4), принадлежащих проводящему слою, чтобы обеспечить соединение с соединительной зоной (7).
5. Электронная этикетка, отличающаяся тем, что содержит электронную схему согласно любому из пп.1-4.
6. Способ изготовления электронной схемы, содержащей подложку (5), образованную из гибкого изолирующего материала, по меньшей мере, один адгезионный слой и проводящий слой с множеством дорожек (4), а также электронный элемент (6), отличающийся тем, что выполнение перемычки между зоной проводящего слоя и целевой соединительной зоной (7) осуществляют посредством следующих операций:
продлевают дорожку в проводящем слое для образования проводящего сегмента (1),
вырезают в подложке (5) полоску преимущественно прямоугольной формы, одна из сторон которой связана с подложкой (5),
временно открывают вырез в подложке путем отжатия полоски (2, 3), которую отгибают по стороне, связанной с подложкой (5),
проводят проводящий сегмент (1) через указанный вырез,
сгибают проводящий сегмент (1), располагая его на противоположной поверхности подложки (5),
закрывают вырез после проводки проводящего сегмента (1) возвращением полоски в первоначальное положение на уровне подложки (5),
соединяют проводящий сегмент (1) с целевой соединительной зоной (7).
7. Способ по п.6, отличающийся тем, что целевая соединительная зона расположена на проводящем слое, и проводящий сегмент (1) возвращают к указанному проводящему слою посредством его повторной проводки сквозь подложку через вырез, образованный при формировании дополнительной полоски (2, 3), а затем закрепляют сегмент (1) на подложке (5) активацией клея, входящего в состав адгезионного слоя.
RU2004108042/09A 2001-10-01 2002-10-01 Электронная схема с проводящими перемычками и способ изготовления таких перемычек RU2296440C2 (ru)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CH1798/01 2001-10-01
CH17982001 2001-10-01

Publications (2)

Publication Number Publication Date
RU2004108042A true RU2004108042A (ru) 2005-09-20
RU2296440C2 RU2296440C2 (ru) 2007-03-27

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RU2004108042/09A RU2296440C2 (ru) 2001-10-01 2002-10-01 Электронная схема с проводящими перемычками и способ изготовления таких перемычек

Country Status (15)

Country Link
US (1) US7071422B2 (ru)
EP (1) EP1433368B1 (ru)
JP (1) JP3978730B2 (ru)
CN (1) CN100357967C (ru)
AT (1) ATE285664T1 (ru)
AU (1) AU2002334330B2 (ru)
BR (1) BRPI0213069B1 (ru)
CA (1) CA2462252C (ru)
DE (1) DE60202380T2 (ru)
ES (1) ES2235112T3 (ru)
MX (1) MXPA04002693A (ru)
PT (1) PT1433368E (ru)
RU (1) RU2296440C2 (ru)
WO (1) WO2003030601A1 (ru)
ZA (1) ZA200402146B (ru)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050146025A1 (en) * 2001-02-26 2005-07-07 John Gregory Method of forming an opening or cavity in a substrate for receiving an electronic component
US7719103B2 (en) * 2005-06-30 2010-05-18 Semiconductor Energy Laboratory Co., Ltd Semiconductor device
US20090025962A1 (en) * 2005-09-30 2009-01-29 Gelardi John A Electronic Module Expansion Bridge
WO2008082616A1 (en) 2006-12-29 2008-07-10 Solicore, Inc. Card configured to receive separate battery
WO2008082617A2 (en) 2006-12-29 2008-07-10 Solicore, Inc. Mailing apparatus for powered cards
FI121592B (fi) * 2008-03-26 2011-01-31 Tecnomar Oy Piirilevylaminaatin, erityisesti rfid-antennilaminaatin valmistusmenetelmä ja piirilevylaminaatti
US8120927B2 (en) * 2008-04-07 2012-02-21 Mediatek Inc. Printed circuit board
US9681554B2 (en) * 2008-04-07 2017-06-13 Mediatek Inc. Printed circuit board
MY166072A (en) 2008-11-03 2018-05-23 Smartrac Tech Gmbh Method for producing an rfid transponder product and an rfid transponder product produced according to said method
DE102009050386B4 (de) * 2009-10-22 2013-10-31 Mühlbauer Ag Verfahren zum Herstellen von Durchkontaktierungen
FI125720B (fi) * 2011-05-19 2016-01-29 Tecnomar Oy Rullalta rullalle -massavalmistukseen soveltuva sähköisten siltojen valmistusmenetelmä
EP3439438A1 (en) * 2017-08-02 2019-02-06 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Non-uniform magnetic foil embedded in component carrier

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2900580A (en) * 1954-06-04 1959-08-18 Beck S Inc Printed electrical circuit components having integral lead-outs and methods of making same
US3977074A (en) 1975-02-06 1976-08-31 General Motors Corporation Double sided printed circuit board and method for making same
US5229548A (en) * 1986-10-27 1993-07-20 Black & Decker Inc. Circuit board having a stamped substrate
US5923539A (en) * 1992-01-16 1999-07-13 Hitachi, Ltd. Multilayer circuit substrate with circuit repairing function, and electronic circuit device
TW276356B (ru) * 1994-06-24 1996-05-21 Ibm
JP3510743B2 (ja) * 1996-09-13 2004-03-29 ローム株式会社 配線接続構造及びそれを用いた電子部品
FR2769109B1 (fr) * 1997-09-26 1999-11-19 Gemplus Sca Dispositif electronique a puce jetable et procede de fabrication
JP2000057289A (ja) * 1998-08-11 2000-02-25 Sony Corp 非接触icカード
DE19916180C2 (de) * 1999-04-10 2001-03-08 Cubit Electronics Gmbh Verfahren zur Herstellung von elektrisch isolierten Leiterkreuzungen
JP2001188891A (ja) * 2000-01-05 2001-07-10 Shinko Electric Ind Co Ltd 非接触型icカード
US6535396B1 (en) * 2000-04-28 2003-03-18 Delphi Technologies, Inc. Combination circuit board and segmented conductive bus substrate
US6727436B2 (en) * 2002-03-15 2004-04-27 Memx, Inc. Interconnect bus crossover for MEMS
US6707677B1 (en) * 2003-03-12 2004-03-16 Silicon Integrated Systems Corp. Chip-packaging substrate and test method therefor

Also Published As

Publication number Publication date
DE60202380T2 (de) 2005-12-08
AU2002334330B2 (en) 2007-06-07
ZA200402146B (en) 2005-07-27
PT1433368E (pt) 2005-05-31
US20040238212A1 (en) 2004-12-02
CA2462252A1 (en) 2003-04-10
DE60202380D1 (de) 2005-01-27
WO2003030601A1 (fr) 2003-04-10
ES2235112T3 (es) 2005-07-01
CA2462252C (en) 2011-11-29
CN100357967C (zh) 2007-12-26
BR0213069A (pt) 2004-09-28
EP1433368B1 (fr) 2004-12-22
CN1561657A (zh) 2005-01-05
US7071422B2 (en) 2006-07-04
JP3978730B2 (ja) 2007-09-19
BRPI0213069B1 (pt) 2015-08-18
RU2296440C2 (ru) 2007-03-27
MXPA04002693A (es) 2004-06-18
ATE285664T1 (de) 2005-01-15
JP2005523572A (ja) 2005-08-04
EP1433368A1 (fr) 2004-06-30

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