DE60131643D1 - Leiterplatte und entsprechendes Herstellungsverfahren zur Installation von Mikrowellenchips bis zu 80 Ghz - Google Patents
Leiterplatte und entsprechendes Herstellungsverfahren zur Installation von Mikrowellenchips bis zu 80 GhzInfo
- Publication number
- DE60131643D1 DE60131643D1 DE60131643T DE60131643T DE60131643D1 DE 60131643 D1 DE60131643 D1 DE 60131643D1 DE 60131643 T DE60131643 T DE 60131643T DE 60131643 T DE60131643 T DE 60131643T DE 60131643 D1 DE60131643 D1 DE 60131643D1
- Authority
- DE
- Germany
- Prior art keywords
- microwave
- multilayer
- chips
- printed circuit
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P3/00—Waveguides; Transmission lines of the waveguide type
- H01P3/02—Waveguides; Transmission lines of the waveguide type with two longitudinal conductors
- H01P3/08—Microstrips; Strip lines
- H01P3/088—Stacked transmission lines
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
- H05K1/0203—Cooling of mounted components
- H05K1/021—Components thermally connected to metal substrates or heat-sinks by insert mounting
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4641—Manufacturing multilayer circuits by laminating two or more circuit boards having integrally laminated metal sheets or special power cores
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- H01L2223/66—High-frequency adaptations
- H01L2223/6605—High-frequency electrical connections
- H01L2223/6616—Vertical connections, e.g. vias
- H01L2223/6622—Coaxial feed-throughs in active or passive substrates
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- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/4823—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a pin of the item
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
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- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0272—Adaptations for fluid transport, e.g. channels, holes
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- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
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- H05K1/00—Printed circuits
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- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/142—Arrangements of planar printed circuit boards in the same plane, e.g. auxiliary printed circuit insert mounted in a main printed circuit
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09618—Via fence, i.e. one-dimensional array of vias
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/049—Wire bonding
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
- H05K3/0061—Laminating printed circuit boards onto other substrates, e.g. metallic substrates onto a metallic substrate, e.g. a heat sink
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4697—Manufacturing multilayer circuits having cavities, e.g. for mounting components
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Electromagnetism (AREA)
- Toxicology (AREA)
- Health & Medical Sciences (AREA)
- Manufacturing & Machinery (AREA)
- Waveguides (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Combinations Of Printed Boards (AREA)
- Structure Of Receivers (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP01830497A EP1280392B1 (de) | 2001-07-26 | 2001-07-26 | Leiterplatte und entsprechendes Herstellungsverfahren zur Installation von Mikrowellenchips bis zu 80 Ghz |
Publications (2)
Publication Number | Publication Date |
---|---|
DE60131643D1 true DE60131643D1 (de) | 2008-01-10 |
DE60131643T2 DE60131643T2 (de) | 2009-04-30 |
Family
ID=8184631
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60131643T Expired - Lifetime DE60131643T2 (de) | 2001-07-26 | 2001-07-26 | Leiterplatte und entsprechendes Herstellungsverfahren zur Installation von Mikrowellenchips bis zu 80 Ghz |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP1280392B1 (de) |
AT (1) | ATE379958T1 (de) |
DE (1) | DE60131643T2 (de) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7249338B2 (en) * | 2003-05-21 | 2007-07-24 | Gateway Inc. | High speed bus with radio frequency microstrip |
ES2334566T3 (es) | 2004-04-29 | 2010-03-12 | Nokia Siemens Networks S.P.A. | Transicion de microcinta a guia de onda para ondas milimetricas incorporadas en una tarjeta de circuitos impresos multicapas. |
US7528792B2 (en) * | 2005-06-06 | 2009-05-05 | Raytheon Company | Reduced inductance interconnect for enhanced microwave and millimeter-wave systems |
DE102009027530A1 (de) * | 2009-07-08 | 2011-01-20 | Robert Bosch Gmbh | Leiterplatte |
TWI387403B (zh) * | 2009-07-29 | 2013-02-21 | Castles Technology Co Ltd | 改良之電子元件防護結構 |
CN102300384A (zh) * | 2010-06-23 | 2011-12-28 | 环旭电子股份有限公司 | 多层式印刷电路板 |
DE102011005145A1 (de) | 2011-03-04 | 2012-09-06 | Rohde & Schwarz Gmbh & Co. Kg | Leiterplattenanordnung für Millimeterwellen-Scanner |
DE102013203932A1 (de) * | 2013-03-07 | 2014-09-11 | Continental Automotive Gmbh | Elektronische, optoelektronische oder elektrische Anordnung |
DE102014209357B4 (de) | 2013-07-02 | 2023-02-16 | Vitesco Technologies Germany Gmbh | Leiterplatte und Verfahren zur Herstellung einer Leiterplatte |
DE102014109120B4 (de) | 2014-06-30 | 2017-04-06 | Krohne Messtechnik Gmbh | Mikrowellenmodul |
CN104202904B (zh) * | 2014-08-29 | 2017-07-11 | 广州美维电子有限公司 | 具有侧面凹槽的电路板的压合结构及电路板的制作方法 |
CN104411090A (zh) * | 2014-11-26 | 2015-03-11 | 上海无线电设备研究所 | 一种用于弹载微波收发组件的电路结构及其制备方法 |
US20200281051A1 (en) * | 2017-08-15 | 2020-09-03 | Goji Limited | Six port power measurements |
CN108183296B (zh) * | 2017-12-13 | 2020-02-04 | 北京无线电测量研究所 | 一种垂直互联的微波极化合成环行组件 |
CN111372395B (zh) * | 2020-04-22 | 2022-07-05 | 上海航天电子通讯设备研究所 | 基于多层lcp电路板的微波导制备方法及微波导 |
RU2750860C1 (ru) * | 2020-09-21 | 2021-07-05 | Акционерное общество "Научно-производственное предприятие "Исток" имени А.И. Шокина" (АО "НПП "Исток" им. Шокина") | Гибридная интегральная схема свч-диапазона |
CN112954913A (zh) * | 2021-01-26 | 2021-06-11 | 安徽华东光电技术研究所有限公司 | K1波段接收机的中频模块制作方法 |
CN115066137A (zh) * | 2022-06-30 | 2022-09-16 | 中航光电科技股份有限公司 | 多层微波组件、双层压合微波组件及其实现方法 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2656489C3 (de) * | 1976-12-14 | 1984-09-20 | Standard Elektrik Lorenz Ag, 7000 Stuttgart | Leiterplatte für eine Hochfrequenz- Schaltungsanordnung |
GB2124035B (en) * | 1982-07-15 | 1985-07-31 | Standard Telephones Cables Ltd | Printed circuit boards |
GB2189084B (en) * | 1986-04-10 | 1989-11-22 | Stc Plc | Integrated circuit package |
JPS63292079A (ja) * | 1987-05-26 | 1988-11-29 | Asia Electron Kk | 電子機器の冷却機構 |
US4999740A (en) * | 1989-03-06 | 1991-03-12 | Allied-Signal Inc. | Electronic device for managing and dissipating heat and for improving inspection and repair, and method of manufacture thereof |
JP2901091B2 (ja) * | 1990-09-27 | 1999-06-02 | 株式会社日立製作所 | 半導体装置 |
US6178311B1 (en) * | 1998-03-02 | 2001-01-23 | Western Multiplex Corporation | Method and apparatus for isolating high frequency signals in a printed circuit board |
-
2001
- 2001-07-26 EP EP01830497A patent/EP1280392B1/de not_active Expired - Lifetime
- 2001-07-26 AT AT01830497T patent/ATE379958T1/de not_active IP Right Cessation
- 2001-07-26 DE DE60131643T patent/DE60131643T2/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP1280392B1 (de) | 2007-11-28 |
EP1280392A1 (de) | 2003-01-29 |
DE60131643T2 (de) | 2009-04-30 |
ATE379958T1 (de) | 2007-12-15 |
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