GB2189084B - Integrated circuit package - Google Patents

Integrated circuit package

Info

Publication number
GB2189084B
GB2189084B GB8608696A GB8608696A GB2189084B GB 2189084 B GB2189084 B GB 2189084B GB 8608696 A GB8608696 A GB 8608696A GB 8608696 A GB8608696 A GB 8608696A GB 2189084 B GB2189084 B GB 2189084B
Authority
GB
United Kingdom
Prior art keywords
integrated circuit
circuit package
circuits
openings
levels
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB8608696A
Other versions
GB8608696D0 (en
GB2189084A (en
Inventor
John Michael Young
Graeme Kenneth Barker
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STC PLC
Original Assignee
STC PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STC PLC filed Critical STC PLC
Priority to GB8608696A priority Critical patent/GB2189084B/en
Publication of GB8608696D0 publication Critical patent/GB8608696D0/en
Publication of GB2189084A publication Critical patent/GB2189084A/en
Application granted granted Critical
Publication of GB2189084B publication Critical patent/GB2189084B/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0201Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203Cooling of mounted components
    • H05K1/021Components thermally connected to metal substrates or heat-sinks by insert mounting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5383Multilayer substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0296Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298Multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09536Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04Soldering or other types of metallurgic bonding
    • H05K2203/049Wire bonding
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0058Laminating printed circuit boards onto other substrates, e.g. metallic substrates
    • H05K3/0061Laminating printed circuit boards onto other substrates, e.g. metallic substrates onto a metallic substrate, e.g. a heat sink
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4623Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

A package assembly for a plurality of integrated circuits, e.g. GaAs circuits, comprises a multilayer circuit board (11) having openings (17) for receiving the circuit chips (18). The circuits are connected to an upper metallisation level (16a), interconnections being provided by one or more lower levels (16b). Connections between levels are effected via plated through holes passing through openings in intervening ground planes (15). <IMAGE>
GB8608696A 1986-04-10 1986-04-10 Integrated circuit package Expired GB2189084B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB8608696A GB2189084B (en) 1986-04-10 1986-04-10 Integrated circuit package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB8608696A GB2189084B (en) 1986-04-10 1986-04-10 Integrated circuit package

Publications (3)

Publication Number Publication Date
GB8608696D0 GB8608696D0 (en) 1986-05-14
GB2189084A GB2189084A (en) 1987-10-14
GB2189084B true GB2189084B (en) 1989-11-22

Family

ID=10595956

Family Applications (1)

Application Number Title Priority Date Filing Date
GB8608696A Expired GB2189084B (en) 1986-04-10 1986-04-10 Integrated circuit package

Country Status (1)

Country Link
GB (1) GB2189084B (en)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2676112B2 (en) * 1989-05-01 1997-11-12 イビデン株式会社 Manufacturing method of electronic component mounting board
GB2240425B (en) * 1990-01-20 1994-01-12 Motorola Ltd Radio transmitter power amplifier with cooling apparatus
FI90935C (en) * 1991-03-06 1994-04-11 Nokia Mobile Phones Ltd Method for mounting a coaxial transmission line on a printed circuit board
DE4225154A1 (en) * 1992-07-30 1994-02-03 Meyerhoff Dieter Chip module
US5384689A (en) * 1993-12-20 1995-01-24 Shen; Ming-Tung Integrated circuit chip including superimposed upper and lower printed circuit boards
FR2739496B1 (en) * 1995-10-03 1998-01-30 Dassault Electronique MULTI-LAYERED MICROWAVE CIRCUIT WITH INTEGRATED ACTIVE ELEMENTS
FR2739492B1 (en) * 1995-10-03 1997-11-07 Dassault Electronique MULTI-LAYERED MICROWAVE CIRCUIT WITH INTEGRATED ACTIVE ELEMENTS
GB2307598B (en) * 1995-11-24 2000-02-23 Varintelligent Combined printed circuit board and integrated circuit driver
EP0795907A1 (en) * 1996-03-14 1997-09-17 Dassault Electronique Multilayer high-frequency circuit with integrated active elements
TW449844B (en) * 1997-05-17 2001-08-11 Hyundai Electronics Ind Ball grid array package having an integrated circuit chip
ATE379958T1 (en) * 2001-07-26 2007-12-15 Siemens Spa Italiana CIRCUIT BOARD AND CORRESPONDING PRODUCTION PROCESS FOR INSTALLING MICROWAVE CHIPS UP TO 80 GHZ

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1469085A (en) * 1974-08-19 1977-03-30 Ibm Semiconductor wafers
GB2130794A (en) * 1982-11-27 1984-06-06 Prutec Ltd Electrical circuit assembly
GB2132820A (en) * 1982-12-29 1984-07-11 Western Electric Co Integrated circuit chip package
GB2153144A (en) * 1984-01-13 1985-08-14 Standard Telephones Cables Ltd Circuit packaging

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1469085A (en) * 1974-08-19 1977-03-30 Ibm Semiconductor wafers
GB2130794A (en) * 1982-11-27 1984-06-06 Prutec Ltd Electrical circuit assembly
GB2132820A (en) * 1982-12-29 1984-07-11 Western Electric Co Integrated circuit chip package
GB2153144A (en) * 1984-01-13 1985-08-14 Standard Telephones Cables Ltd Circuit packaging

Also Published As

Publication number Publication date
GB8608696D0 (en) 1986-05-14
GB2189084A (en) 1987-10-14

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Legal Events

Date Code Title Description
732 Registration of transactions, instruments or events in the register (sect. 32/1977)
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)
PCNP Patent ceased through non-payment of renewal fee

Effective date: 19930410