DE60106978D1 - Herstellungsverfahren für ein leiterplatten-modul - Google Patents

Herstellungsverfahren für ein leiterplatten-modul

Info

Publication number
DE60106978D1
DE60106978D1 DE60106978T DE60106978T DE60106978D1 DE 60106978 D1 DE60106978 D1 DE 60106978D1 DE 60106978 T DE60106978 T DE 60106978T DE 60106978 T DE60106978 T DE 60106978T DE 60106978 D1 DE60106978 D1 DE 60106978D1
Authority
DE
Germany
Prior art keywords
circuit board
manufacturing
conductor
circuit
anisotropic conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60106978T
Other languages
English (en)
Other versions
DE60106978T2 (de
Inventor
Shigetoshi Segawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Application granted granted Critical
Publication of DE60106978D1 publication Critical patent/DE60106978D1/de
Publication of DE60106978T2 publication Critical patent/DE60106978T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/36—Assembling printed circuits with other printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/36—Assembling printed circuits with other printed circuits
    • H05K3/361—Assembling flexible printed circuits with other printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/117—Pads along the edge of rigid circuit boards, e.g. for pluggable connectors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09372—Pads and lands
    • H05K2201/09427—Special relation between the location or dimension of a pad or land and the location or dimension of a terminal
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
    • H05K3/323—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives by applying an anisotropic conductive adhesive layer over an array of pads
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/10—Methods of surface bonding and/or assembly therefor
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/10—Methods of surface bonding and/or assembly therefor
    • Y10T156/1089—Methods of surface bonding and/or assembly therefor of discrete laminae to single face of additional lamina
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49126—Assembling bases

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Combinations Of Printed Boards (AREA)
  • Diaphragms For Electromechanical Transducers (AREA)
  • Variable-Direction Aerials And Aerial Arrays (AREA)
DE60106978T 2000-12-28 2001-12-27 Verfahren zur Herstellung eines Leiterplattenmoduls Expired - Lifetime DE60106978T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2000402873A JP2002204067A (ja) 2000-12-28 2000-12-28 回路基板モジュールの製造方法
JP2000402873 2000-12-28
PCT/JP2001/011518 WO2002054843A1 (fr) 2000-12-28 2001-12-27 Procede de production d"un module a carte de circuit imprime

Publications (2)

Publication Number Publication Date
DE60106978D1 true DE60106978D1 (de) 2004-12-09
DE60106978T2 DE60106978T2 (de) 2005-12-01

Family

ID=18867088

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60106978T Expired - Lifetime DE60106978T2 (de) 2000-12-28 2001-12-27 Verfahren zur Herstellung eines Leiterplattenmoduls

Country Status (9)

Country Link
US (1) US6942745B2 (de)
EP (1) EP1353540B1 (de)
JP (1) JP2002204067A (de)
KR (1) KR20020077916A (de)
CN (1) CN1189067C (de)
AT (1) ATE281755T1 (de)
DE (1) DE60106978T2 (de)
TW (1) TW552838B (de)
WO (1) WO2002054843A1 (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6951596B2 (en) 2002-01-18 2005-10-04 Avery Dennison Corporation RFID label technique
FI114121B (fi) * 2002-11-04 2004-08-13 Rafsec Oy Menetelmä tuoteanturin valmistamiseksi sekä tuoteanturi
JP4443324B2 (ja) * 2004-06-28 2010-03-31 東北パイオニア株式会社 フレキシブル配線基板及びその製造方法、半導体チップ実装フレキシブル配線基板、電子機器
US7500307B2 (en) 2004-09-22 2009-03-10 Avery Dennison Corporation High-speed RFID circuit placement method
US7623034B2 (en) * 2005-04-25 2009-11-24 Avery Dennison Corporation High-speed RFID circuit placement method and device
JP4768355B2 (ja) * 2005-08-17 2011-09-07 株式会社フジクラ リジッドプリント基板及びプリント基板の接続方法
US7555826B2 (en) 2005-12-22 2009-07-07 Avery Dennison Corporation Method of manufacturing RFID devices
TWI322441B (en) * 2006-04-17 2010-03-21 Feng Ting Hsu Keyboard and thin film switch with changeable outlet joint
JP5093928B2 (ja) * 2009-07-23 2012-12-12 住友電気工業株式会社 プリント配線板の接続構造およびその製造方法
EP2506302B1 (de) * 2009-11-26 2021-08-11 Kyocera Corporation Verdrahtungssubstrat, abbildungsvorrichtung und modul für die abbildungsvorrichtung
JP2011233609A (ja) * 2010-04-26 2011-11-17 Sumitomo Electric Printed Circuit Inc フレキシブルプリント配線板の接続構造及びそれを備えた電子機器
KR20130054027A (ko) * 2011-11-16 2013-05-24 삼성전기주식회사 기판 접합 방법
CN203225947U (zh) * 2013-03-28 2013-10-02 富士康(昆山)电脑接插件有限公司 印刷电路板组件
US11224131B2 (en) * 2018-04-04 2022-01-11 Lenovo (Singapore) Pte. Ltd. Systems and methods for surface mounting cable connections

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01251787A (ja) * 1988-03-31 1989-10-06 Toshiba Corp 電子部品の接続装置
JP2906697B2 (ja) 1990-03-09 1999-06-21 日本電気株式会社 セラミック多層配線基板の製造方法
JPH05191008A (ja) * 1992-01-13 1993-07-30 Sharp Corp 異方性導電膜接続端子
US5592365A (en) 1993-12-21 1997-01-07 Sharp Kabushiki Kaisha Panel assembly structure and panel assembling method capable of achieving a highly reliable connection of electrode terminals even when the electrode terminals have a fine pitch
JPH0846314A (ja) * 1994-07-27 1996-02-16 Toshiba Corp 電気的接続方法
JP3911759B2 (ja) * 1997-04-04 2007-05-09 松下電器産業株式会社 配線基板
JP3455871B2 (ja) * 1997-06-23 2003-10-14 株式会社スリーボンド マイクロカプセル型導電性フィラーの製造方法
GB2345201A (en) * 1998-12-16 2000-06-28 Ibm Connecting conductors on two substrates

Also Published As

Publication number Publication date
TW552838B (en) 2003-09-11
EP1353540B1 (de) 2004-11-03
WO2002054843A1 (fr) 2002-07-11
US6942745B2 (en) 2005-09-13
EP1353540A1 (de) 2003-10-15
CN1406454A (zh) 2003-03-26
ATE281755T1 (de) 2004-11-15
DE60106978T2 (de) 2005-12-01
CN1189067C (zh) 2005-02-09
JP2002204067A (ja) 2002-07-19
EP1353540A4 (de) 2003-10-15
US20030034127A1 (en) 2003-02-20
KR20020077916A (ko) 2002-10-14

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: PANASONIC CORP., KADOMA, OSAKA, JP