PL3029679T3 - Systemy, sposoby i aparaty do pamięci hybrydowej - Google Patents

Systemy, sposoby i aparaty do pamięci hybrydowej

Info

Publication number
PL3029679T3
PL3029679T3 PL15198043.0T PL15198043T PL3029679T3 PL 3029679 T3 PL3029679 T3 PL 3029679T3 PL 15198043 T PL15198043 T PL 15198043T PL 3029679 T3 PL3029679 T3 PL 3029679T3
Authority
PL
Poland
Prior art keywords
apparatuses
systems
methods
hybrid memory
hybrid
Prior art date
Application number
PL15198043.0T
Other languages
English (en)
Inventor
Dave Dunning
Bryan Casper
Randy Mooney
Mozhgan Mansuri
James E. Jaussi
Original Assignee
Intel Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corporation filed Critical Intel Corporation
Publication of PL3029679T3 publication Critical patent/PL3029679T3/pl

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1076—Parity data used in redundant arrays of independent storages, e.g. in RAID systems
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/005—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor comprising combined but independently operative RAM-ROM, RAM-PROM, RAM-EPROM cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Algebra (AREA)
  • Pure & Applied Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • General Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
  • Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Memory System (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Detection And Correction Of Errors (AREA)
  • Semiconductor Integrated Circuits (AREA)
PL15198043.0T 2009-12-31 2010-12-10 Systemy, sposoby i aparaty do pamięci hybrydowej PL3029679T3 (pl)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US12/655,590 US8612809B2 (en) 2009-12-31 2009-12-31 Systems, methods, and apparatuses for stacked memory

Publications (1)

Publication Number Publication Date
PL3029679T3 true PL3029679T3 (pl) 2025-10-20

Family

ID=44188959

Family Applications (1)

Application Number Title Priority Date Filing Date
PL15198043.0T PL3029679T3 (pl) 2009-12-31 2010-12-10 Systemy, sposoby i aparaty do pamięci hybrydowej

Country Status (8)

Country Link
US (6) US8612809B2 (pl)
EP (3) EP3029679B1 (pl)
JP (4) JP5676644B2 (pl)
KR (1) KR101454090B1 (pl)
CN (2) CN104575568B (pl)
PL (1) PL3029679T3 (pl)
TW (2) TWI517179B (pl)
WO (1) WO2011081846A2 (pl)

Families Citing this family (120)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5559507B2 (ja) * 2009-10-09 2014-07-23 ピーエスフォー ルクスコ エスエイアールエル 半導体装置及びこれを備える情報処理システム
US8612809B2 (en) 2009-12-31 2013-12-17 Intel Corporation Systems, methods, and apparatuses for stacked memory
US8650446B2 (en) * 2010-03-24 2014-02-11 Apple Inc. Management of a non-volatile memory based on test quality
US8582373B2 (en) * 2010-08-31 2013-11-12 Micron Technology, Inc. Buffer die in stacks of memory dies and methods
US8191034B1 (en) * 2010-09-23 2012-05-29 Cadence Design Systems, Inc. Method and system for measuring terminal compatibility and alignment
US8612676B2 (en) 2010-12-22 2013-12-17 Intel Corporation Two-level system main memory
US8607089B2 (en) 2011-05-19 2013-12-10 Intel Corporation Interface for storage device access over memory bus
US9294224B2 (en) 2011-09-28 2016-03-22 Intel Corporation Maximum-likelihood decoder in a memory controller for synchronization
WO2013048491A1 (en) 2011-09-30 2013-04-04 Intel Corporation Apparatus, method and system that stores bios in non-volatile random access memory
CN107391397B (zh) 2011-09-30 2021-07-27 英特尔公司 支持近存储器和远存储器访问的存储器通道
CN103946814B (zh) 2011-09-30 2017-06-06 英特尔公司 计算机系统中的非易失性随机存取存储器的自主初始化
CN103946813B (zh) 2011-09-30 2017-08-25 英特尔公司 基于使用统计量追踪的远存储器访问信号的生成
WO2013048490A1 (en) 2011-09-30 2013-04-04 Intel Corporation Non-volatile random access memory (nvram) as a replacement for traditional mass storage
WO2013048503A1 (en) 2011-09-30 2013-04-04 Intel Corporation Apparatus and method for implementing a multi-level memory hierarchy having different operating modes
US9317429B2 (en) 2011-09-30 2016-04-19 Intel Corporation Apparatus and method for implementing a multi-level memory hierarchy over common memory channels
WO2013077867A1 (en) 2011-11-22 2013-05-30 Intel Corporation Access control for non-volatile random access memory across platform agents
CN103975287B (zh) 2011-12-13 2017-04-12 英特尔公司 使用非易失性随机存取存储器的服务器中的增强系统睡眠状态支持
WO2013089686A1 (en) 2011-12-13 2013-06-20 Intel Corporation A method and system for providing instant responses to sleep state transitions with non-volatile random access memory
CN103999161B (zh) 2011-12-20 2016-09-28 英特尔公司 用于相变存储器漂移管理的设备和方法
WO2013095404A1 (en) 2011-12-20 2013-06-27 Intel Corporation Dynamic partial power down of memory-side cache in a 2-level memory hierarchy
WO2013095465A1 (en) 2011-12-21 2013-06-27 Intel Corporation High-performance storage structures and systems featuring multiple non-volatile memories
US20130166672A1 (en) * 2011-12-22 2013-06-27 International Business Machines Corporation Physically Remote Shared Computer Memory
CN104115132B (zh) 2011-12-22 2018-02-06 英特尔公司 借助于存储器通道关闭的功率节约
JP5846664B2 (ja) 2011-12-28 2016-01-20 インテル・コーポレーション メモリ回路試験エンジン用の汎用アドレススクランブラ
CN104137084B (zh) 2011-12-28 2017-08-11 英特尔公司 提高耐久性和抗攻击性的用于pcm缓存的有效动态随机化地址重映射
US8645777B2 (en) * 2011-12-29 2014-02-04 Intel Corporation Boundary scan chain for stacked memory
US9953725B2 (en) 2012-02-29 2018-04-24 Samsung Electronics Co., Ltd. Semiconductor memory devices and methods of operating the same
TWI602181B (zh) * 2012-02-29 2017-10-11 三星電子股份有限公司 記憶體系統以及使用測試元件傳輸失效位址至記憶體元件的操作方法
KR102076584B1 (ko) * 2012-10-22 2020-04-07 삼성전자주식회사 메모리 셀을 리페어 하는 방법과 장치 및 이를 포함하는 메모리 시스템
US9087613B2 (en) 2012-02-29 2015-07-21 Samsung Electronics Co., Ltd. Device and method for repairing memory cell and memory system including the device
US8587340B2 (en) * 2012-03-27 2013-11-19 Micron Technology, Inc. Apparatuses including scalable drivers and methods
WO2013147841A1 (en) 2012-03-30 2013-10-03 Intel Corporation Generic address scrambler for memory circuit test engine
JP5980556B2 (ja) * 2012-04-27 2016-08-31 ルネサスエレクトロニクス株式会社 半導体装置
US9252996B2 (en) 2012-06-21 2016-02-02 Micron Technology, Inc. Apparatuses and methods to change information values
US10303618B2 (en) * 2012-09-25 2019-05-28 International Business Machines Corporation Power savings via dynamic page type selection
US8830716B2 (en) * 2012-09-29 2014-09-09 Intel Corporation Intelligent far memory bandwith scaling
US9298395B2 (en) * 2012-10-22 2016-03-29 Globalfoundries Inc. Memory system connector
KR101630583B1 (ko) 2012-10-30 2016-06-14 휴렛-팩커드 디벨롭먼트 컴퍼니, 엘.피. 스마트 메모리 버퍼
US9354875B2 (en) * 2012-12-27 2016-05-31 Intel Corporation Enhanced loop streaming detector to drive logic optimization
US20140189227A1 (en) * 2012-12-28 2014-07-03 Samsung Electronics Co., Ltd. Memory device and a memory module having the same
US9679615B2 (en) 2013-03-15 2017-06-13 Micron Technology, Inc. Flexible memory system with a controller and a stack of memory
KR102029682B1 (ko) 2013-03-15 2019-10-08 삼성전자주식회사 반도체 장치 및 반도체 패키지
US11074169B2 (en) * 2013-07-03 2021-07-27 Micron Technology, Inc. Programmed memory controlled data movement and timing within a main memory device
US9338918B2 (en) 2013-07-10 2016-05-10 Samsung Electronics Co., Ltd. Socket interposer and computer system using the socket interposer
US9147438B2 (en) * 2013-10-23 2015-09-29 Qualcomm Incorporated Monolithic three dimensional (3D) integrated circuits (ICs) (3DICs) with vertical memory components, related systems and methods
US9910484B2 (en) * 2013-11-26 2018-03-06 Intel Corporation Voltage regulator training
JP2015141725A (ja) * 2014-01-28 2015-08-03 マイクロン テクノロジー， インク． 半導体装置及びこれを備える情報処理システム
US9237670B2 (en) 2014-02-26 2016-01-12 Samsung Electronics Co., Ltd. Socket interposer and computer system using the socket
KR102192539B1 (ko) * 2014-05-21 2020-12-18 삼성전자주식회사 반도체 장치 및 이의 프로그램 방법
US10204047B2 (en) 2015-03-27 2019-02-12 Intel Corporation Memory controller for multi-level system memory with coherency unit
KR102296738B1 (ko) * 2015-06-01 2021-09-01 삼성전자 주식회사 반도체 메모리 장치, 이를 포함하는 메모리 시스템 및 반도체 메모리 장치의 에러 정정 방법
KR102290020B1 (ko) * 2015-06-05 2021-08-19 삼성전자주식회사 스택드 칩 구조에서 소프트 데이터 페일 분석 및 구제 기능을 제공하는 반도체 메모리 장치
US10073659B2 (en) 2015-06-26 2018-09-11 Intel Corporation Power management circuit with per activity weighting and multiple throttle down thresholds
US10387259B2 (en) 2015-06-26 2019-08-20 Intel Corporation Instant restart in non volatile system memory computing systems with embedded programmable data checking
US20170060434A1 (en) * 2015-08-27 2017-03-02 Samsung Electronics Co., Ltd. Transaction-based hybrid memory module
US10740116B2 (en) * 2015-09-01 2020-08-11 International Business Machines Corporation Three-dimensional chip-based regular expression scanner
US10108549B2 (en) 2015-09-23 2018-10-23 Intel Corporation Method and apparatus for pre-fetching data in a system having a multi-level system memory
US10185501B2 (en) 2015-09-25 2019-01-22 Intel Corporation Method and apparatus for pinning memory pages in a multi-level system memory
US10261901B2 (en) 2015-09-25 2019-04-16 Intel Corporation Method and apparatus for unneeded block prediction in a computing system having a last level cache and a multi-level system memory
EP3356943B1 (en) 2015-10-01 2021-11-03 Rambus Inc. Memory system with cached memory module operations
US9792224B2 (en) 2015-10-23 2017-10-17 Intel Corporation Reducing latency by persisting data relationships in relation to corresponding data in persistent memory
US10033411B2 (en) 2015-11-20 2018-07-24 Intel Corporation Adjustable error protection for stored data
US10095618B2 (en) 2015-11-25 2018-10-09 Intel Corporation Memory card with volatile and non volatile memory space having multiple usage model configurations
US10275160B2 (en) 2015-12-21 2019-04-30 Intel Corporation Method and apparatus to enable individual non volatile memory express (NVME) input/output (IO) Queues on differing network addresses of an NVME controller
US9747041B2 (en) 2015-12-23 2017-08-29 Intel Corporation Apparatus and method for a non-power-of-2 size cache in a first level memory device to cache data present in a second level memory device
CN109684653B (zh) * 2017-10-19 2023-12-22 成都海存艾匹科技有限公司 含有可编程计算单元的可编程门阵列封装
US10007606B2 (en) 2016-03-30 2018-06-26 Intel Corporation Implementation of reserved cache slots in computing system having inclusive/non inclusive tracking and two level system memory
US10185619B2 (en) 2016-03-31 2019-01-22 Intel Corporation Handling of error prone cache line slots of memory side cache of multi-level system memory
US10073787B2 (en) * 2016-04-18 2018-09-11 Via Alliance Semiconductor Co., Ltd. Dynamic powering of cache memory by ways within multiple set groups based on utilization trends
KR102533236B1 (ko) 2016-06-20 2023-05-17 삼성전자주식회사 개선된 레이턴시를 갖는 메모리 장치 및 그것의 동작 방법
US10120806B2 (en) 2016-06-27 2018-11-06 Intel Corporation Multi-level system memory with near memory scrubbing based on predicted far memory idle time
KR102592777B1 (ko) * 2016-06-27 2023-10-25 애플 인크. 조합된 높은 밀도, 낮은 대역폭 및 낮은 밀도, 높은 대역폭 메모리들을 갖는 메모리 시스템
KR102612003B1 (ko) 2016-07-11 2023-12-08 삼성전자주식회사 솔리드 스테이트 드라이브 장치 및 이를 포함하는 저장 시스템
US10241906B1 (en) * 2016-07-30 2019-03-26 EMC IP Holding Company LLC Memory subsystem to augment physical memory of a computing system
US10387303B2 (en) * 2016-08-16 2019-08-20 Western Digital Technologies, Inc. Non-volatile storage system with compute engine to accelerate big data applications
US10200376B2 (en) 2016-08-24 2019-02-05 Intel Corporation Computer product, method, and system to dynamically provide discovery services for host nodes of target systems and storage resources in a network
US10176116B2 (en) 2016-09-28 2019-01-08 Intel Corporation Computer product, method, and system to provide discovery services to discover target storage resources and register a configuration of virtual target storage resources mapping to the target storage resources and an access control list of host nodes allowed to access the virtual target storage resources
US9818457B1 (en) 2016-09-30 2017-11-14 Intel Corporation Extended platform with additional memory module slots per CPU socket
US10216657B2 (en) 2016-09-30 2019-02-26 Intel Corporation Extended platform with additional memory module slots per CPU socket and configured for increased performance
US10915453B2 (en) 2016-12-29 2021-02-09 Intel Corporation Multi level system memory having different caching structures and memory controller that supports concurrent look-up into the different caching structures
US10445261B2 (en) 2016-12-30 2019-10-15 Intel Corporation System memory having point-to-point link that transports compressed traffic
US10318381B2 (en) * 2017-03-29 2019-06-11 Micron Technology, Inc. Selective error rate information for multidimensional memory
US10185652B2 (en) 2017-05-26 2019-01-22 Micron Technology, Inc. Stack access control for memory device
JP6866785B2 (ja) * 2017-06-29 2021-04-28 富士通株式会社 プロセッサおよびメモリアクセス方法
US10304814B2 (en) 2017-06-30 2019-05-28 Intel Corporation I/O layout footprint for multiple 1LM/2LM configurations
KR102395463B1 (ko) * 2017-09-27 2022-05-09 삼성전자주식회사 적층형 메모리 장치, 이를 포함하는 시스템 및 그 동작 방법
US11188467B2 (en) 2017-09-28 2021-11-30 Intel Corporation Multi-level system memory with near memory capable of storing compressed cache lines
CN111433749B (zh) 2017-10-12 2023-12-08 拉姆伯斯公司 具有dram高速缓存的非易失性物理存储器
US10269445B1 (en) * 2017-10-22 2019-04-23 Nanya Technology Corporation Memory device and operating method thereof
US10297304B1 (en) * 2017-11-12 2019-05-21 Nanya Technology Corporation Memory device and operating method thereof
US10860244B2 (en) 2017-12-26 2020-12-08 Intel Corporation Method and apparatus for multi-level memory early page demotion
US10446200B2 (en) * 2018-03-19 2019-10-15 Micron Technology, Inc. Memory device with configurable input/output interface
US11099995B2 (en) 2018-03-28 2021-08-24 Intel Corporation Techniques for prefetching data to a first level of memory of a hierarchical arrangement of memory
KR102512754B1 (ko) 2018-03-30 2023-03-23 삼성전자주식회사 관통 전극을 통해 전송되는 제어 신호를 이용하여 데이터를 샘플링하는 메모리 장치
CN109472099A (zh) * 2018-11-19 2019-03-15 郑州云海信息技术有限公司 一种服务器的印刷电路板及制作方法
KR102833322B1 (ko) * 2018-12-27 2025-07-10 삼성전자주식회사 3차원 적층 메모리 장치 및 그 동작 방법
US10606775B1 (en) * 2018-12-28 2020-03-31 Micron Technology, Inc. Computing tile
US11157374B2 (en) * 2018-12-28 2021-10-26 Intel Corporation Technologies for efficient reliable compute operations for mission critical applications
US10978426B2 (en) * 2018-12-31 2021-04-13 Micron Technology, Inc. Semiconductor packages with pass-through clock traces and associated systems and methods
US11055228B2 (en) 2019-01-31 2021-07-06 Intel Corporation Caching bypass mechanism for a multi-level memory
KR102801299B1 (ko) * 2019-02-22 2025-04-30 마이크론 테크놀로지, 인크. 메모리 디바이스 인터페이스 및 방법
US11171115B2 (en) 2019-03-18 2021-11-09 Kepler Computing Inc. Artificial intelligence processor with three-dimensional stacked memory
US11836102B1 (en) 2019-03-20 2023-12-05 Kepler Computing Inc. Low latency and high bandwidth artificial intelligence processor
KR102679095B1 (ko) 2019-05-30 2024-07-01 삼성전자주식회사 반도체 패키지
US12086410B1 (en) 2019-05-31 2024-09-10 Kepler Computing Inc. Ferroelectric memory chiplet in a multi-dimensional packaging with I/O switch embedded in a substrate or interposer
US12079475B1 (en) 2019-05-31 2024-09-03 Kepler Computing Inc. Ferroelectric memory chiplet in a multi-dimensional packaging
US11844223B1 (en) 2019-05-31 2023-12-12 Kepler Computing Inc. Ferroelectric memory chiplet as unified memory in a multi-dimensional packaging
US11043472B1 (en) 2019-05-31 2021-06-22 Kepler Compute Inc. 3D integrated ultra high-bandwidth memory
US11144228B2 (en) * 2019-07-11 2021-10-12 Micron Technology, Inc. Circuit partitioning for a memory device
CN110968529A (zh) * 2019-11-28 2020-04-07 深圳忆联信息系统有限公司 无缓存固态硬盘的实现方法、装置、计算机设备及存储介质
EP4081954A4 (en) * 2019-12-27 2023-04-05 Micron Technology, Inc. NEUROMORPHIC STORAGE DEVICE AND METHOD
WO2021138329A1 (en) 2019-12-30 2021-07-08 Micron Technology, Inc. Memory device interface and method
KR20220114027A (ko) 2019-12-31 2022-08-17 마이크론 테크놀로지, 인크. 메모리 모듈 다중 포트 버퍼 기술
US11410737B2 (en) * 2020-01-10 2022-08-09 Micron Technology, Inc. Power regulation for memory systems
KR102767455B1 (ko) 2020-01-20 2025-02-14 삼성전자주식회사 차단층을 포함하는 반도체 패키지
US11954040B2 (en) * 2020-06-15 2024-04-09 Arm Limited Cache memory architecture
CN116137923A (zh) 2020-07-14 2023-05-19 美光科技公司 多路复用存储器装置接口及方法
US12340863B2 (en) * 2021-07-09 2025-06-24 Intel Corporation Stacked memory chip solution with reduced package inputs/outputs (I/Os)
US11791233B1 (en) 2021-08-06 2023-10-17 Kepler Computing Inc. Ferroelectric or paraelectric memory and logic chiplet with thermal management in a multi-dimensional packaging
KR102583916B1 (ko) 2021-10-26 2023-09-26 연세대학교 산학협력단 저전력 테스트를 위한 스캔 상관관계 기반 스캔 클러스터 리오더링 방법 및 장치

Family Cites Families (56)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3273119A (en) * 1961-08-21 1966-09-13 Bell Telephone Labor Inc Digital error correcting systems
JPS6465650A (en) * 1987-09-04 1989-03-10 Hitachi Ltd Error detecting device for storage device
JPH0420504Y2 (pl) 1987-10-19 1992-05-11
DE69034227T2 (de) * 1989-04-13 2007-05-03 Sandisk Corp., Sunnyvale EEprom-System mit Blocklöschung
JPH02302856A (ja) 1989-05-18 1990-12-14 Nec Field Service Ltd キャッシュメモリ縮退方式
JPH03273673A (ja) * 1990-03-23 1991-12-04 Matsushita Electron Corp 半導体装置
US5502667A (en) * 1993-09-13 1996-03-26 International Business Machines Corporation Integrated multichip memory module structure
US5568437A (en) * 1995-06-20 1996-10-22 Vlsi Technology, Inc. Built-in self test for integrated circuits having read/write memory
KR100313514B1 (ko) 1999-05-11 2001-11-17 김영환 하이브리드 메모리 장치
JP3799197B2 (ja) 1999-08-26 2006-07-19 株式会社東芝 半導体記憶装置
US7266634B2 (en) * 2000-01-05 2007-09-04 Rambus Inc. Configurable width buffered module having flyby elements
US20050066968A1 (en) 2000-08-01 2005-03-31 Shofner Frederick M. Generation, delivery, measurement and control of aerosol boli for diagnostics and treatments of the respiratory/pulmonary tract of a patient
JP4497683B2 (ja) * 2000-09-11 2010-07-07 ローム株式会社 集積回路装置
US6483764B2 (en) * 2001-01-16 2002-11-19 International Business Machines Corporation Dynamic DRAM refresh rate adjustment based on cell leakage monitoring
US6373758B1 (en) * 2001-02-23 2002-04-16 Hewlett-Packard Company System and method of operating a programmable column fail counter for redundancy allocation
JP4262912B2 (ja) * 2001-10-16 2009-05-13 Ｎｅｃエレクトロニクス株式会社 半導体記憶装置
TW556961U (en) 2002-12-31 2003-10-01 Advanced Semiconductor Eng Multi-chip stack flip-chip package
JP4137757B2 (ja) 2003-10-01 2008-08-20 株式会社日立製作所 ネットワーク変換器及び情報処理システム
JP4272968B2 (ja) * 2003-10-16 2009-06-03 エルピーダメモリ株式会社 半導体装置および半導体チップ制御方法
JP3896112B2 (ja) * 2003-12-25 2007-03-22 エルピーダメモリ株式会社 半導体集積回路装置
US7085152B2 (en) 2003-12-29 2006-08-01 Intel Corporation Memory system segmented power supply and control
US7577859B2 (en) * 2004-02-20 2009-08-18 International Business Machines Corporation System and method of controlling power consumption in an electronic system by applying a uniquely determined minimum operating voltage to an integrated circuit rather than a predetermined nominal voltage selected for a family of integrated circuits
JP4569182B2 (ja) * 2004-03-19 2010-10-27 ソニー株式会社 半導体装置
US7557941B2 (en) * 2004-05-27 2009-07-07 Silverbrook Research Pty Ltd Use of variant and base keys with three or more entities
US7680966B1 (en) * 2004-06-29 2010-03-16 National Semiconductor Corporation Memory interface including generation of timing signals for memory operation
US7451282B2 (en) * 2005-03-09 2008-11-11 Dolphin Interconnect Solutions North America Inc. System and method for storing a sequential data stream
JP4216825B2 (ja) * 2005-03-22 2009-01-28 株式会社日立製作所 半導体パッケージ
JP4309368B2 (ja) * 2005-03-30 2009-08-05 エルピーダメモリ株式会社 半導体記憶装置
JP4401319B2 (ja) * 2005-04-07 2010-01-20 株式会社日立製作所 Ｄｒａｍ積層パッケージ並びにｄｒａｍ積層パッケージの試験および救済方法
US7827345B2 (en) 2005-08-04 2010-11-02 Joel Henry Hinrichs Serially interfaced random access memory
US7327592B2 (en) * 2005-08-30 2008-02-05 Micron Technology, Inc. Self-identifying stacked die semiconductor components
US7464225B2 (en) * 2005-09-26 2008-12-09 Rambus Inc. Memory module including a plurality of integrated circuit memory devices and a plurality of buffer devices in a matrix topology
JP2007273072A (ja) * 2006-03-09 2007-10-18 Matsushita Electric Ind Co Ltd 半導体記憶装置および半導体装置
JP2007280562A (ja) * 2006-04-11 2007-10-25 Sharp Corp リフレッシュ制御装置
US7716411B2 (en) * 2006-06-07 2010-05-11 Microsoft Corporation Hybrid memory device with single interface
JP2008140220A (ja) * 2006-12-04 2008-06-19 Nec Corp 半導体装置
US20080136002A1 (en) * 2006-12-07 2008-06-12 Advanced Chip Engineering Technology Inc. Multi-chips package and method of forming the same
WO2008076790A2 (en) * 2006-12-14 2008-06-26 Rambus Inc. Multi-die memory device
US7672178B2 (en) 2006-12-29 2010-03-02 Intel Corporation Dynamic adaptive read return of DRAM data
US20090006757A1 (en) * 2007-06-29 2009-01-01 Abhishek Singhal Hierarchical cache tag architecture
US7813210B2 (en) 2007-08-16 2010-10-12 Unity Semiconductor Corporation Multiple-type memory
US7623365B2 (en) * 2007-08-29 2009-11-24 Micron Technology, Inc. Memory device interface methods, apparatus, and systems
US8145977B2 (en) * 2007-10-15 2012-03-27 Joseph Schweiray Lee Methods and apparatus for providing error correction to unwritten pages and for identifying unwritten pages in flash memory
US8059443B2 (en) * 2007-10-23 2011-11-15 Hewlett-Packard Development Company, L.P. Three-dimensional memory module architectures
US7383475B1 (en) * 2007-10-29 2008-06-03 International Business Machines Corporation Design structure for memory array repair where repair logic cannot operate at same operating condition as array
JP2009116978A (ja) * 2007-11-08 2009-05-28 Nec Computertechno Ltd 半導体記憶装置
KR101393311B1 (ko) * 2008-03-19 2014-05-12 삼성전자주식회사 프로세스 변화량을 보상하는 멀티 칩 패키지 메모리
US20090282308A1 (en) * 2008-05-09 2009-11-12 Jan Gutsche Memory Cell Arrangement and Method for Reading State Information From a Memory Cell Bypassing an Error Detection Circuit
US8060719B2 (en) 2008-05-28 2011-11-15 Micron Technology, Inc. Hybrid memory management
US7979757B2 (en) * 2008-06-03 2011-07-12 Micron Technology, Inc. Method and apparatus for testing high capacity/high bandwidth memory devices
US8283771B2 (en) * 2008-06-30 2012-10-09 Intel Corporation Multi-die integrated circuit device and method
JP2010021306A (ja) * 2008-07-10 2010-01-28 Hitachi Ltd 半導体装置
US7929368B2 (en) * 2008-12-30 2011-04-19 Micron Technology, Inc. Variable memory refresh devices and methods
US9105323B2 (en) * 2009-01-23 2015-08-11 Micron Technology, Inc. Memory device power managers and methods
US8018752B2 (en) * 2009-03-23 2011-09-13 Micron Technology, Inc. Configurable bandwidth memory devices and methods
US8612809B2 (en) 2009-12-31 2013-12-17 Intel Corporation Systems, methods, and apparatuses for stacked memory

Also Published As

Publication number Publication date
CN104575568B (zh) 2018-10-26
JP5869097B2 (ja) 2016-02-24
KR20120097389A (ko) 2012-09-03
TWI517179B (zh) 2016-01-11
EP2519948A2 (en) 2012-11-07
EP2519948B1 (en) 2016-10-26
JP2015111425A (ja) 2015-06-18
US20190354437A1 (en) 2019-11-21
WO2011081846A2 (en) 2011-07-07
US20180232275A1 (en) 2018-08-16
JP2013516020A (ja) 2013-05-09
EP3029679B1 (en) 2025-04-30
CN104575568A (zh) 2015-04-29
US11003534B2 (en) 2021-05-11
JP2016027498A (ja) 2016-02-18
JP6339280B2 (ja) 2018-06-06
EP3029679A1 (en) 2016-06-08
TW201604893A (zh) 2016-02-01
WO2011081846A3 (en) 2011-12-15
EP2519948A4 (en) 2014-01-08
CN102640225B (zh) 2015-01-28
US20200233746A1 (en) 2020-07-23
JP2017224382A (ja) 2017-12-21
JP5676644B2 (ja) 2015-02-25
KR101454090B1 (ko) 2014-10-22
US20150161005A1 (en) 2015-06-11
US8984189B2 (en) 2015-03-17
TW201135748A (en) 2011-10-16
US8612809B2 (en) 2013-12-17
CN102640225A (zh) 2012-08-15
US20110161748A1 (en) 2011-06-30
US20120284436A1 (en) 2012-11-08
US10956268B2 (en) 2021-03-23
EP3910632A1 (en) 2021-11-17
US10621043B2 (en) 2020-04-14
TWI587315B (zh) 2017-06-11
US9886343B2 (en) 2018-02-06

Similar Documents

Publication Publication Date Title
PL3029679T3 (pl) Systemy, sposoby i aparaty do pamięci hybrydowej
GB2469902B (en) Device, system and method
EP2471005A4 (en) APPARATUSES, METHODS, AND SYSTEMS FOR A DISTRIBUTED OBJECT RENDERING DEVICE
IL209985A0 (en) Systems, apparatuses, and methods for providing non-transcranial electrotherapy
EP2476079A4 (en) APPARATUS, SYSTEM, AND METHOD FOR STORAGE ALLOCATION
EP2510431A4 (en) SYSTEMS AND METHODS FOR FACILITATING DATA DISCOVERY
EP2438698A4 (en) SYSTEMS AND METHODS FOR COMMUNICATIONS THROUGH EARTH
EP2115594A4 (en) MEMORY SYSTEM
EP2250564A4 (en) MEMORY SYSTEM
EP2250567A4 (en) MEMORY SYSTEM
EP2269139A4 (en) MEMORY SYSTEM
IL219767A0 (en) Apparatus, system and method for self orientation
EP2250565A4 (en) MEMORY SYSTEM
EP2400689A4 (en) METHOD, DEVICE AND SYSTEM OF AUTHENTICATION
PL2393743T3 (pl) Układ podajnikowy
EP2260390A4 (en) MEMORY SYSTEM
EP2402862A4 (en) STORAGE SYSTEM
EP2250566A4 (en) STORAGE SYSTEM
EP2260391A4 (en) STORAGE SYSTEM
EP2248026A4 (en) MEMORY SYSTEM
EP2271988A4 (en) MEMORY SYSTEM
EP2118756A4 (en) MEMORY SYSTEM
EP2430568A4 (en) METHODS AND SYSTEMS FOR KNOWLEDGE DISCOVERY
EP2753127A4 (en) METHOD, DEVICE AND SYSTEM FOR FINDING CELLS
EP2504938A4 (en) Methods, systems and devices for providing fiber-to-the-desktop