NL8801890A - Werkwijze voor het vervaardigen van polykristallijn silicium met hoge weerstand. - Google Patents

Werkwijze voor het vervaardigen van polykristallijn silicium met hoge weerstand. Download PDF

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Publication number
NL8801890A
NL8801890A NL8801890A NL8801890A NL8801890A NL 8801890 A NL8801890 A NL 8801890A NL 8801890 A NL8801890 A NL 8801890A NL 8801890 A NL8801890 A NL 8801890A NL 8801890 A NL8801890 A NL 8801890A
Authority
NL
Netherlands
Prior art keywords
polycrystalline silicon
resistance
layer
region
oxide layer
Prior art date
Application number
NL8801890A
Other languages
English (en)
Dutch (nl)
Original Assignee
Samsung Semiconductor Tele
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Semiconductor Tele filed Critical Samsung Semiconductor Tele
Publication of NL8801890A publication Critical patent/NL8801890A/nl

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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B10/00Static random access memory [SRAM] devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/20Resistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3215Doping the layers
    • H01L21/32155Doping polycristalline - or amorphous silicon layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B10/00Static random access memory [SRAM] devices
    • H10B10/15Static random access memory [SRAM] devices comprising a resistor load element
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/136Resistors
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/934Sheet resistance, i.e. dopant parameters

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
NL8801890A 1987-07-31 1988-07-27 Werkwijze voor het vervaardigen van polykristallijn silicium met hoge weerstand. NL8801890A (nl)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR870008419 1987-07-31
KR1019870008419A KR900005038B1 (ko) 1987-07-31 1987-07-31 고저항 다결정 실리콘의 제조방법

Publications (1)

Publication Number Publication Date
NL8801890A true NL8801890A (nl) 1989-02-16

Family

ID=19263489

Family Applications (1)

Application Number Title Priority Date Filing Date
NL8801890A NL8801890A (nl) 1987-07-31 1988-07-27 Werkwijze voor het vervaardigen van polykristallijn silicium met hoge weerstand.

Country Status (7)

Country Link
US (1) US4965214A (fr)
JP (1) JPS6445158A (fr)
KR (1) KR900005038B1 (fr)
DE (1) DE3825734A1 (fr)
FR (1) FR2618942B1 (fr)
GB (1) GB2207809B (fr)
NL (1) NL8801890A (fr)

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* Cited by examiner, † Cited by third party
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WO1991000620A1 (fr) * 1989-06-30 1991-01-10 Dallas Semiconductor Corporation Circuit integre avec element de charge a resistivite augmentee
JP3082923B2 (ja) * 1989-12-26 2000-09-04 ソニー株式会社 半導体装置の製法
DE4114162A1 (de) * 1990-05-02 1991-11-07 Nippon Sheet Glass Co Ltd Verfahren zur herstellung eines polykristallinen halbleiterfilms
US5068201A (en) * 1990-05-31 1991-11-26 Sgs-Thomson Microelectronics, Inc. Method for forming a high valued resistive load element and low resistance interconnect for integrated circuits
US5268325A (en) * 1990-05-31 1993-12-07 Sgs-Thomson Microelectronics, Inc. Method for fabricating a polycrystalline silicon resistive load element in an integrated circuit
JPH04329664A (ja) * 1991-04-30 1992-11-18 Nec Corp 高抵抗素子を有する半導体装置の製造方法
JPH05206050A (ja) * 1991-07-01 1993-08-13 Sgs Thomson Microelectron Inc 酸化物スクリーンを使用したボロン注入ポリシリコン抵抗
JPH06104384A (ja) * 1991-07-18 1994-04-15 Sgs Thomson Microelectron Inc 高値抵抗及びその製造方法
US5462894A (en) * 1991-08-06 1995-10-31 Sgs-Thomson Microelectronics, Inc. Method for fabricating a polycrystalline silicon resistive load element in an integrated circuit
US5273924A (en) * 1991-08-30 1993-12-28 Micron Technology, Inc. Method for forming an SRAM by minimizing diffusion of conductivity enhancing impurities from one region of a polysilicon layer to another region
FR2681978B1 (fr) * 1991-09-26 1993-12-24 Sgs Thomson Microelectronics Sa Resistance de precision et procede de fabrication.
US5212108A (en) * 1991-12-13 1993-05-18 Honeywell Inc. Fabrication of stabilized polysilicon resistors for SEU control
JP3214004B2 (ja) * 1991-12-17 2001-10-02 ソニー株式会社 半導体メモリ装置及びその製法
US5538915A (en) * 1992-06-05 1996-07-23 The Regents Of The University Of California Process for forming synapses in neural networks and resistor therefor
US5525831A (en) * 1993-04-05 1996-06-11 Nippondenso Co., Ltd. Semiconductor device with thin film resistor having reduced film thickness sensitivity during trimming process
US5470779A (en) * 1994-07-25 1995-11-28 Taiwan Semiconductor Manufacturing Company Ltd. Method of manufacture of SRAM with SIPOS resistor
US5661325A (en) * 1994-07-29 1997-08-26 Nkk Corporation SRAM structure
JP2699891B2 (ja) * 1994-10-28 1998-01-19 日本電気株式会社 半導体装置の製造方法
US5506167A (en) * 1995-04-13 1996-04-09 United Microelectronics Corp. Method of making a high resistance drain junction resistor in a SRAM
TW329563B (en) * 1996-06-01 1998-04-11 Winbond Electronics Corp The manufacturing method for load resistors of SRAM
GB2319532B (en) 1996-11-22 2001-01-31 Trikon Equip Ltd Method and apparatus for treating a semiconductor wafer
GB2319533B (en) 1996-11-22 2001-06-06 Trikon Equip Ltd Methods of forming a barrier layer
US6140198A (en) * 1998-11-06 2000-10-31 United Microelectronics Corp. Method of fabricating load resistor
DE10021095A1 (de) * 2000-04-20 2001-10-31 Infineon Technologies Ag Verfahren zum Bilden eines Dielektrikums auf einem Halbleitersubstrat
JP2006203748A (ja) * 2005-01-24 2006-08-03 Sanyo Electric Co Ltd 駆動回路

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS532552B2 (fr) * 1974-03-30 1978-01-28
JPS5197385A (en) * 1975-02-21 1976-08-26 Handotaisochino seizohoho
JPS6041458B2 (ja) * 1975-04-21 1985-09-17 ソニー株式会社 半導体装置の製造方法
JPS5397791A (en) * 1977-02-07 1978-08-26 Nec Corp Production of semiconductor integrated circuit device
JPS5910581B2 (ja) * 1977-12-01 1984-03-09 富士通株式会社 半導体装置の製造方法
US4408385A (en) * 1978-06-15 1983-10-11 Texas Instruments Incorporated Semiconductor integrated circuit with implanted resistor element in polycrystalline silicon layer
JPS5640269A (en) * 1979-09-11 1981-04-16 Toshiba Corp Preparation of semiconductor device
FR2534415A1 (fr) * 1982-10-07 1984-04-13 Cii Honeywell Bull Procede de fabrication de resistances electriques dans un materiau semi-conducteur polycristallin et dispositif a circuits integres resultant
US4658378A (en) * 1982-12-15 1987-04-14 Inmos Corporation Polysilicon resistor with low thermal activation energy
JPS59152657A (ja) * 1983-02-18 1984-08-31 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション 高シ−ト抵抗を有する多結晶シリコン層の形成方法
JPS59161857A (ja) * 1983-03-07 1984-09-12 Hitachi Ltd 半導体装置用配線および抵抗体
US4584026A (en) * 1984-07-25 1986-04-22 Rca Corporation Ion-implantation of phosphorus, arsenic or boron by pre-amorphizing with fluorine ions
JPS61134055A (ja) * 1984-12-04 1986-06-21 Sony Corp 半導体装置の製造方法
JPS61145868A (ja) * 1984-12-20 1986-07-03 Toshiba Corp 半導体装置の製造方法
US4602421A (en) * 1985-04-24 1986-07-29 The United States Of America As Represented By The Secretary Of The Air Force Low noise polycrystalline semiconductor resistors by hydrogen passivation
GB2182488A (en) * 1985-11-02 1987-05-13 Stc Plc Integrated circuit resistors
FR2602093B1 (fr) * 1985-12-27 1988-10-14 Bull Sa Procede de fabrication d'une resistance electrique par dopage d'un materiau semiconducteur et circuit integre en resultant
US4740481A (en) * 1986-01-21 1988-04-26 Motorola Inc. Method of preventing hillock formation in polysilicon layer by oxygen implanation
US4755480A (en) * 1986-02-03 1988-07-05 Intel Corporation Method of making a silicon nitride resistor using plasma enhanced chemical vapor deposition
US4707909A (en) * 1986-08-08 1987-11-24 Siliconix Incorporated Manufacture of trimmable high value polycrystalline silicon resistors
US4762801A (en) * 1987-02-20 1988-08-09 National Semiconductor Corporation Method of fabricating polycrystalline silicon resistors having desired temperature coefficients

Also Published As

Publication number Publication date
US4965214A (en) 1990-10-23
FR2618942B1 (fr) 1991-01-25
KR900005038B1 (ko) 1990-07-18
JPS6445158A (en) 1989-02-17
KR890003028A (ko) 1989-04-12
DE3825734C2 (fr) 1991-10-02
GB2207809B (en) 1991-04-03
GB2207809A (en) 1989-02-08
GB8818292D0 (en) 1988-09-07
FR2618942A1 (fr) 1989-02-03
DE3825734A1 (de) 1989-04-20

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A1A A request for search or an international-type search has been filed
CNR Transfer of rights (patent application after its laying open for public inspection)

Free format text: SAMSUNG ELECTRONICS CO., LTD.

BB A search report has been drawn up
BC A request for examination has been filed
BV The patent application has lapsed