GB2182488A - Integrated circuit resistors - Google Patents
Integrated circuit resistors Download PDFInfo
- Publication number
- GB2182488A GB2182488A GB08527048A GB8527048A GB2182488A GB 2182488 A GB2182488 A GB 2182488A GB 08527048 A GB08527048 A GB 08527048A GB 8527048 A GB8527048 A GB 8527048A GB 2182488 A GB2182488 A GB 2182488A
- Authority
- GB
- United Kingdom
- Prior art keywords
- doping
- oxygen
- polycrystalline silicon
- integrated circuit
- phosphorus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 17
- 239000001301 oxygen Substances 0.000 claims abstract description 17
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 17
- 238000000034 method Methods 0.000 claims abstract description 16
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 14
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims abstract description 11
- 229910052698 phosphorus Inorganic materials 0.000 claims abstract description 11
- 239000011574 phosphorus Substances 0.000 claims abstract description 11
- 239000000463 material Substances 0.000 claims abstract description 10
- 229910052785 arsenic Inorganic materials 0.000 claims abstract description 9
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 claims abstract description 9
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims abstract description 8
- 229910052796 boron Inorganic materials 0.000 claims abstract description 8
- 229920005591 polysilicon Polymers 0.000 claims description 6
- 238000011065 in-situ storage Methods 0.000 claims description 4
- 238000005468 ion implantation Methods 0.000 claims description 4
- 230000003068 static effect Effects 0.000 claims description 3
- -1 oxygen ions Chemical class 0.000 claims description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims 1
- 229910052710 silicon Inorganic materials 0.000 claims 1
- 239000010703 silicon Substances 0.000 claims 1
- 238000011109 contamination Methods 0.000 abstract description 5
- 230000035945 sensitivity Effects 0.000 abstract description 4
- 239000011810 insulating material Substances 0.000 abstract description 2
- 230000000694 effects Effects 0.000 description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 238000000137 annealing Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 239000000969 carrier Substances 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 238000010348 incorporation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 150000002926 oxygen Chemical class 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D1/00—Resistors, capacitors or inductors
- H10D1/40—Resistors
- H10D1/47—Resistors having no potential barriers
Landscapes
- Semiconductor Integrated Circuits (AREA)
Abstract
High value resistors in integrated circuits are fabricated by oxygen doping intrinsic polycrystalline silicon to form semi-insulating material, and doping this material with boron, phosphorus or arsenic to provide the desired resistivity. The process provides a resistors of low temperature coefficient and low sensitivity to surface contamination. <IMAGE>
Description
SPECIFICATION
Integrated circuit resistors
This invention relates to integrated circuits and in particular to the provision of high value resistors for such circuits.
There are a number of applications where high value resistors are required in integrated circuits. For example, current static random access memory designs require resistors in the G-ohm range to define load currents.
These resistors are conventionally formed in intrinsic or lightly phosphorus or boron doped polycrystalline silicon. Such resistors however suffer from the disadvantage that they are extremely sensitive to surface contamination.
This results in a wide spread of resistor values and a consequent low yield of fully functional circuits. Attempts have been made to overcome this problem by increasing the doping level to reduce the sensitivity to contamination, but this reduces the resistivity of the material to an unacceptably low level.
The object of the present invention is to minimise or to overcome this disadvantage.
According to the invention there is provided a method of forming a polycrystalline silicon resistor in an integrated circuit, the method including providing a semi-insulating polycrystalline silicon film, and doping this semi-insulating film with phosphorus, arsenic or boron to a level corresponding to the resistor value.
The oxygen doping may be provided by in situ doping of the polycrystalline material during deposition or by oxygen ion implantation of a previously formed polycrystalline silicon film.
We have found that the use of an oxygen doping significantly reduces the sensitivity of the resistor to surface contamination. Because the effect of this doping is to increase the resistivity of the polysilicon, a relatively high p- or n-type doping level can then be employed to achieve the desired resistivity level.
Embodiments of the invention will now be described with reference to the accompanying drawings in which:
Figure 1 shows the relationship between band gap and oxygen doping levels of in-situ doped semi-insulating polycrystalline silicon (SIPOS);
Figure 2 shows the relationship between phosphorus implantation dose and sheet sensitivity of SIPOS, and
Figures 3 and 4 illustrate the effects of annealing on respectively phosphorus and arsenic implanted SIPOS.
In a typical process, a region of high resistivity semi-insulating polycrystalline silicon (SI
POS) is formed by in-situ oxygen doping of polycrystalline material during deposition on a substrate surface, e.g. an integrated circuit.
The effect of this oxygen doping is to increase the band gap of the material as shown in Fig. 1 of the accompanying drawings. Typically we employ oxygen doping levels in the range 2% to 10% and preferably 2% to 5%, but the technique is not of course limited to these ranges.
The very high resistivity of this semi-insulating material is then reduced to a desired value by doping with boron, phosphorus or arsenic.
Typically this doping is effected by ion implantation. The reduction in resistivity achieved by this process is a function of the doping level, the relationship for phosphorus doping being illustrated in Fig. 2. For comparison purposes,
Fig. 2 also includes corresponding results for polysilicon containing no oxygen. A similar relationship is obtained from arsenic and boron dopants.
Where doping is effected by ion implantation it is of course necessary to anneal the implanted material to repair damage. The effect of this anneal is to cause a further small reduction in resistivity. Figs. 3 and 4 show the effect of annealing in any nitrogen of phosphorus and arsenic implanted SIPOS.
Again, comparative results for polysilicon are included.
In an alternative embodiment the polysilicon is rendered semi-insulating by implanting previously deposited material with oxygen ions.
Typically we provide an oxygen implant in the range 10'6cm-2 to 1018cm-2 resulting in an intrinsic resistivity of 108 to 1012 ohm cm2.
The implanted material can then be doped with arsenic, boron or phosphorus to provide a controlled resistivity between 105 ohm cm and 10-' ohm cm.
We have found that resistors formed in this way have a low temperature coefficient. The incorporation of oxygen into polysilicon increases the bandgap of the material thus reducing the number of thermally generated carriers.
The technique is suitable for the fabrication of high value load resistors in a static random access memory where their low temperature coefficient and selective circuitry to surface contamination are particularly desirable features.
Claims (10)
1. A method of forming a polycrystalline silicon resistor in an integrated circuit, the method including providing a semi-insulating polycrystalline silicon film, and doping the semi-insulating film with phosphorus, arsenic or boron to a level corresponding to the resistor value.
2. A method as claimed in claim 1, wherein the intrinsic polycrystalline silicon is oxygen doped in-situ.
3. A method as claimed in claim 2, wherein the silicon is oxygen doped to a level in the range 2% to 10%.
4. A method as claimed in claim 1, wherein the polycrystalline silicon is oxygen doped by implementation with oxygen ions.
5. A method as claimed in claim 4, wherein oxygen is implanted to a level of 1016 to 1018 cm-2.
6. A method as claimed in claim 5, wherein the resistivity of the implanted material is 108 to 1012 ohm cm2.
7. A method as claimed in any one of claims 1 to 6, wherein said phosphorus, arsenic or boron doping is effected by ion implantation.
8. A method of forming a polysilicon resistor substantially as described herein.
9. An integrated circuit incorporating a plurality of resistors as claimed in any one of claims 1 to 8.
10. An integrated circuit as claimed in claim 9 and comprising a static random access memory.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB08527048A GB2182488A (en) | 1985-11-02 | 1985-11-02 | Integrated circuit resistors |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB08527048A GB2182488A (en) | 1985-11-02 | 1985-11-02 | Integrated circuit resistors |
Publications (2)
Publication Number | Publication Date |
---|---|
GB8527048D0 GB8527048D0 (en) | 1985-12-04 |
GB2182488A true GB2182488A (en) | 1987-05-13 |
Family
ID=10587643
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB08527048A Withdrawn GB2182488A (en) | 1985-11-02 | 1985-11-02 | Integrated circuit resistors |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2182488A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2618942A1 (en) * | 1987-07-31 | 1989-02-03 | Samsung Semiconductor Tele | PROCESS FOR PRODUCING POLYCRYSTALLINE SILICON HAVING HIGH STRENGTH |
US5037766A (en) * | 1988-12-06 | 1991-08-06 | Industrial Technology Research Institute | Method of fabricating a thin film polysilicon thin film transistor or resistor |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1488728A (en) * | 1974-06-18 | 1977-10-12 | Sony Corp | Thin film resistors |
US4406051A (en) * | 1979-09-11 | 1983-09-27 | Tokyo Shibaura Denki Kabushiki Kaisha | Method for manufacturing a semiconductor device |
EP0107556A1 (en) * | 1982-10-07 | 1984-05-02 | Bull S.A. | Process for manufacturing an electrical resistor having a polycrystalline semiconductor material, and integrated circuit device comprising this resistor |
-
1985
- 1985-11-02 GB GB08527048A patent/GB2182488A/en not_active Withdrawn
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1488728A (en) * | 1974-06-18 | 1977-10-12 | Sony Corp | Thin film resistors |
US4406051A (en) * | 1979-09-11 | 1983-09-27 | Tokyo Shibaura Denki Kabushiki Kaisha | Method for manufacturing a semiconductor device |
EP0107556A1 (en) * | 1982-10-07 | 1984-05-02 | Bull S.A. | Process for manufacturing an electrical resistor having a polycrystalline semiconductor material, and integrated circuit device comprising this resistor |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2618942A1 (en) * | 1987-07-31 | 1989-02-03 | Samsung Semiconductor Tele | PROCESS FOR PRODUCING POLYCRYSTALLINE SILICON HAVING HIGH STRENGTH |
GB2207809A (en) * | 1987-07-31 | 1989-02-08 | Samsung Semiconductor Tele | Method of manufacturing high resistance polycrystalline silicon |
GB2207809B (en) * | 1987-07-31 | 1991-04-03 | Samsung Semiconductor Tele | Method of manufacturing polycrystalline silicon |
US5037766A (en) * | 1988-12-06 | 1991-08-06 | Industrial Technology Research Institute | Method of fabricating a thin film polysilicon thin film transistor or resistor |
Also Published As
Publication number | Publication date |
---|---|
GB8527048D0 (en) | 1985-12-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP0281276B1 (en) | Fabrication of polycrystalline silicon resistors | |
EP0090963B1 (en) | Method for making polycrystalline silicon film resistors | |
US4298401A (en) | Breakdown voltage resistor obtained through a double ion-implantation into a semiconductor substrate, and manufacturing process of the same | |
US4263518A (en) | Arrangement for correcting the voltage coefficient of resistance of resistors integral with a semiconductor body | |
US5187559A (en) | Semiconductor device and process for producing same | |
US3796929A (en) | Junction isolated integrated circuit resistor with crystal damage near isolation junction | |
US5323057A (en) | Lateral bipolar transistor with insulating trenches | |
EP0167249B1 (en) | Method of making a polysilicon resistor with low thermal activation energy | |
US5468974A (en) | Control and modification of dopant distribution and activation in polysilicon | |
WO1988006804A2 (en) | Low leakage cmos/insulator substrate devices and method of forming the same | |
US4839301A (en) | Blanket CMOS channel stop implant employing a combination of n-channel and p-channel punch-through implants | |
EP0150582B1 (en) | Silicon gigabits per second metal-oxide-semiconductor device processing | |
US3548269A (en) | Resistive layer semiconductive device | |
US4851360A (en) | NMOS source/drain doping with both P and As | |
US4889819A (en) | Method for fabricating shallow junctions by preamorphizing with dopant of same conductivity as substrate | |
GB2061003A (en) | Zener diode | |
JPS60109260A (en) | Compensated polycrystalline silicon resistive element | |
US5073509A (en) | Blanket CMOS channel-stop implant | |
US5032534A (en) | Process for manufacturing a regulation and protection diode | |
US5146297A (en) | Precision voltage reference with lattice damage | |
GB2182488A (en) | Integrated circuit resistors | |
EP0001139B1 (en) | Radiation-sensitive avalanche diode and method of manufacturing same | |
US20040241952A1 (en) | Semiconductor diffused resistors with optimized temperature dependence | |
US5240511A (en) | Lightly doped polycrystalline silicon resistor having a non-negative temperature coefficient | |
US4218267A (en) | Microelectronic fabrication method minimizing threshold voltage variation |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |