NL8503451A - Digitale vertragingseenheid. - Google Patents

Digitale vertragingseenheid. Download PDF

Info

Publication number
NL8503451A
NL8503451A NL8503451A NL8503451A NL8503451A NL 8503451 A NL8503451 A NL 8503451A NL 8503451 A NL8503451 A NL 8503451A NL 8503451 A NL8503451 A NL 8503451A NL 8503451 A NL8503451 A NL 8503451A
Authority
NL
Netherlands
Prior art keywords
address
signals
information
clock pulses
period
Prior art date
Application number
NL8503451A
Other languages
English (en)
Dutch (nl)
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP59264738A external-priority patent/JPS61142814A/ja
Priority claimed from JP59267954A external-priority patent/JPS61144113A/ja
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of NL8503451A publication Critical patent/NL8503451A/nl

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/76—Television signal recording
    • H04N5/907—Television signal recording using static stores, e.g. storage tubes or semiconductor memories
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1042—Read-write modes for single port memories, i.e. having either a random port or a serial port using interleaving techniques, i.e. read-write of one part of the memory while preparing another part
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1075—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for multiport memories each having random access ports and serial ports, e.g. video RAM
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/04—Arrangements for selecting an address in a digital store using a sequential addressing device, e.g. shift register, counter
NL8503451A 1984-12-14 1985-12-16 Digitale vertragingseenheid. NL8503451A (nl)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP59264738A JPS61142814A (ja) 1984-12-14 1984-12-14 デイジタル遅延装置
JP26473884 1984-12-14
JP26795484 1984-12-17
JP59267954A JPS61144113A (ja) 1984-12-17 1984-12-17 デイジタル遅延装置

Publications (1)

Publication Number Publication Date
NL8503451A true NL8503451A (nl) 1986-07-01

Family

ID=26546644

Family Applications (1)

Application Number Title Priority Date Filing Date
NL8503451A NL8503451A (nl) 1984-12-14 1985-12-16 Digitale vertragingseenheid.

Country Status (3)

Country Link
US (1) US4849937A (de)
DE (1) DE3543911A1 (de)
NL (1) NL8503451A (de)

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Also Published As

Publication number Publication date
DE3543911C2 (de) 1988-12-15
DE3543911A1 (de) 1986-06-26
US4849937A (en) 1989-07-18

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